kopia lustrzana https://github.com/espressif/esp-idf
235 wiersze
11 KiB
C
235 wiersze
11 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <esp_types.h>
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#include "soc/soc.h"
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#include "soc/pmu_struct.h"
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#include "hal/pmu_hal.h"
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#include "pmu_param.h"
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#include "esp_private/esp_pmu.h"
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#include "soc/regi2c_pmu.h"
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#include "soc/regi2c_bias.h"
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#include "regi2c_ctrl.h"
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static __attribute__((unused)) const char *TAG = "pmu_init";
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typedef struct {
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const pmu_hp_system_power_param_t *power;
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const pmu_hp_system_clock_param_t *clock;
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const pmu_hp_system_digital_param_t *digital;
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pmu_hp_system_analog_param_t *analog; //param determined at runtime
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const pmu_hp_system_retention_param_t *retent;
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} pmu_hp_system_param_t;
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typedef struct {
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const pmu_lp_system_power_param_t *power;
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pmu_lp_system_analog_param_t *analog; //param determined at runtime
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} pmu_lp_system_param_t;
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pmu_context_t * __attribute__((weak)) IRAM_ATTR PMU_instance(void)
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{
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/* It should be explicitly defined in the internal RAM, because this
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* instance will be used in pmu_sleep.c */
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static DRAM_ATTR pmu_hal_context_t pmu_hal = { .dev = &PMU };
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static DRAM_ATTR pmu_sleep_machine_constant_t pmu_mc = PMU_SLEEP_MC_DEFAULT();
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static DRAM_ATTR pmu_context_t pmu_context = { .hal = &pmu_hal, .mc = (void *)&pmu_mc };
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return &pmu_context;
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}
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void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, const pmu_hp_system_param_t *param)
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{
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const pmu_hp_system_power_param_t *power = param->power;
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const pmu_hp_system_clock_param_t *clock = param->clock;
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const pmu_hp_system_digital_param_t *dig = param->digital;
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const pmu_hp_system_analog_param_t *anlg = param->analog;
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const pmu_hp_system_retention_param_t *ret = param->retent;
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assert(ctx->hal);
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/* Default configuration of hp-system power in active, modem and sleep modes */
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pmu_ll_hp_set_dig_power(ctx->hal->dev, mode, power->dig_power.val);
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pmu_ll_hp_set_clk_power(ctx->hal->dev, mode, power->clk_power.val);
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pmu_ll_hp_set_xtal_xpd (ctx->hal->dev, mode, power->xtal.xpd_xtal);
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/* Default configuration of hp-system clock in active, modem and sleep modes */
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pmu_ll_hp_set_icg_func (ctx->hal->dev, mode, clock->icg_func);
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pmu_ll_hp_set_icg_apb (ctx->hal->dev, mode, clock->icg_apb);
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pmu_ll_hp_set_icg_modem (ctx->hal->dev, mode, clock->icg_modem.code);
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pmu_ll_hp_set_sysclk_nodiv (ctx->hal->dev, mode, clock->sysclk.dig_sysclk_nodiv);
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pmu_ll_hp_set_icg_sysclk_enable (ctx->hal->dev, mode, clock->sysclk.icg_sysclk_en);
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pmu_ll_hp_set_sysclk_slp_sel (ctx->hal->dev, mode, clock->sysclk.sysclk_slp_sel);
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pmu_ll_hp_set_icg_sysclk_slp_sel(ctx->hal->dev, mode, clock->sysclk.icg_slp_sel);
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pmu_ll_hp_set_dig_sysclk (ctx->hal->dev, mode, clock->sysclk.dig_sysclk_sel);
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/* Default configuration of hp-system digital sub-system in active, modem
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* and sleep modes */
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pmu_ll_hp_set_uart_wakeup_enable(ctx->hal->dev, mode, dig->syscntl.uart_wakeup_en);
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pmu_ll_hp_set_hold_all_lp_pad (ctx->hal->dev, mode, dig->syscntl.lp_pad_hold_all);
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pmu_ll_hp_set_hold_all_hp_pad (ctx->hal->dev, mode, dig->syscntl.hp_pad_hold_all);
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pmu_ll_hp_set_dig_pad_slp_sel (ctx->hal->dev, mode, dig->syscntl.dig_pad_slp_sel);
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pmu_ll_hp_set_pause_watchdog (ctx->hal->dev, mode, dig->syscntl.dig_pause_wdt);
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pmu_ll_hp_set_cpu_stall (ctx->hal->dev, mode, dig->syscntl.dig_cpu_stall);
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/* Default configuration of hp-system analog sub-system in active, modem and
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* sleep modes */
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pmu_ll_hp_set_bias_xpd (ctx->hal->dev, mode, anlg->bias.xpd_bias);
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pmu_ll_hp_set_trx_xpd (ctx->hal->dev, mode, anlg->bias.xpd_trx);
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pmu_ll_hp_set_current_power_off (ctx->hal->dev, mode, anlg->bias.pd_cur);
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pmu_ll_hp_set_bias_sleep_enable (ctx->hal->dev, mode, anlg->bias.bias_sleep);
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pmu_ll_hp_set_regulator_sleep_memory_xpd (ctx->hal->dev, mode, anlg->regulator0.slp_mem_xpd);
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pmu_ll_hp_set_regulator_sleep_logic_xpd (ctx->hal->dev, mode, anlg->regulator0.slp_logic_xpd);
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pmu_ll_hp_set_regulator_xpd (ctx->hal->dev, mode, anlg->regulator0.xpd);
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pmu_ll_hp_set_regulator_sleep_memory_dbias(ctx->hal->dev, mode, anlg->regulator0.slp_mem_dbias);
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pmu_ll_hp_set_regulator_sleep_logic_dbias (ctx->hal->dev, mode, anlg->regulator0.slp_logic_dbias);
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pmu_ll_hp_set_regulator_dbias (ctx->hal->dev, mode, anlg->regulator0.dbias);
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pmu_ll_hp_set_regulator_driver_bar (ctx->hal->dev, mode, anlg->regulator1.drv_b);
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/* Default configuration of hp-system retention sub-system in active, modem
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* and sleep modes */
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pmu_ll_hp_set_retention_param(ctx->hal->dev, mode, ret->retention.val);
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pmu_ll_hp_set_backup_icg_func(ctx->hal->dev, mode, ret->backup_clk);
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/* Some PMU initial parameter configuration */
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pmu_ll_imm_update_dig_icg_modem_code(ctx->hal->dev, true);
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pmu_ll_imm_update_dig_icg_switch(ctx->hal->dev, true);
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pmu_ll_hp_set_sleep_protect_mode(ctx->hal->dev, PMU_SLEEP_PROTECT_HP_LP_SLEEP);
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}
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void pmu_lp_system_init(pmu_context_t *ctx, pmu_lp_mode_t mode, const pmu_lp_system_param_t *param)
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{
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const pmu_lp_system_power_param_t *power = param->power;
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const pmu_lp_system_analog_param_t *anlg = param->analog;
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assert(ctx->hal);
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/* Default configuration of lp-system power in active and sleep modes */
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pmu_ll_lp_set_dig_power(ctx->hal->dev, mode, power->dig_power.val);
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pmu_ll_lp_set_clk_power(ctx->hal->dev, mode, power->clk_power.val);
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pmu_ll_lp_set_xtal_xpd (ctx->hal->dev, PMU_MODE_LP_SLEEP, power->xtal.xpd_xtal);
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/* Default configuration of lp-system analog sub-system in active and
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* sleep modes */
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pmu_ll_lp_set_bias_xpd (ctx->hal->dev, PMU_MODE_LP_SLEEP, anlg->bias.xpd_bias);
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pmu_ll_lp_set_current_power_off (ctx->hal->dev, PMU_MODE_LP_SLEEP, anlg->bias.pd_cur);
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pmu_ll_lp_set_bias_sleep_enable (ctx->hal->dev, PMU_MODE_LP_SLEEP, anlg->bias.bias_sleep);
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pmu_ll_lp_set_regulator_slp_xpd (ctx->hal->dev, mode, anlg->regulator0.slp_xpd);
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pmu_ll_lp_set_regulator_xpd (ctx->hal->dev, mode, anlg->regulator0.xpd);
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pmu_ll_lp_set_regulator_sleep_dbias(ctx->hal->dev, mode, anlg->regulator0.slp_dbias);
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pmu_ll_lp_set_regulator_dbias (ctx->hal->dev, mode, anlg->regulator0.dbias);
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pmu_ll_lp_set_regulator_driver_bar (ctx->hal->dev, mode, anlg->regulator1.drv_b);
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}
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static inline void pmu_power_domain_force_default(pmu_context_t *ctx)
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{
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assert(ctx);
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// for bypass reserved power domain
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const pmu_hp_power_domain_t pmu_hp_domains[] = {
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PMU_HP_PD_TOP,
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PMU_HP_PD_CPU,
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PMU_HP_PD_WIFI
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};
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for (uint8_t idx = 0; idx < (sizeof(pmu_hp_domains) / sizeof(pmu_hp_power_domain_t)); idx++) {
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pmu_ll_hp_set_power_force_power_up (ctx->hal->dev, pmu_hp_domains[idx], false);
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pmu_ll_hp_set_power_force_no_reset (ctx->hal->dev, pmu_hp_domains[idx], false);
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pmu_ll_hp_set_power_force_no_isolate(ctx->hal->dev, pmu_hp_domains[idx], false);
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pmu_ll_hp_set_power_force_power_down(ctx->hal->dev, pmu_hp_domains[idx], false);
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pmu_ll_hp_set_power_force_isolate (ctx->hal->dev, pmu_hp_domains[idx], false);
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pmu_ll_hp_set_power_force_reset (ctx->hal->dev, pmu_hp_domains[idx], false);
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}
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/* Isolate all memory banks while sleeping, avoid memory leakage current */
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pmu_ll_hp_set_memory_no_isolate (ctx->hal->dev, 0);
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pmu_ll_lp_set_power_force_power_up (ctx->hal->dev, false);
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pmu_ll_lp_set_power_force_no_reset (ctx->hal->dev, false);
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pmu_ll_lp_set_power_force_no_isolate(ctx->hal->dev, false);
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pmu_ll_lp_set_power_force_power_down(ctx->hal->dev, false);
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pmu_ll_lp_set_power_force_isolate (ctx->hal->dev, false);
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pmu_ll_lp_set_power_force_reset (ctx->hal->dev, false);
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}
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static inline void pmu_hp_system_param_default(pmu_hp_mode_t mode, pmu_hp_system_param_t *param)
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{
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assert (param->analog);
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param->power = pmu_hp_system_power_param_default(mode);
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param->clock = pmu_hp_system_clock_param_default(mode);
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param->digital = pmu_hp_system_digital_param_default(mode);
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*param->analog = *pmu_hp_system_analog_param_default(mode); //copy default value
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param->retent = pmu_hp_system_retention_param_default(mode);
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if (mode == PMU_MODE_HP_ACTIVE || mode == PMU_MODE_HP_MODEM) {
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param->analog->regulator0.dbias = get_act_hp_dbias();
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}
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}
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static void pmu_hp_system_init_default(pmu_context_t *ctx)
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{
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assert(ctx);
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for (pmu_hp_mode_t mode = PMU_MODE_HP_ACTIVE; mode < PMU_MODE_HP_MAX; mode++) {
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pmu_hp_system_analog_param_t analog = {};
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pmu_hp_system_param_t param = {.analog = &analog};
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pmu_hp_system_param_default(mode, ¶m);
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pmu_hp_system_init(ctx, mode, ¶m);
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}
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}
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static inline void pmu_lp_system_param_default(pmu_lp_mode_t mode, pmu_lp_system_param_t *param)
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{
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assert (param->analog);
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param->power = pmu_lp_system_power_param_default(mode);
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*param->analog = *pmu_lp_system_analog_param_default(mode); //copy default value
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if (mode == PMU_MODE_LP_ACTIVE) {
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param->analog->regulator0.dbias = get_act_lp_dbias();
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}
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}
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static void pmu_lp_system_init_default(pmu_context_t *ctx)
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{
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assert(ctx);
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for (pmu_lp_mode_t mode = PMU_MODE_LP_ACTIVE; mode < PMU_MODE_LP_MAX; mode++) {
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pmu_lp_system_analog_param_t analog = {};
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pmu_lp_system_param_t param = {.analog = &analog};
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pmu_lp_system_param_default(mode, ¶m);
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pmu_lp_system_init(ctx, mode, ¶m);
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}
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}
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void pmu_init()
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{
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/* No peripheral reg i2c power up required on the target */
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_EN_I2C_RTC_DREG, 0);
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_EN_I2C_DIG_DREG, 0);
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_EN_I2C_RTC_DREG_SLP, 0);
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_EN_I2C_DIG_DREG_SLP, 0);
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_OR_XPD_RTC_REG, 0);
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_OR_XPD_DIG_REG, 0);
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REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_OR_XPD_TRX, 0);
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REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_0P8, 8); // fix low temp issue, need to increase this internal voltage
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WRITE_PERI_REG(PMU_POWER_PD_TOP_CNTL_REG, 0);
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WRITE_PERI_REG(PMU_POWER_PD_HPAON_CNTL_REG, 0);
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WRITE_PERI_REG(PMU_POWER_PD_HPCPU_CNTL_REG, 0);
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WRITE_PERI_REG(PMU_POWER_PD_HPPERI_RESERVE_REG, 0);
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WRITE_PERI_REG(PMU_POWER_PD_HPWIFI_CNTL_REG, 0);
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WRITE_PERI_REG(PMU_POWER_PD_LPPERI_CNTL_REG, 0);
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pmu_hp_system_init_default(PMU_instance());
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pmu_lp_system_init_default(PMU_instance());
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pmu_power_domain_force_default(PMU_instance());
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}
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