kopia lustrzana https://github.com/espressif/esp-idf
146 wiersze
4.5 KiB
C
146 wiersze
4.5 KiB
C
/**
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Group: Configuration Registers */
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/** Type of gpion register
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* IO MUX configuration register for GPIOn
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*/
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typedef union {
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struct {
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/** gpion_mcu_oe : R/W; bitpos: [0]; default: 0;
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* Configures whether or not to enable the output of GPIOn in sleep mode.
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_mcu_oe:1;
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/** gpion_slp_sel : R/W; bitpos: [1]; default: 0;
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* Configures whether or not to enter sleep mode for GPIOn.\\
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* 0: Not enter\\
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* 1: Enter\\
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*/
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uint32_t gpion_slp_sel:1;
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/** gpion_mcu_wpd : R/W; bitpos: [2]; default: 0;
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* Configure whether or not to enable pull-down resistor of GPIOn in sleep mode.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_mcu_wpd:1;
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/** gpion_mcu_wpu : R/W; bitpos: [3]; default: 0;
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* Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. \\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_mcu_wpu:1;
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/** gpion_mcu_ie : R/W; bitpos: [4]; default: 0;
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* Configures whether or not to enable the input of GPIOn during sleep mode.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_mcu_ie:1;
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/** gpion_mcu_drv : R/W; bitpos: [6:5]; default: 0;
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* Configures the drive strength of GPIOn during sleep mode. \\
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* 0: ~5 mA\\
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* 1: ~10 mA\\
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* 2: ~20 mA\\
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* 3: ~40 mA\\
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*/
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uint32_t gpion_mcu_drv:2;
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/** gpion_fun_wpd : R/W; bitpos: [7]; default: 0;
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* Configures whether or not to enable pull-down resistor of GPIOn.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_fun_wpd:1;
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/** gpion_fun_wpu : R/W; bitpos: [8]; default: 0;
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* Configures whether or not enable pull-up resistor of GPIOn.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_fun_wpu:1;
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/** gpion_fun_ie : R/W; bitpos: [9]; default: 0;
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* Configures whether or not to enable input of GPIOn.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_fun_ie:1;
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/** gpion_fun_drv : R/W; bitpos: [11:10]; default: 2;
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* Configures the drive strength of GPIOn. \\
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* 0: ~5 mA\\
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* 1: ~10 mA\\
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* 2: ~20 mA\\
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* 3: ~40 mA\\
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*/
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uint32_t gpion_fun_drv:2;
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/** gpion_mcu_sel : R/W; bitpos: [14:12]; default: 1;
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* Configures to select IO MUX function for this signal. \\
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* 0: Select Function 0\\
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* 1: Select Function 1\\
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* ......\\
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*/
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uint32_t gpion_mcu_sel:3;
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/** gpion_filter_en : R/W; bitpos: [15]; default: 0;
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* Configures whether or not to enable filter for pin input signals.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_filter_en:1;
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/** gpion_hys_en : R/W; bitpos: [16]; default: 0;
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* Configures whether or not to enable the hysteresis function of the pin when
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* IO_MUX_GPIOn_HYS_SEL is set to 1.\\
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* 0: Disable\\
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* 1: Enable\\
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*/
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uint32_t gpion_hys_en:1;
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/** gpion_hys_sel : R/W; bitpos: [17]; default: 0;
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* Configures to choose the signal for enabling the hysteresis function for GPIOn. \\
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* 0: Choose the output enable signal of eFuse\\
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* 1: Choose the output enable signal of IO_MUX_GPIOn_HYS_EN\\
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*/
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uint32_t gpion_hys_sel:1;
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uint32_t reserved_18:14;
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};
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uint32_t val;
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} io_mux_gpion_reg_t;
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/** Group: Version Register */
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/** Type of date register
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* Version control register
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*/
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typedef union {
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struct {
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/** reg_date : R/W; bitpos: [27:0]; default: 36774288;
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* Version control register
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*/
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uint32_t reg_date:28;
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uint32_t reserved_28:4;
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};
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uint32_t val;
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} io_mux_date_reg_t;
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typedef struct {
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volatile io_mux_gpion_reg_t gpion[22];
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uint32_t reserved_058[105];
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volatile io_mux_date_reg_t date;
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} io_mux_dev_t;
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extern io_mux_dev_t IOMUX;
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#ifndef __cplusplus
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_Static_assert(sizeof(io_mux_dev_t) == 0x200, "Invalid size of io_mux_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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