kopia lustrzana https://github.com/espressif/esp-idf
288 wiersze
9.8 KiB
C
288 wiersze
9.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdio.h>
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#include <string.h>
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#include "test_rtcio.h"
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#include "esp_system.h"
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#include "esp_sleep.h"
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#include "unity.h"
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#include "driver/gpio.h"
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#include "driver/rtc_io.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "soc/rtc_io_periph.h"
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#include "soc/soc_caps.h"
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#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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static const char *TAG = "rtcio_test";
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#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK")
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#define TEST_COUNT 10
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/*
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* Test output/input function.
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*/
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TEST_CASE("RTCIO_input/output_test", "[rtcio]")
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{
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ESP_LOGI(TAG, "RTCIO input/output test");
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// init rtcio
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_init(i));
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RTCIO_CHECK(rtc_gpio_set_direction(i, RTC_GPIO_MODE_INPUT_OUTPUT));
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RTCIO_CHECK(rtc_gpio_pullup_dis(i));
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RTCIO_CHECK(rtc_gpio_pulldown_dis(i));
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ESP_LOGI(TAG, "gpio %d init", i);
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}
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}
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for (int cnt = 0; cnt < TEST_COUNT; cnt++) {
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int level = cnt % 2;
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ESP_LOGI(TAG, "RTCIO output level %d", level);
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_set_level(i, level));
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vTaskDelay(10 / portTICK_PERIOD_MS);
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if (rtc_gpio_get_level(i) != level) {
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ESP_LOGE(TAG, "RTCIO input/output test err, gpio%d", i);
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TEST_FAIL();
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}
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}
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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}
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// Deinit rtcio
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_deinit(i));
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}
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}
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ESP_LOGI(TAG, "RTCIO input/output test over");
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}
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/*
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* Test pullup/pulldown function.
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* Note: extern circuit should not connect.
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*/
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TEST_CASE("RTCIO_pullup/pulldown_test", "[rtcio]")
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{
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ESP_LOGI(TAG, "RTCIO pullup/pulldown test");
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// init rtcio
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for (int i = 0; i < TEST_GPIO_PIN_COUNT; i++) {
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int num = rtc_io_number_get(s_test_map[i]);
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if (rtc_gpio_is_valid_gpio(s_test_map[i]) && num > 0 && RTCIO_SUPPORT_PU_PD(num)) {
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RTCIO_CHECK(rtc_gpio_init(s_test_map[i]));
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RTCIO_CHECK(rtc_gpio_set_direction(s_test_map[i], RTC_GPIO_MODE_INPUT_ONLY));
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RTCIO_CHECK(rtc_gpio_pullup_dis(s_test_map[i]));
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RTCIO_CHECK(rtc_gpio_pulldown_dis(s_test_map[i]));
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ESP_LOGI(TAG, "gpio %d init", s_test_map[i]);
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}
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}
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for (int cnt = 0; cnt < TEST_COUNT; cnt++) {
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int level = cnt % 2;
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ESP_LOGI(TAG, "RTCIO pull level %d", level);
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for (int i = 0; i < TEST_GPIO_PIN_COUNT; i++) {
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int num = rtc_io_number_get(s_test_map[i]);
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if (rtc_gpio_is_valid_gpio(s_test_map[i]) && num > 0 && RTCIO_SUPPORT_PU_PD(num)) {
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if (level) {
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RTCIO_CHECK(rtc_gpio_pulldown_dis(s_test_map[i]));
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RTCIO_CHECK(rtc_gpio_pullup_en(s_test_map[i]));
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} else {
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RTCIO_CHECK(rtc_gpio_pullup_dis(s_test_map[i]));
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RTCIO_CHECK(rtc_gpio_pulldown_en(s_test_map[i]));
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}
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vTaskDelay(20 / portTICK_PERIOD_MS);
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if (rtc_gpio_get_level(s_test_map[i]) != level) {
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ESP_LOGE(TAG, "RTCIO pullup/pulldown test err, gpio%d", s_test_map[i]);
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TEST_FAIL();
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}
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}
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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}
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// Deinit rtcio
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for (int i = 0; i < TEST_GPIO_PIN_COUNT; i++) {
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int num = rtc_io_number_get(s_test_map[i]);
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if (rtc_gpio_is_valid_gpio(s_test_map[i]) && num > 0 && RTCIO_SUPPORT_PU_PD(num)) {
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RTCIO_CHECK(rtc_gpio_deinit(s_test_map[i]));
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}
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}
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ESP_LOGI(TAG, "RTCIO pullup/pulldown test over");
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}
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/*
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* Test output OD function.
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*/
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TEST_CASE("RTCIO_output_OD_test", "[rtcio]")
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{
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ESP_LOGI(TAG, "RTCIO output OD test");
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// init rtcio
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_init(i));
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RTCIO_CHECK(rtc_gpio_set_direction(i, RTC_GPIO_MODE_INPUT_OUTPUT_OD));
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RTCIO_CHECK(rtc_gpio_pullup_en(i));
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RTCIO_CHECK(rtc_gpio_pulldown_dis(i));
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ESP_LOGI(TAG, "gpio %d init", i);
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}
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}
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for (int cnt = 0; cnt < TEST_COUNT; cnt++) {
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int level = cnt % 2;
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ESP_LOGI(TAG, "RTCIO output level %d", level);
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_set_level(i, level));
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vTaskDelay(10 / portTICK_PERIOD_MS);
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if (rtc_gpio_get_level(i) != level) {
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ESP_LOGE(TAG, "RTCIO output OD test err, gpio%d", i);
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TEST_FAIL();
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}
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}
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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}
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// Deinit rtcio
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_deinit(i));
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}
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}
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ESP_LOGI(TAG, "RTCIO output OD test over");
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}
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#if SOC_RTCIO_HOLD_SUPPORTED
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/*
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* Test rtcio hold function.
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*/
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TEST_CASE("RTCIO_output_hold_test", "[rtcio]")
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{
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ESP_LOGI(TAG, "RTCIO output hold test");
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// init rtcio
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_init(i));
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RTCIO_CHECK(rtc_gpio_set_direction(i, RTC_GPIO_MODE_INPUT_OUTPUT_OD));
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RTCIO_CHECK(rtc_gpio_pullup_en(i));
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RTCIO_CHECK(rtc_gpio_pulldown_dis(i));
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RTCIO_CHECK(rtc_gpio_set_level(i, 1));
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ESP_LOGI(TAG, "gpio %d init, level 1", i);
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}
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}
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// hold all output rtcio.
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_hold_en(i));
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vTaskDelay(10 / portTICK_PERIOD_MS);
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RTCIO_CHECK(rtc_gpio_set_level(i, 0));
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ESP_LOGI(TAG, "RTCIO output pin hold, then set level 0");
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vTaskDelay(10 / portTICK_PERIOD_MS);
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if (rtc_gpio_get_level(i) == 0) {
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ESP_LOGE(TAG, "RTCIO hold test err, gpio%d", i);
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TEST_FAIL();
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}
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}
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}
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// unhold all rtcio.
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_hold_dis(i));
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}
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}
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// check the unhold status
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for (int cnt = 0; cnt < 4; cnt++) {
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int level = cnt % 2;
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ESP_LOGI(TAG, "RTCIO output level %d", level);
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_set_level(i, level));
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vTaskDelay(10 / portTICK_PERIOD_MS);
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if (rtc_gpio_get_level(i) != level) {
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ESP_LOGE(TAG, "RTCIO output OD test err, gpio%d", i);
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TEST_FAIL();
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}
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}
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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}
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// Deinit rtcio
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for (int i = 0; i < GPIO_PIN_COUNT; i++) {
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if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
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RTCIO_CHECK(rtc_gpio_deinit(i));
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}
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}
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ESP_LOGI(TAG, "RTCIO hold test over");
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}
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#endif //SOC_RTCIO_HOLD_SUPPORTED
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#endif //SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4) // TODO: IDF-7529
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// It is not necessary to test every rtcio pin, it will take too much ci testing time for deep sleep
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// Only tests on s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX] pin
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// (ESP32: IO25, ESP32S2, S3: IO6, C6: IO5, H2: IO12) these pads' default configuration is low level
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#define TEST_RTCIO_DEEP_SLEEP_PIN_INDEX 5
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static void rtcio_deep_sleep_hold_test_first_stage(void)
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{
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printf("configure rtcio pin to hold during deep sleep");
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int io_num = s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX];
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TEST_ESP_OK(esp_sleep_enable_timer_wakeup(2000000));
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gpio_config_t io_conf = {
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.intr_type = GPIO_INTR_DISABLE,
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.mode = GPIO_MODE_INPUT_OUTPUT,
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.pin_bit_mask = (1ULL << io_num),
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.pull_down_en = 0,
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.pull_up_en = 0,
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};
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gpio_config(&io_conf);
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gpio_set_level(io_num, 1);
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// Enable global persistence
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TEST_ESP_OK(gpio_hold_en(io_num));
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esp_deep_sleep_start();
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}
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static void rtcio_deep_sleep_hold_test_second_stage(void)
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{
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int io_num = s_test_map[TEST_RTCIO_DEEP_SLEEP_PIN_INDEX];
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// Check reset reason is waking up from deepsleep
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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// Pin should stay at high level after the deep sleep
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TEST_ASSERT_EQUAL_INT(1, gpio_get_level(io_num));
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gpio_hold_dis(io_num);
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}
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/*
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* Test rtcio hold function during deep sleep.
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* This test case can only check the hold state after waking up from deep sleep
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* If you want to check that the rtcio hold function works properly during deep sleep,
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* please use logic analyzer or oscilloscope
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*/
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TEST_CASE_MULTIPLE_STAGES("RTCIO_deep_sleep_output_hold_test", "[rtcio]",
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rtcio_deep_sleep_hold_test_first_stage,
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rtcio_deep_sleep_hold_test_second_stage)
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#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
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