kopia lustrzana https://github.com/espressif/esp-idf
121 wiersze
4.1 KiB
C
121 wiersze
4.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include "bootloader_console.h"
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#include "soc/uart_periph.h"
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#include "soc/uart_channel.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_periph.h"
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#include "soc/gpio_sig_map.h"
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#include "soc/rtc.h"
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#include "hal/clk_gate_ll.h"
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#include "hal/gpio_hal.h"
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#if CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/usb/cdc_acm.h"
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#include "esp32s2/rom/usb/usb_common.h"
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/ets_sys.h"
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#include "esp32c3/rom/uart.h"
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/uart.h"
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#elif CONFIG_IDF_TARGET_ESP32H4
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#include "esp32h4/rom/ets_sys.h"
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#include "esp32h4/rom/uart.h"
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#elif CONFIG_IDF_TARGET_ESP32C2
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#include "esp32c2/rom/ets_sys.h"
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#include "esp32c2/rom/uart.h"
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#elif CONFIG_IDF_TARGET_ESP32C6
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#include "esp32c6/rom/ets_sys.h"
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#include "esp32c6/rom/uart.h"
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#endif
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#include "esp_rom_gpio.h"
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#include "esp_rom_uart.h"
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#include "esp_rom_sys.h"
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#include "esp_rom_caps.h"
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#ifdef CONFIG_ESP_CONSOLE_NONE
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void bootloader_console_init(void)
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{
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esp_rom_install_channel_putc(1, NULL);
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esp_rom_install_channel_putc(2, NULL);
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}
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#endif // CONFIG_ESP_CONSOLE_NONE
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#ifdef CONFIG_ESP_CONSOLE_UART
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void bootloader_console_init(void)
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{
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const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
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// Install rom uart printf as console.
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esp_rom_install_uart_printf();
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// Wait for UART FIFO to be empty.
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esp_rom_uart_tx_wait_idle(0);
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#if CONFIG_ESP_CONSOLE_UART_CUSTOM
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// Some constants to make the following code less upper-case
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const int uart_tx_gpio = CONFIG_ESP_CONSOLE_UART_TX_GPIO;
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const int uart_rx_gpio = CONFIG_ESP_CONSOLE_UART_RX_GPIO;
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// If console is attached to UART1 or if non-default pins are used,
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// need to reconfigure pins using GPIO matrix
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if (uart_num != 0 ||
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uart_tx_gpio != UART_NUM_0_TXD_DIRECT_GPIO_NUM ||
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uart_rx_gpio != UART_NUM_0_RXD_DIRECT_GPIO_NUM) {
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// Change default UART pins back to GPIOs
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gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0RXD_U, PIN_FUNC_GPIO);
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gpio_hal_iomux_func_sel(PERIPHS_IO_MUX_U0TXD_U, PIN_FUNC_GPIO);
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// Route GPIO signals to/from pins
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const uint32_t tx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_TX_PIN_IDX);
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const uint32_t rx_idx = UART_PERIPH_SIGNAL(uart_num, SOC_UART_RX_PIN_IDX);
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO);
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PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
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esp_rom_gpio_pad_pullup_only(uart_rx_gpio);
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esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0);
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esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0);
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
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// Enable the peripheral
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periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + uart_num);
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}
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#endif // CONFIG_ESP_CONSOLE_UART_CUSTOM
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// Set configured UART console baud rate
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uint32_t clock_hz = rtc_clk_apb_freq_get();
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#if ESP_ROM_UART_CLK_IS_XTAL
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clock_hz = (uint32_t)rtc_clk_xtal_freq_get() * MHZ; // From esp32-s3 on, UART clk source is selected to XTAL in ROM
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#endif
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esp_rom_uart_set_clock_baudrate(uart_num, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
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}
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#endif // CONFIG_ESP_CONSOLE_UART
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#ifdef CONFIG_ESP_CONSOLE_USB_CDC
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/* Buffer for CDC data structures. No RX buffer allocated. */
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static char s_usb_cdc_buf[ESP_ROM_CDC_ACM_WORK_BUF_MIN];
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void bootloader_console_init(void)
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{
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#ifdef CONFIG_IDF_TARGET_ESP32S2
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/* ESP32-S2 specific patch to set the correct serial number in the descriptor.
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* Later chips don't need this.
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*/
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rom_usb_cdc_set_descriptor_patch();
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#endif
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esp_rom_uart_usb_acm_init(s_usb_cdc_buf, sizeof(s_usb_cdc_buf));
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esp_rom_uart_set_as_console(ESP_ROM_UART_USB);
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esp_rom_install_channel_putc(1, bootloader_console_write_char_usb);
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}
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#endif //CONFIG_ESP_CONSOLE_USB_CDC
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#ifdef CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
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void bootloader_console_init(void)
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{
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UartDevice *uart = GetUartDevice();
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uart->buff_uart_no = ESP_ROM_USB_SERIAL_DEVICE_NUM;
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}
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#endif //CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
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