kopia lustrzana https://github.com/espressif/esp-idf
824c8e0593
This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:
- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data
If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):
.dram0.bss (NOLOAD) :
{
arrays[dram0_bss]
mapping[dram0_bss]
} > sram_low
.dram1.bss (NOLOAD) :
{
/* do not place here arrays[dram0_bss] because it may be splited
* between segments */
mapping[dram0_bss]
} > sram_high
|
||
|---|---|---|
| .. | ||
| esp32 | ||
| esp32c2 | ||
| esp32c3 | ||
| esp32c5 | ||
| esp32c6 | ||
| esp32h2 | ||
| esp32p4 | ||
| esp32s2 | ||
| esp32s3 | ||
| include/soc | ||
| linux/include/soc | ||
| CMakeLists.txt | ||
| Kconfig | ||
| README.md | ||
| dport_access_common.c | ||
| linker.lf | ||
| lldesc.c | ||
README.md
soc
The soc component provides hardware description for targets supported by ESP-IDF.
- `xxx_reg.h` - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h` - features/capabilities of the hardware
- `xxx_pins.h` - pin definitions
- `xxx_periph.h/*.c` - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware