kopia lustrzana https://github.com/espressif/esp-idf
75 wiersze
1.9 KiB
C
75 wiersze
1.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The LL layer for ESP32-H2 LP CLKRST & LP PERI register operations
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#pragma once
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#include <stdbool.h>
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#include <stdlib.h>
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#include "soc/soc.h"
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#include "soc/lp_clkrst_struct.h"
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#include "soc/lpperi_struct.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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__attribute__((always_inline))
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static inline void lp_clkrst_ll_enable_ble_rtc_timer_slow_osc(lp_clkrst_dev_t *hw, bool en)
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{
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hw->lpperi.lp_sel_osc_slow = en;
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}
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__attribute__((always_inline))
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static inline void lp_clkrst_ll_enable_ble_rtc_timer_fast_osc(lp_clkrst_dev_t *hw, bool en)
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{
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hw->lpperi.lp_sel_osc_fast = en;
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}
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__attribute__((always_inline))
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static inline void lp_clkrst_ll_enable_ble_rtc_timer_main_xtal(lp_clkrst_dev_t *hw, bool en)
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{
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hw->lpperi.lp_sel_xtal = en;
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}
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__attribute__((always_inline))
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static inline void lp_clkrst_ll_enable_ble_rtc_timer_32k_xtal(lp_clkrst_dev_t *hw, bool en)
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{
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hw->lpperi.lp_sel_xtal32k = en;
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}
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__attribute__((always_inline))
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static inline void lp_clkrst_ll_set_ble_rtc_timer_divisor_value(lp_clkrst_dev_t *hw, uint32_t value)
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{
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hw->lpperi.lp_bletimer_div_num = value;
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}
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__attribute__((always_inline))
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static inline uint32_t lp_clkrst_ll_get_ble_rtc_timer_divisor_value(lp_clkrst_dev_t *hw)
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{
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return hw->lpperi.lp_bletimer_div_num;
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}
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__attribute__((always_inline))
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static inline void lp_clkrst_ll_select_modem_32k_clock_source(lp_clkrst_dev_t *hw, uint32_t src)
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{
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hw->lpperi.lp_bletimer_32k_sel = src;
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}
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__attribute__((always_inline))
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static inline void _lp_clkrst_ll_enable_rng_clock(bool en)
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{
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LPPERI.clk_en.rng_ck_en = en;
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}
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/// LPPERI.clk_en is a shared register, so this function must be used in an atomic way
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#define lp_clkrst_ll_enable_rng_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _lp_clkrst_ll_enable_rng_clock(__VA_ARGS__)
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#ifdef __cplusplus
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}
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#endif
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