esp-idf

Historia

morris 49e7228be9 feat(gptimer): basic driver support on esp32c5		2024-02-19 10:27:18 +08:00
..
esp32	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32c2	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32c3	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32c5	feat(gptimer): basic driver support on esp32c5	2024-02-19 10:27:18 +08:00
esp32c6	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32h2	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32p4	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32s2	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
esp32s3	refactor(uart): add support to be able to test LP_UART port	2024-02-07 14:37:48 +08:00
include/soc	Merge branch 'feat/csi_driver' into 'master'	2024-02-05 09:59:35 +08:00
linux/include/soc	feat(esp32c5): support esp32c5 g0 components	2023-12-08 15:12:24 +08:00
CMakeLists.txt	feat(csi): added csi driver	2024-02-04 19:06:11 +08:00
Kconfig	mmu: support configurable mmu page size	2023-03-04 02:48:40 +00:00
README.md	…
dport_access_common.c	…
linker.lf	…
lldesc.c	…

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware