kopia lustrzana https://github.com/espressif/esp-idf
106 wiersze
4.6 KiB
C
106 wiersze
4.6 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Peripheral 0 Modules
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*
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*/
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#define DR_REG_UART0_BASE 0x60000000
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#define DR_REG_UART1_BASE 0x60001000
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#define DR_REG_SPIMEM0_BASE 0x60002000
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#define DR_REG_SPIMEM1_BASE 0x60003000
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#define DR_REG_I2C0_BASE 0x60004000
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#define DR_REG_UHCI_BASE 0x60005000
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#define DR_REG_RMT_BASE 0x60006000
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#define DR_REG_LEDC_BASE 0x60007000
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#define DR_REG_TIMERG0_BASE 0x60008000
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#define DR_REG_TIMERG1_BASE 0x60009000
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#define DR_REG_SYSTIMER_BASE 0x6000A000
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#define DR_REG_TWAI0_BASE 0x6000B000
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#define DR_REG_I2S_BASE 0x6000C000
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#define DR_REG_TWAI1_BASE 0x6000D000
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#define DR_REG_APB_SARADC_BASE 0x6000E000
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#define DR_REG_USB_SERIAL_JTAG_BASE 0x6000F000
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#define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000
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#define DR_REG_INTERRUPT_CORE0_BASE DR_REG_INTERRUPT_MATRIX_BASE
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#define DR_REG_I2C1_BASE 0x60011000
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#define DR_REG_PCNT_BASE 0x60012000
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#define DR_REG_SOC_ETM_BASE 0x60013000
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#define DR_REG_MCPWM_BASE 0x60014000
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#define DR_REG_PARL_IO_BASE 0x60015000
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#define DR_REG_PVT_MONITOR_BASE 0x60019000
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/**
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* @brief Peripheral 1 Modules
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*
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*/
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#define DR_REG_GDMA_BASE 0x60080000
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#define DR_REG_GPSPI2_BASE 0x60081000
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#define DR_REG_BITSCRAMBLER_BASE 0x60082000
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#define DR_REG_KEYMNG_BASE 0x60087000
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#define DR_REG_AES_BASE 0x60088000
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#define DR_REG_SHA_BASE 0x60089000
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#define DR_REG_RSA_BASE 0x6008A000
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#define DR_REG_ECC_MULT_BASE 0x6008B000
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#define DR_REG_DS_BASE 0x6008C000
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#define DR_REG_HMAC_BASE 0x6008D000
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#define DR_REG_ECDSA_BASE 0x6008E000
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/**
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* @brief HP Top Peripheral Modules
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*
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*/
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#define DR_REG_IO_MUX_BASE 0x60090000
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#define DR_REG_GPIO_BASE 0x60091000
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#define DR_REG_MEM_MONITOR_BASE 0x60092000
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#define DR_REG_PAU_BASE 0x60093000
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#define DR_REG_HP_SYS_BASE 0x60095000
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#define DR_REG_PCR_BASE 0x60096000
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#define DR_REG_TEE_BASE 0x60098000
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#define DR_REG_HP_APM_BASE 0x60099000
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#define DR_REG_LP_APM0_BASE 0x60099800
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#define DR_REG_MISC_BASE 0x6009F000
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/**
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* @brief Modem Module
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*
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*/
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#define DR_REG_MODEM_BASE 0x600A4000
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#define DR_REG_MODEM_PWR_BASE 0x600AD000
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#define DR_REG_I2C_ANA_MST_BASE 0x600AF800
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#define PWDET_CONF_REG 0x600A0810
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/**
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* @brief LP System (RTC) Modules
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*
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*/
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#define DR_REG_PMU_BASE 0x600B0000
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#define DR_REG_LP_CLKRST_BASE 0x600B0400
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#define DR_REG_EFUSE_BASE 0x600B0800
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#define DR_REG_LP_TIMER_BASE 0x600B0C00
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#define DR_REG_LP_AON_BASE 0x600B1000
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#define DR_REG_LP_UART_BASE 0x600B1400
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#define DR_REG_LP_I2C_BASE 0x600B1800
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#define DR_REG_LP_WDT_BASE 0x600B1C00
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#define DR_REG_LP_IO_BASE 0x600B2000
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#define DR_REG_LP_I2C_ANA_MST_BASE 0x600B2400
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#define DR_REG_LPPERI_BASE 0x600B2800
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#define DR_REG_LP_ANA_BASE 0x600B2C00
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#define DR_REG_HUK_BASE 0x600B3000
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#define DR_REG_LP_TEE_BASE 0x600B3400
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#define DR_REG_LP_APM_BASE 0x600B3800
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#define DR_REG_OTP_DEBUG_BASE 0x600B3C00
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/**
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* @brief CPU Peripheral Modules
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*
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*/
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#define DR_REG_TRACE_BASE 0x600C0000
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#define DR_REG_ASSIST_DEBUG_BASE 0x600C2000
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#define DR_REG_INTPRI_BASE 0x600C5000
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#define DR_REG_CACHE_BASE 0x600C8000 // CACHE_CONFIG/EXTMEM
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#define DR_REG_CLINT_M_BASE 0x20000000
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