kopia lustrzana https://github.com/espressif/esp-idf
76 wiersze
3.4 KiB
C
76 wiersze
3.4 KiB
C
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "sdkconfig.h"
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#include "hal/interrupt_controller_hal.h"
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#include "hal/interrupt_controller_ll.h"
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#include "soc/soc_caps.h"
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#include "soc/soc.h"
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//We should mark the interrupt for the timer used by FreeRTOS as reserved. The specific timer
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//is selectable using menuconfig; we use these cpp bits to convert that into something we can use in
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//the table below.
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#if CONFIG_FREERTOS_CORETIMER_0
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#define INT6RES INTDESC_RESVD
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#else
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#define INT6RES INTDESC_SPECIAL
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#endif
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#if CONFIG_FREERTOS_CORETIMER_1
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#define INT15RES INTDESC_RESVD
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#else
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#define INT15RES INTDESC_SPECIAL
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#endif
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//This is basically a software-readable version of the interrupt usage table in include/soc/soc.h
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const static int_desc_t interrupt_descriptor_table [32]={
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //0
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //1
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //2
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //3
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //4
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //5
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{ 1, INTTP_NA, {INT6RES, INT6RES } }, //6
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{ 1, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //7
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //8
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //9
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{ 1, INTTP_EDGE , {INTDESC_NORMAL, INTDESC_NORMAL} }, //10
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{ 3, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //11
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //12
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //13
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{ 7, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //14, NMI
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{ 3, INTTP_NA, {INT15RES, INT15RES } }, //15
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{ 5, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL} }, //16
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //17
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //18
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{ 2, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //19
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{ 2, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //20
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{ 2, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //21
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{ 3, INTTP_EDGE, {INTDESC_RESVD, INTDESC_NORMAL} }, //22
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{ 3, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //23
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{ 4, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //24
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{ 4, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //25
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{ 5, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_RESVD } }, //26
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{ 3, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //27
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{ 4, INTTP_EDGE, {INTDESC_NORMAL, INTDESC_NORMAL} }, //28
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{ 3, INTTP_NA, {INTDESC_SPECIAL,INTDESC_SPECIAL}}, //29
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{ 4, INTTP_EDGE, {INTDESC_RESVD, INTDESC_RESVD } }, //30
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{ 5, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //31
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};
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const int_desc_t *interrupt_controller_hal_desc_table(void)
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{
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return interrupt_descriptor_table;
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}
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