esp-idf/components/soc
wuzhenghui 7521a51845
fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep
2024-05-28 17:56:56 +08:00
..
esp32 ci(mbedtls): added a test for the mbedtls_internal_shaX_process API 2023-12-05 16:54:31 +05:30
esp32c3 fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep 2024-05-28 17:56:56 +08:00
esp32h2 fix(i2s): fixed incorrect reg base name on C3 2024-01-26 18:45:19 +08:00
esp32s2 fix(spi): Correct REG_SPI_BASE(i) macro for all targets 2023-12-22 15:08:45 +08:00
esp32s3 [S3]fix(rtc_cntl_reg.h): fix RTC_CNTL_SLAVE_PD_M 2024-04-10 19:39:59 +08:00
include/soc fix(esp_hw_support): Fix different signed comparison in `esp_ptr_in_drom` 2023-12-11 10:21:27 +05:30
CMakeLists.txt Merge branch 'refactor/move_ldscript_to_soc' into 'master' 2021-07-23 11:54:56 +00:00
README.md
component.mk soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
linker.lf
lldesc.c
soc_include_legacy_warn.c

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware