kopia lustrzana https://github.com/espressif/esp-idf
180 wiersze
6.0 KiB
C
180 wiersze
6.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <sys/param.h> // For MIN/MAX
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#include "esp_log.h"
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#include "spi_flash_chip_generic.h"
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#include "spi_flash_chip_gd.h"
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#include "spi_flash_defs.h"
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#include "sdkconfig.h"
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#define ADDR_32BIT(addr) (addr >= (1<<24))
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#define REGION_32BIT(start, len) ((start) + (len) > (1<<24))
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extern esp_err_t spi_flash_chip_winbond_read(esp_flash_t *chip, void *buffer, uint32_t address, uint32_t length);
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extern esp_err_t spi_flash_chip_winbond_page_program(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length);
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extern esp_err_t spi_flash_chip_winbond_erase_sector(esp_flash_t *chip, uint32_t start_address);
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extern esp_err_t spi_flash_chip_winbond_erase_block(esp_flash_t *chip, uint32_t start_address);
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#define spi_flash_chip_gd_read spi_flash_chip_winbond_read
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#define spi_flash_chip_gd_page_program spi_flash_chip_winbond_page_program
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#define spi_flash_chip_gd_erase_sector spi_flash_chip_winbond_erase_sector
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#define spi_flash_chip_gd_erase_block spi_flash_chip_winbond_erase_block
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spi_flash_caps_t spi_flash_chip_gd_get_caps(esp_flash_t *chip)
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{
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spi_flash_caps_t caps_flags = 0;
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// 32M-bits address support
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if ((chip->chip_id & 0xFF) >= 0x19) {
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caps_flags |= SPI_FLASH_CHIP_CAP_32MB_SUPPORT;
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}
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#if CONFIG_SPI_FLASH_AUTO_SUSPEND
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switch (chip->chip_id) {
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/* The flash listed here can support suspend */
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case 0xC84017:
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case 0xC84018:
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caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
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break;
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default:
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break;
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}
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#endif
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// flash-suspend is not supported
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// flash read unique id.
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caps_flags |= SPI_FLASH_CHIP_CAP_UNIQUE_ID;
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return caps_flags;
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}
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esp_err_t spi_flash_chip_gd_detect_size(esp_flash_t *chip, uint32_t *size)
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{
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uint32_t id = chip->chip_id;
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*size = 0;
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/* Can't detect size unless the high byte of the product ID matches the same convention, which is usually 0x40 or
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* 0xC0 or similar. */
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if (((id & 0xFFFF) == 0x0000) || ((id & 0xFFFF) == 0xFFFF)) {
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return ESP_ERR_FLASH_UNSUPPORTED_CHIP;
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}
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*size = 1 << (id & 0xFF);
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return ESP_OK;
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}
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#ifndef CONFIG_SPI_FLASH_ROM_IMPL
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#define FLASH_ID_MASK 0xFF00
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#define FLASH_SIZE_MASK 0xFF
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#define GD25Q_PRODUCT_ID 0x4000
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#define GD25LQ_PRODUCT_ID 0x6000
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#define WRSR_16B_REQUIRED(chip_id) (((chip_id) & FLASH_ID_MASK) == GD25LQ_PRODUCT_ID || \
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((chip_id) & FLASH_SIZE_MASK) <= 0x15)
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/* Driver for GD flash chip */
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esp_err_t spi_flash_chip_gd_probe(esp_flash_t *chip, uint32_t flash_id)
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{
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/* Check manufacturer and product IDs match our desired masks */
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const uint8_t MFG_ID = 0xC8;
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if (flash_id >> 16 != MFG_ID) {
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return ESP_ERR_NOT_FOUND;
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}
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uint32_t product_id = flash_id & FLASH_ID_MASK;
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if (product_id != GD25Q_PRODUCT_ID && product_id != GD25LQ_PRODUCT_ID) {
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return ESP_ERR_NOT_FOUND;
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}
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return ESP_OK;
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}
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esp_err_t spi_flash_chip_gd_set_io_mode(esp_flash_t *chip)
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{
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if (WRSR_16B_REQUIRED(chip->chip_id)) {
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const uint32_t qe = 1<<9;
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return spi_flash_common_set_io_mode(chip,
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spi_flash_common_write_status_16b_wrsr,
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spi_flash_common_read_status_16b_rdsr_rdsr2,
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qe);
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} else {
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const uint32_t qe = 1<<1;
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return spi_flash_common_set_io_mode(chip,
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spi_flash_common_write_status_8b_wrsr2,
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spi_flash_common_read_status_8b_rdsr2,
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qe);
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}
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}
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esp_err_t spi_flash_chip_gd_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t* out_io_mode)
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{
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/* GD uses bit 1 of SR2 as Quad Enable */
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const uint8_t BIT_QE = 1 << 1;
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uint32_t sr;
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esp_err_t ret = spi_flash_common_read_status_8b_rdsr2(chip, &sr);
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if (ret == ESP_OK) {
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*out_io_mode = ((sr & BIT_QE)? SPI_FLASH_QOUT: 0);
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}
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return ret;
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}
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#endif //CONFIG_SPI_FLASH_ROM_IMPL
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esp_err_t spi_flash_chip_gd_suspend_cmd_conf(esp_flash_t *chip)
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{
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spi_flash_sus_cmd_conf sus_conf = {
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.sus_mask = 0x84,
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.cmd_rdsr = CMD_RDSR2,
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.sus_cmd = CMD_SUSPEND,
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.res_cmd = CMD_RESUME,
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};
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return chip->host->driver->sus_setup(chip->host, &sus_conf);
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}
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static const char chip_name[] = "gd";
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// The issi chip can use the functions for generic chips except from set read mode and probe,
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// So we only replace these two functions.
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const spi_flash_chip_t esp_flash_chip_gd = {
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.name = chip_name,
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.timeout = &spi_flash_chip_generic_timeout,
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.probe = spi_flash_chip_gd_probe,
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.reset = spi_flash_chip_generic_reset,
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.detect_size = spi_flash_chip_gd_detect_size,
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.erase_chip = spi_flash_chip_generic_erase_chip,
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.erase_sector = spi_flash_chip_gd_erase_sector,
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.erase_block = spi_flash_chip_gd_erase_block,
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.sector_size = 4 * 1024,
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.block_erase_size = 64 * 1024,
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.get_chip_write_protect = spi_flash_chip_generic_get_write_protect,
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.set_chip_write_protect = spi_flash_chip_generic_set_write_protect,
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.num_protectable_regions = 0,
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.protectable_regions = NULL,
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.get_protected_regions = NULL,
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.set_protected_regions = NULL,
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.read = spi_flash_chip_gd_read,
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.write = spi_flash_chip_generic_write,
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.program_page = spi_flash_chip_gd_page_program,
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.page_size = 256,
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.write_encrypted = spi_flash_chip_generic_write_encrypted,
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.wait_idle = spi_flash_chip_generic_wait_idle,
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.set_io_mode = spi_flash_chip_gd_set_io_mode,
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.get_io_mode = spi_flash_chip_gd_get_io_mode,
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.read_reg = spi_flash_chip_generic_read_reg,
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.yield = spi_flash_chip_generic_yield,
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.sus_setup = spi_flash_chip_gd_suspend_cmd_conf,
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.read_unique_id = spi_flash_chip_generic_read_unique_id,
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.get_chip_caps = spi_flash_chip_gd_get_caps,
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.config_host_io_mode = spi_flash_chip_generic_config_host_io_mode,
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};
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