kopia lustrzana https://github.com/espressif/esp-idf
132 wiersze
4.2 KiB
C
132 wiersze
4.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/assert.h"
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#include "hal/apm_hal.h"
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#include "hal/apm_ll.h"
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#include "hal/log.h"
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void apm_tee_hal_set_master_secure_mode(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_master_id_t master_id, apm_ll_secure_mode_t sec_mode)
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{
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apm_tee_ll_set_master_secure_mode(apm_ctrl, master_id, sec_mode);
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}
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void apm_tee_hal_clk_gating_enable(bool enable)
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{
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apm_tee_ll_clk_gating_enable(enable);
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}
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void apm_hal_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, bool enable)
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{
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apm_ll_apm_ctrl_region_filter_enable(apm_ctrl, regn_num, enable);
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}
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void apm_hal_apm_ctrl_filter_enable(apm_ctrl_path_t *apm_path, bool enable)
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{
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apm_ll_apm_ctrl_filter_enable(apm_path->apm_ctrl, apm_path->apm_m_path, enable);
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}
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void apm_hal_apm_ctrl_filter_enable_all(bool enable)
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{
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apm_ctrl_path_t apm_path;
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for (int i = 0; i < HP_APM_MAX_ACCESS_PATH; i++) {
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apm_path.apm_ctrl = HP_APM_CTRL;
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apm_path.apm_m_path = i;
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apm_hal_apm_ctrl_filter_enable(&apm_path, enable);
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}
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for (int i = 0; i < LP_APM_MAX_ACCESS_PATH; i++) {
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apm_path.apm_ctrl = LP_APM_CTRL;
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apm_path.apm_m_path = i;
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apm_hal_apm_ctrl_filter_enable(&apm_path, enable);
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}
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#if CONFIG_IDF_TARGET_ESP32C6
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for (int i = 0; i < LP_APM0_MAX_ACCESS_PATH; i++) {
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apm_path.apm_ctrl = LP_APM0_CTRL;
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apm_path.apm_m_path = i;
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apm_hal_apm_ctrl_filter_enable(&apm_path, enable);
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}
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#endif
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}
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void apm_hal_apm_ctrl_region_config(const apm_ctrl_region_config_data_t *pms_data)
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{
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HAL_ASSERT(pms_data);
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apm_ll_apm_ctrl_set_region_start_address(pms_data->apm_ctrl, pms_data->regn_num, pms_data->regn_start_addr);
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apm_ll_apm_ctrl_set_region_end_address(pms_data->apm_ctrl, pms_data->regn_num, pms_data->regn_end_addr);
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apm_ll_apm_ctrl_sec_mode_region_attr_config(pms_data->apm_ctrl, pms_data->regn_num, pms_data->sec_mode, pms_data->regn_pms);
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}
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uint8_t apm_hal_apm_ctrl_exception_status(apm_ctrl_path_t *apm_path)
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{
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return apm_ll_apm_ctrl_exception_status(apm_path->apm_ctrl, apm_path->apm_m_path);
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}
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void apm_hal_apm_ctrl_exception_clear(apm_ctrl_path_t *apm_path)
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{
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apm_ll_apm_ctrl_exception_clear(apm_path->apm_ctrl, apm_path->apm_m_path);
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}
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void apm_hal_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info)
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{
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apm_ll_apm_ctrl_get_exception_info(excp_info);
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}
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void apm_hal_apm_ctrl_interrupt_enable(apm_ctrl_path_t *apm_path, bool enable)
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{
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apm_ll_apm_ctrl_interrupt_enable(apm_path->apm_ctrl, apm_path->apm_m_path, enable);
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}
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void apm_hal_apm_ctrl_clk_gating_enable(apm_ll_apm_ctrl_t apm_ctrl, bool enable)
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{
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apm_ll_apm_ctrl_clk_gating_enable(apm_ctrl, enable);
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}
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void apm_hal_apm_ctrl_master_sec_mode_config(apm_ctrl_secure_mode_config_t *sec_mode_data)
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{
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apm_ctrl_path_t apm_path;
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/* Configure given secure mode for all specified Masters. */
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for (int i = 0; i < APM_LL_MASTER_MAX; i++) {
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if (sec_mode_data->master_ids & (1 << i)) {
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apm_tee_hal_set_master_secure_mode(sec_mode_data->apm_ctrl, i, sec_mode_data->sec_mode);
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}
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}
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/* Configure the given APM Ctrl for all Masters for the:
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* - Secure mode,
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* - Regions range,
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* - access permissions and
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* - region filter
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*/
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for (int i = 0; i < sec_mode_data->regn_count; i++) {
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sec_mode_data->pms_data[i].sec_mode = sec_mode_data->sec_mode;
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sec_mode_data->pms_data[i].apm_ctrl = sec_mode_data->apm_ctrl;
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apm_hal_apm_ctrl_region_config(&sec_mode_data->pms_data[i]);
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apm_hal_apm_ctrl_region_filter_enable(sec_mode_data->pms_data[i].apm_ctrl, i,
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sec_mode_data->pms_data[i].filter_enable);
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}
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/* Configure APM Ctrl access path(M[0:n]) */
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for (int i = 0; i < sec_mode_data->apm_m_cnt; i++) {
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apm_path.apm_ctrl = sec_mode_data->apm_ctrl;
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apm_path.apm_m_path = i;
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apm_hal_apm_ctrl_filter_enable(&apm_path, 1);
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}
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}
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void apm_hal_apm_ctrl_reset_event_enable(bool enable)
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{
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apm_ll_apm_ctrl_reset_event_enable(enable);
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}
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esp_err_t apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path)
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{
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return apm_ll_apm_ctrl_get_int_src_num(apm_path->apm_ctrl, apm_path->apm_m_path);
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}
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