kopia lustrzana https://github.com/espressif/esp-idf
120 wiersze
3.1 KiB
C
120 wiersze
3.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <string.h>
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#include <sys/lock.h>
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#include <sys/param.h>
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#include "esp_attr.h"
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#include "esp_sleep.h"
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#include "esp_cpu.h"
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#include "soc/soc.h"
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#include "soc/rtc.h"
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#include "soc/soc_caps.h"
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#include "hal/uart_ll.h"
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#include "hal/clk_tree_ll.h"
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#if SOC_LP_TIMER_SUPPORTED
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#include "hal/lp_timer_ll.h"
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#include "hal/lp_timer_hal.h"
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#else
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#include "hal/rtc_cntl_ll.h"
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#endif
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#if SOC_PMU_SUPPORTED
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#include "hal/pmu_ll.h"
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#endif
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#include "sdkconfig.h"
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#include "esp_rom_uart.h"
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#include "esp_rom_sys.h"
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#ifdef CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C6
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#include "esp32c6/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32H2
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#include "esp32h2/rom/rtc.h"
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#endif
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void RTC_IRAM_ATTR esp_wake_stub_sleep(esp_deep_sleep_wake_stub_fn_t new_stub)
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{
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#if CONFIG_IDF_TARGET_ESP32
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// Since the app core of esp32 does not support access to RTC_FAST_MEMORY,
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// `esp_set_deep_sleep_wake_stub` is not declared in RTC_FAST_MEMORY,
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// so we cannot call it here
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REG_WRITE(RTC_ENTRY_ADDR_REG, (uint32_t)new_stub);
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#else
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esp_set_deep_sleep_wake_stub(new_stub);
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#endif
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#if SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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esp_set_deep_sleep_wake_stub_default_entry();
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#else
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set_rtc_memory_crc();
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#endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_MEM
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// Go to sleep.
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#if SOC_PMU_SUPPORTED
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pmu_ll_hp_clear_wakeup_intr_status(&PMU);
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pmu_ll_hp_clear_reject_intr_status(&PMU);
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pmu_ll_hp_clear_reject_cause(&PMU);
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pmu_ll_hp_set_sleep_enable(&PMU);
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#else
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rtc_cntl_ll_sleep_enable();
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#endif
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// A few CPU cycles may be necessary for the sleep to start...
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#if __XTENSA__
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xt_utils_wait_for_intr();
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#else
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rv_utils_wait_for_intr();
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#endif // __XTENSA__
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// never reaches here.
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}
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void RTC_IRAM_ATTR esp_wake_stub_uart_tx_wait_idle(uint8_t uart_no)
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{
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while (!uart_ll_is_tx_idle(UART_LL_GET_HW(uart_no))) {};
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}
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void RTC_IRAM_ATTR esp_wake_stub_set_wakeup_time(uint64_t time_in_us)
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{
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uint64_t rtc_count_delta = time_in_us * (1 << RTC_CLK_CAL_FRACT) / clk_ll_rtc_slow_load_cal();
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#if SOC_LP_TIMER_SUPPORTED
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lp_timer_ll_counter_snapshot(&LP_TIMER);
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uint32_t lo = lp_timer_ll_get_counter_value_low(&LP_TIMER, 0);
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uint32_t hi = lp_timer_ll_get_counter_value_high(&LP_TIMER, 0);
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uint64_t rtc_curr_count = (uint64_t)hi << 32 | lo;
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lp_timer_ll_clear_alarm_intr_status(&LP_TIMER);
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lp_timer_ll_set_alarm_target(&LP_TIMER, 0, rtc_curr_count + rtc_count_delta);
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lp_timer_ll_set_target_enable(&LP_TIMER, 0, true);
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#else
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uint64_t rtc_curr_count = rtc_cntl_ll_get_rtc_time();
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rtc_cntl_ll_set_wakeup_timer(rtc_curr_count + rtc_count_delta);
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#endif
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}
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uint32_t RTC_IRAM_ATTR esp_wake_stub_get_wakeup_cause(void)
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{
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#if SOC_PMU_SUPPORTED
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return pmu_ll_hp_get_wakeup_cause(&PMU);
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#else
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return rtc_cntl_ll_get_wakeup_cause();
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#endif
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}
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