Cao Sen Miao
c0e5f2b73a
fix(i2c_master): Fix issue that i2c clock got wrong after reset,
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Closes https://github.com/espressif/esp-idf/issues/13397
2024-03-21 13:13:53 +08:00
Cao Sen Miao
62a0efdd7c
feat(i2c): Add pure hal i2c master driver example
2024-01-31 11:47:14 +08:00
C.S.M
59d029bf66
Merge branch 'feat/i2c_rcc_support' into 'master'
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refactor(i2c): Add reset and clock control to i2c ll layer
See merge request espressif/esp-idf!26684
2023-10-28 10:01:06 +08:00
Cao Sen Miao
0bf1dce413
refactor(i2c): Add reset and clock control to i2c ll layer
2023-10-27 10:50:35 +08:00
morris
418494800c
fix(i2c): read write FIFO memory by volatile
2023-10-26 14:40:07 +08:00
Cao Sen Miao
8d639492f2
feat(i2c_slave): Add new implementation and API for I2C slave
2023-10-24 18:44:49 +08:00
Planck (Lu Zeyu)
255d499884
fix(ll): fix cpp compile error
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Merges https://github.com/espressif/esp-idf/pull/12093
fix(ll): remove FLAG_ATTR macro
Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Cao Sen Miao
4ef94fc0dc
feat(i2c): Add new API and implementation for I2C driver
2023-08-10 11:55:54 +08:00
Cao Sen Miao
8882ba2ba1
CI: Move all UT in driver to test_app
2023-04-25 10:40:32 +08:00
Omar Chebib
a0f8434f93
i2c: fix a bug in sda sample timing
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* Closes https://github.com/espressif/esp-idf/issues/9777
This bug prevented SCL line to work properly after a NACK was received in master mode.
2023-04-13 14:37:44 +08:00
Cao Sen Miao
803fc3fbe0
I2C: Add i2c support for ESP32C6
2022-11-07 14:12:53 +08:00
Cao Sen Miao
31b88a4c88
I2C: Refactor i2c hal and ll
2022-09-01 15:53:59 +08:00
Cao Sen Miao
53580a62b5
I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2
2022-07-19 11:41:42 +08:00
Cao Sen Miao
e218723e0e
I2C: Make I2C clock frequency accurate
2022-07-06 11:58:08 +08:00
Omar Chebib
477bc9e64c
I2C: Fix SCL period timings on ESP targets
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The output frequency is now more accurate as the SCL period timings have been fixed.
This fix applies for ESP32, ESP32S3, ESP32C3, ESP32C2 and ESP32H2
2022-05-18 05:36:08 +00:00
SalimTerryLi
874a720286
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
2021-08-30 13:50:58 +08:00
Chen Yi Qun
fbd25c3837
I2C: add conf_update for esp32c3 i2c
2021-08-11 13:39:07 +08:00
Omar Chebib
cfcbca1271
i2c: optimize space allocated for read or write buffers
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Only a single command will be allocated now when a read or write is
prepared in the command list. The size of a command's buffer is not
limited to 255 bytes anymore.
2021-06-09 15:21:20 +08:00
Cao Sen Miao
c3da21a93f
I2C: enable all unit test for i2c on esp32c3
2021-04-06 17:37:55 +08:00
Marius Vikhammer
2aead8ba57
Support ESP32S3 Beta 3 target
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Update ROM API. Port changes from bringup branch.
2021-03-18 10:24:22 +08:00
Marius Vikhammer
58c3f6a421
hal: explicitly include soc_caps.h
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Many files in the HAL layer depended on SOC_ macros without
explicitly including soc_caps.h
2021-01-07 10:13:17 +08:00
Angus Gratton
7c08be5771
hal: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 15:23:15 +11:00