Wykres commitów

15 Commity (78321804046aa4724d151964b39dad0244301e55)

Autor SHA1 Wiadomość Data
Li Shuai 4254953374 fix(esp_hw_support): fixed modem hang caused by incorrect configuration of power and isolate signals 2024-04-03 10:49:31 +08:00
jingli cb0f517fe3 soc/soc_caps: update soc caps for chips that support power-down of modem hardware
Closes WIFI-4424
2023-03-10 14:15:27 +08:00
jingli 4c3d1e24d7 codeclean: remove unused sleep related functions 2023-02-23 11:36:13 +08:00
cje a0ed82525e sleep: fix sleep time inaccurate bug when select 8MD256 as rtc slow clock on ESP32
Related to: https://github.com/espressif/esp-idf/issues/6687
2022-12-26 07:19:13 +00:00
songruojing a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
Michael (XIAO Xufeng) 234628b3ea pm: putting dbias and pd_cur code into same function 2022-05-14 02:35:11 +08:00
Jing Li ac0d16cdc8 Merge branch 'bugfix/fix_cannot_lslp_again_after_ulp_wakeup' into 'master'
sleep: fix cannot lightsleep again after a wakeup from ULP

Closes IDFGH-4396

See merge request espressif/esp-idf!17970
2022-05-13 22:25:23 +08:00
jingli abb6bb1181 esp_hw_support/sleep: fix cannot enable sleep reject in some cases
When enable sleep reject before this fix, we have two limitations:
1. it must be light sleep
2. RTC GPIO wakeup source must be set

We require light sleep because `esp_deep_sleep_start` function has
been declared with "noreturn" attribute, So developers don't expect
that this function may return (due to an error or a sleep reject).
But the requirement for RTC GPIO wakeup source is not reasonable for
all chips. This requirement exists because ESP32 only supports RTC GPIO
and SDIO sleep reject sources. But later chips support all sleep reject
sources.

This fix brings the following changes:
for ESP32: RTC GPIO and SDIO sleep reject sources can be enabled
           when corresponding wakeup source is set.

for later chips: all sleep reject sources can be enabled when
                 corresponding wakeup source is set.
2022-05-12 19:09:57 +08:00
Michael (XIAO Xufeng) 2905cbbe03 pm: fixed RTC8M domain power issues
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
2022-05-11 11:30:47 +08:00
Li Shuai e44ead5356 Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-13 17:36:54 +08:00
Jan Brudný 7f50818a99 esp_hw_support: update copyright notice 3 2021-08-10 13:30:57 +02:00
Li Shuai 6ca207531b deep sleep: clear wakeup and reject int raw signal before entry sleep 2021-06-29 11:59:54 +08:00
Li Shuai 344ec80fad optimize deep sleep current in wifi softap mode 2021-04-28 14:03:02 +00:00
ninh dc7bdb9857 adjust lightsleep overhead time and cali slowclk 2021-01-06 03:40:28 +00:00
Renz Bagaporo 6b0a5af73e soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00