Wykres commitów

16 Commity (0df418facd8df6b7475c2c2792cd86da09037864)

Autor SHA1 Wiadomość Data
Armando 0df418facd change(cache): update to use heap cap malloc flags 2024-04-15 15:34:51 +08:00
Armando b658c712e7 change(cache): change esp_cache_aligned_alloc_log_e_to_w 2024-04-15 09:49:25 +08:00
Armando f0518b3c16 feat(dma): advanced dma malloc helper 2024-04-02 14:30:14 +08:00
Armando de70ed1c84 feat(cache): added cache_prefer_m/calloc 2024-03-26 18:03:15 +08:00
Armando 9e36994a7b bugfix(cache): don't allow M2C direction ESP_CACHE_MSYNC_FLAG_UNALIGNED 2024-03-22 15:38:50 +08:00
Konstantin Kondrashov 3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
Armando 1f8f0a5285 feat(cache): added private API to get cache alignment requirements 2023-10-10 18:09:01 +08:00
Armando 3d4b60afc0 refactor(esp_mm): reformat code with astyle_py 2023-10-08 10:36:04 +08:00
Armando ec27891af6 change(cache): swap cache hal arg 'type' and 'level' 2023-09-22 14:19:41 +08:00
Armando 0a1503897c feat(cache): support esp_cache_msync for instructions 2023-09-22 14:19:41 +08:00
Armando e8813ddd1d feat(cache): added an helper API for cache-align-malloc 2023-09-22 14:19:41 +08:00
Armando ea38a2e9a4 feat(cache): support cache driver on esp32p4 2023-09-22 14:19:41 +08:00
Armando ae6d9e2b93 fix(cache): added alignment check for M2C direction 2023-07-20 12:20:42 +08:00
Armando eb1831f8d7 fix(cache): no longer use freeze in esp_cache_msync
Writeback and invalidation don't need cache to be frozen first
2023-07-20 10:45:57 +08:00
Armando da8afe7c78 feat(cache): added direction selection to esp_cache_msync API
ESP_CACHE_MSYNC_FLAG_DIR_C2M: From cache to memory
ESP_CACHE_MSYNC_FLAG_DIR_M2C: From memory to cache

By default, if no direction flag is set, it will fallback C2M direction.

For M2C direction, now this API will do an invalidation.
2023-07-11 11:19:10 +08:00
Armando fda9746bb8 esp_mm: cache_msync API 2023-02-28 10:42:22 +08:00