diff --git a/components/esp_hw_support/esp_memory_utils.c b/components/esp_hw_support/esp_memory_utils.c index cf12a11f6a..766ca5a2c1 100644 --- a/components/esp_hw_support/esp_memory_utils.c +++ b/components/esp_hw_support/esp_memory_utils.c @@ -42,6 +42,15 @@ bool esp_ptr_byte_accessible(const void *p) #endif #if CONFIG_SPIRAM r |= esp_psram_check_ptr_addr(p); +#endif +#if CONFIG_ESP32S3_DATA_CACHE_16KB + /* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is + * added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB + * (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000). + * Though this memory lies in the external memory vaddr, it is no different + * from the internal RAM in terms of hardware attributes. It is a part of + * the internal RAM when added to the heap and is byte-accessible .*/ + r |= (ip >= SOC_DROM_LOW && ip < (SOC_DROM_LOW + 0x4000)); #endif return r; } diff --git a/components/esp_hw_support/include/esp_memory_utils.h b/components/esp_hw_support/include/esp_memory_utils.h index 4326a4f6f4..188f14ea34 100644 --- a/components/esp_hw_support/include/esp_memory_utils.h +++ b/components/esp_hw_support/include/esp_memory_utils.h @@ -256,6 +256,17 @@ inline static bool esp_ptr_internal(const void *p) { * additional check is required */ r |= ((intptr_t)p >= SOC_RTC_DRAM_LOW && (intptr_t)p < SOC_RTC_DRAM_HIGH); #endif + +#if CONFIG_ESP32S3_DATA_CACHE_16KB + /* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is + * added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB + * (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000). + * Though this memory lies in the external memory vaddr, it is no different + * from the internal RAM in terms of hardware attributes and it is a part of + * the internal RAM when added to the heap.*/ + r |= ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < (SOC_DROM_LOW + 0x4000)); +#endif + return r; } @@ -277,7 +288,17 @@ bool esp_ptr_external_ram(const void *p); */ __attribute__((always_inline)) inline static bool esp_ptr_in_drom(const void *p) { - return ((intptr_t)p >= SOC_DROM_LOW && (intptr_t)p < SOC_DROM_HIGH); + uint32_t drom_start_addr = SOC_DROM_LOW; +#if CONFIG_ESP32S3_DATA_CACHE_16KB + /* For ESP32-S3, when the DCACHE size is set to 16 kB, the unused 48 kB is + * added to the heap in 2 blocks of 32 kB (from 0x3FCF0000) and 16 kB + * (from 0x3C000000 (SOC_DROM_LOW) - 0x3C004000). + * The drom_start_addr has to be moved by 0x4000 (16kB) to accomodate + * this addition. */ + drom_start_addr += 0x4000; +#endif + + return ((intptr_t)p >= drom_start_addr && (intptr_t)p < SOC_DROM_HIGH); } /**