fix(wifi): fix code review comments

pull/13517/merge
xuxiao 2024-04-09 19:36:46 +08:00
rodzic 9783bddde1
commit ec872c0c81
15 zmienionych plików z 66 dodań i 74 usunięć

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@ -25,7 +25,9 @@
#include "esp_task.h"
#include "esp_intr_alloc.h"
#include "esp_attr.h"
#ifdef CONFIG_ESP_PHY_ENABLED
#include "esp_phy_init.h"
#endif
#include "esp_bt.h"
#include "esp_err.h"
#include "esp_log.h"

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@ -23,7 +23,7 @@
#include "esp_log.h"
#endif
#if CONFIG_SW_COEXIST_ENABLE
#ifdef CONFIG_ESP_COEX_ENABLED
#include "private/esp_coexist_internal.h"
#endif
@ -35,7 +35,9 @@
#include "esp_intr_alloc.h"
#include "esp_sleep.h"
#include "esp_pm.h"
#ifdef CONFIG_ESP_PHY_ENABLED
#include "esp_phy_init.h"
#endif
#include "soc/syscon_reg.h"
#include "soc/modem_clkrst_reg.h"
#include "esp_private/periph_ctrl.h"

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@ -22,8 +22,10 @@
#include "esp_random.h"
#include "esp_task.h"
#include "esp_attr.h"
#ifdef CONFIG_ESP_PHY_ENABLED
#include "esp_phy_init.h"
#include "esp_private/phy.h"
#endif
#include "esp_bt.h"
#include "esp_err.h"
#include "esp_log.h"

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@ -23,9 +23,9 @@
#include "esp_log.h"
#endif // ESP_PLATFORM
#if CONFIG_SW_COEXIST_ENABLE
#ifdef CONFIG_ESP_COEX_ENABLED
#include "private/esp_coexist_internal.h"
#endif // CONFIG_SW_COEXIST_ENABLE
#endif // CONFIG_ESP_COEX_ENABLED
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"
@ -35,7 +35,9 @@
#include "esp_intr_alloc.h"
#include "esp_sleep.h"
#include "esp_pm.h"
#ifdef CONFIG_ESP_PHY_ENABLED
#include "esp_phy_init.h"
#endif
#include "esp_private/periph_ctrl.h"
#include "hci_uart.h"
#include "bt_osi_mem.h"

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@ -23,9 +23,9 @@
#include "esp_log.h"
#endif // ESP_PLATFORM
#if CONFIG_SW_COEXIST_ENABLE
#ifdef CONFIG_ESP_COEX_ENABLED
#include "private/esp_coexist_internal.h"
#endif // CONFIG_SW_COEXIST_ENABLE
#endif // CONFIG_ESP_COEX_ENABLED
#include "nimble/nimble_npl_os.h"
#include "nimble/ble_hci_trans.h"

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@ -76,9 +76,6 @@ if(CONFIG_ESP_PHY_ENABLED)
target_link_libraries(${COMPONENT_LIB} PUBLIC rtc)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a librtc.a
$<TARGET_FILE:${esp_phy_lib}>)
elseif(CONFIG_IDF_TARGET_ESP32S2)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a
$<TARGET_FILE:${esp_phy_lib}>)
elseif(CONFIG_SOC_BT_SUPPORTED OR CONFIG_SOC_IEEE802154_SUPPORTED)
target_link_libraries(${COMPONENT_LIB} PUBLIC btbb)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a

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@ -608,7 +608,7 @@ esp_err_t esp_wifi_get_ps(wifi_ps_type_t *type);
* if CONFIG_SOC_WIFI_HE_SUPPORT and band is 5G, the default protocol is (WIFI_PROTOCOL_11A|WIFI_PROTOCOL_11N|WIFI_PROTOCOL_11AC|WIFI_PROTOCOL_11AX).
*
* @attention 2.4G: Support 802.11b or 802.11bg or 802.11bgn or 802.11bgnax or LR mode
* 5G: Support 802.11a or 802.11an or 802.11anac or 802.11anacax or LR mode
* 5G: Support 802.11a or 802.11an or 802.11anac or 802.11anacax
*
* @param ifx interfaces
* @param protocol_bitmap WiFi protocol bitmap

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@ -281,13 +281,13 @@ typedef enum {
#define WIFI_PROTOCOL_11AX 0x40
typedef enum {
WIFI_BW_HT20 = 1, /* Bandwidth is HT20 */
WIFI_BW_HT20 = 1, /* Bandwidth is HT20 */
WIFI_BW20 = WIFI_BW_HT20, /* Bandwidth is 20 MHz */
WIFI_BW_HT40, /* Bandwidth is HT40 */
WIFI_BW_HT40 = 2, /* Bandwidth is HT40 */
WIFI_BW40 = WIFI_BW_HT40, /* Bandwidth is 40 MHz */
WIFI_BW80, /* Bandwidth is 80 MHz */
WIFI_BW160, /* Bandwidth is 160 MHz */
WIFI_BW80_BW80, /* Bandwidth is 80+80 MHz */
WIFI_BW80 = 3, /* Bandwidth is 80 MHz */
WIFI_BW160 = 4, /* Bandwidth is 160 MHz */
WIFI_BW80_BW80 = 5, /* Bandwidth is 80+80 MHz */
} wifi_bandwidth_t;
/** Configuration structure for Protected Management Frame */

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@ -127,6 +127,7 @@ typedef struct wifi_csi_info_t {
uint8_t *hdr; /**< header of the wifi packet */
uint8_t *payload; /**< payload of the wifi packet */
uint16_t payload_len; /**< payload len of the wifi packet */
uint16_t rx_seq; /**< rx sequence number of the wifi packet */
} wifi_csi_info_t;
#ifdef __cplusplus

@ -1 +1 @@
Subproject commit 1c9b6ea78fb9d4e47825808719543f101935bcc0
Subproject commit a5af5288b1c45bd386e0772ce8b3029876f65841

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@ -123,10 +123,6 @@ config SOC_BT_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_XTAL_SUPPORT_40M
bool
default y
@ -671,6 +667,38 @@ config SOC_RCC_IS_INDEPENDENT
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_WIFI_FTM_SUPPORT
bool
default n
config SOC_WIFI_GCMP_SUPPORT
bool
default y
config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y
config SOC_WIFI_MESH_SUPPORT
bool
default y
config SOC_WIFI_HE_SUPPORT
bool
default y
config SOC_WIFI_HE_SUPPORT_5G
bool
default y
config SOC_BLE_SUPPORTED
bool
default y
@ -706,35 +734,3 @@ config SOC_BLUFI_SUPPORTED
config SOC_BLE_MULTI_CONN_OPTIMIZATION
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
config SOC_WIFI_FTM_SUPPORT
bool
default n
config SOC_WIFI_GCMP_SUPPORT
bool
default y
config SOC_WIFI_WAPI_SUPPORT
bool
default y
config SOC_WIFI_CSI_SUPPORT
bool
default y
config SOC_WIFI_MESH_SUPPORT
bool
default y
config SOC_WIFI_HE_SUPPORT
bool
default y
config SOC_WIFI_HE_SUPPORT_5G
bool
default y

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@ -2,4 +2,6 @@ idf_component_register(SRCS "cmd_system.c" "cmd_system_common.c"
INCLUDE_DIRS .
REQUIRES console spi_flash driver esp_driver_gpio)
target_sources(${COMPONENT_LIB} PRIVATE cmd_system_sleep.c)
if(CONFIG_SOC_DEEP_SLEEP_SUPPORTED OR CONFIG_SOC_LIGHT_SLEEP_SUPPORTED)
target_sources(${COMPONENT_LIB} PRIVATE cmd_system_sleep.c)
endif()

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@ -29,8 +29,8 @@
static const char *TAG = "cmd_system_sleep";
#if SOC_DEEP_SLEEP_SUPPORTED
/** 'deep_sleep' command puts the chip into deep sleep mode */
static struct {
struct arg_int *wakeup_time;
#if SOC_PM_SUPPORT_EXT0_WAKEUP || SOC_PM_SUPPORT_EXT1_WAKEUP
@ -51,9 +51,7 @@ static int deep_sleep(int argc, char **argv)
if (deep_sleep_args.wakeup_time->count) {
uint64_t timeout = 1000ULL * deep_sleep_args.wakeup_time->ival[0];
ESP_LOGI(TAG, "Enabling timer wakeup, timeout=%lluus", timeout);
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
ESP_ERROR_CHECK( esp_sleep_enable_timer_wakeup(timeout) );
#endif
}
#if SOC_PM_SUPPORT_EXT1_WAKEUP
@ -82,9 +80,7 @@ static int deep_sleep(int argc, char **argv)
#if CONFIG_IDF_TARGET_ESP32
rtc_gpio_isolate(GPIO_NUM_12);
#endif //CONFIG_IDF_TARGET_ESP32
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
esp_deep_sleep_start();
#endif
return 1;
}
@ -118,9 +114,10 @@ void register_system_deep_sleep(void)
};
ESP_ERROR_CHECK( esp_console_cmd_register(&cmd) );
}
#endif // SOC_DEEP_SLEEP_SUPPORTED
#if SOC_LIGHT_SLEEP_SUPPORTED
/** 'light_sleep' command puts the chip into light sleep mode */
static struct {
struct arg_int *wakeup_time;
struct arg_int *wakeup_gpio_num;
@ -135,15 +132,11 @@ static int light_sleep(int argc, char **argv)
arg_print_errors(stderr, light_sleep_args.end, argv[0]);
return 1;
}
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
esp_sleep_disable_wakeup_source(ESP_SLEEP_WAKEUP_ALL);
#endif
if (light_sleep_args.wakeup_time->count) {
uint64_t timeout = 1000ULL * light_sleep_args.wakeup_time->ival[0];
ESP_LOGI(TAG, "Enabling timer wakeup, timeout=%lluus", timeout);
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
ESP_ERROR_CHECK( esp_sleep_enable_timer_wakeup(timeout) );
#endif
}
int io_count = light_sleep_args.wakeup_gpio_num->count;
if (io_count != light_sleep_args.wakeup_gpio_level->count) {
@ -163,25 +156,17 @@ static int light_sleep(int argc, char **argv)
ESP_ERROR_CHECK( gpio_wakeup_enable(io_num, level ? GPIO_INTR_HIGH_LEVEL : GPIO_INTR_LOW_LEVEL) );
}
if (io_count > 0) {
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
ESP_ERROR_CHECK( esp_sleep_enable_gpio_wakeup() );
#endif
}
if (CONFIG_ESP_CONSOLE_UART_NUM >= 0 && CONFIG_ESP_CONSOLE_UART_NUM <= UART_NUM_1) {
ESP_LOGI(TAG, "Enabling UART wakeup (press ENTER to exit light sleep)");
ESP_ERROR_CHECK( uart_set_wakeup_threshold(CONFIG_ESP_CONSOLE_UART_NUM, 3) );
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
ESP_ERROR_CHECK( esp_sleep_enable_uart_wakeup(CONFIG_ESP_CONSOLE_UART_NUM) );
#endif
}
fflush(stdout);
fsync(fileno(stdout));
#if !CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
esp_light_sleep_start();
esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
#else
esp_sleep_wakeup_cause_t cause = ESP_SLEEP_WAKEUP_TIMER;
#endif
const char *cause_str;
switch (cause) {
@ -226,3 +211,4 @@ void register_system_light_sleep(void)
};
ESP_ERROR_CHECK( esp_console_cmd_register(&cmd) );
}
#endif // SOC_LIGHT_SLEEP_SUPPORTED

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@ -4,6 +4,6 @@ dependencies:
espressif/iperf-cmd:
version: "~0.1.1"
esp-qa/wifi-cmd:
version: "~0.0.3"
version: "~0.1.0"
esp-qa/ping-cmd:
version: "~0.0.1"

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@ -28,9 +28,9 @@ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
#
# Wi-Fi
#
CONFIG_ESP_WIFI_ENABLE_WIFI_TX_STATS=y
CONFIG_ESP_WIFI_ENABLE_WIFI_RX_STATS=y
CONFIG_ESP_WIFI_ENABLE_WIFI_RX_MU_STATS=y
CONFIG_ESP_WIFI_ENABLE_WIFI_TX_STATS=n
CONFIG_ESP_WIFI_ENABLE_WIFI_RX_STATS=n
CONFIG_ESP_WIFI_ENABLE_WIFI_RX_MU_STATS=n
CONFIG_ESP_WIFI_ENABLE_DUMP_HESIGB=n
CONFIG_ESP_WIFI_ENABLE_DUMP_MU_CFO=n
CONFIG_ESP_WIFI_ENABLE_DUMP_CTRL_NDPA=n
@ -40,3 +40,5 @@ CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION=y
CONFIG_LWIP_TCPIP_CORE_LOCKING=y
CONFIG_LWIP_TCPIP_CORE_LOCKING_INPUT=y
CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION=y