From e845d9e0eb0d705a01936d3de94d12b2991dcce7 Mon Sep 17 00:00:00 2001 From: Alexey Lapshin Date: Thu, 21 Mar 2024 12:16:43 +0400 Subject: [PATCH] feat(esp_system): allow .data to spill over into L2MEM above 0x4ff40000 It may be usefull when .rodata placed into .dram1.data --- components/esp_system/ld/esp32p4/sections.ld.in | 13 +++++++++++-- components/heap/port/esp32p4/memory_layout.c | 6 +++--- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/components/esp_system/ld/esp32p4/sections.ld.in b/components/esp_system/ld/esp32p4/sections.ld.in index 318b068875..8a1c5fc5f2 100644 --- a/components/esp_system/ld/esp32p4/sections.ld.in +++ b/components/esp_system/ld/esp32p4/sections.ld.in @@ -217,7 +217,7 @@ SECTIONS .dram0.data : { - _data_start = ABSOLUTE(.); + _data_start_low = ABSOLUTE(.); *(.gnu.linkonce.d.*) *(.data1) __global_pointer$ = . + 0x800; @@ -230,9 +230,18 @@ SECTIONS arrays[dram0_data] mapping[dram0_data] - _data_end = ABSOLUTE(.); + _data_end_low = ABSOLUTE(.); } > sram_low + .dram1.data : + { + _data_start_high = ABSOLUTE(.); + + mapping[dram0_data] + + _data_end_high = ABSOLUTE(.); + } > sram_high + /** * This section holds data that should not be initialized at power up. * The section located in Internal SRAM memory region. The macro _NOINIT diff --git a/components/heap/port/esp32p4/memory_layout.c b/components/heap/port/esp32p4/memory_layout.c index 04e5a9dfe6..9b5135f814 100644 --- a/components/heap/port/esp32p4/memory_layout.c +++ b/components/heap/port/esp32p4/memory_layout.c @@ -89,7 +89,7 @@ const soc_memory_region_t soc_memory_regions[] = { const size_t soc_memory_region_count = sizeof(soc_memory_regions) / sizeof(soc_memory_region_t); -extern int _data_start, _bss_start_high, _heap_start_low, _heap_start_high, _iram_start, _iram_end, _rtc_force_slow_end; +extern int _data_start_low, _data_start_high, _heap_start_low, _heap_start_high, _iram_start, _iram_end, _rtc_force_slow_end; extern int _tcm_text_start, _tcm_data_end; extern int _rtc_reserved_start, _rtc_reserved_end; @@ -100,8 +100,8 @@ extern int _rtc_reserved_start, _rtc_reserved_end; */ // Static data region. DRAM used by data+bss and possibly rodata -SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start, (intptr_t)&_heap_start_low, dram_data_low); -SOC_RESERVE_MEMORY_REGION((intptr_t)&_bss_start_high, (intptr_t)&_heap_start_high, dram_data_high); +SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start_low, (intptr_t)&_heap_start_low, dram_data_low); +SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start_high, (intptr_t)&_heap_start_high, dram_data_high); // Target has a shared D/IRAM virtual address, no need to calculate I_D_OFFSET like previous chips SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start, (intptr_t)&_iram_end, iram_code);