kopia lustrzana https://github.com/espressif/esp-idf
freertos(IDF): Remove dependency on portUSING_MPU_WRAPPERS
This commit removes the dependency on portUSING_MPU_WRAPPERS on the Xtensa port of IDF FreeRTOS. This dependency was added due to a hack implemented in the upstream port that required the usage of the "xMPUSettings" member of the TCB. The "xMPUSettings" would be used as a pointer to the task's coprocessor save area on the stack, even though FreeRTOS MPU support was not available. The hack has now been removed, and the CPSA pointer is now calculated using a combination of constant offsets values and the pxEndOfStack member of the TCB. Note: This impelemtation was copied from the Xtensa port of Amazon SMP FreeRTOS.pull/10469/head
Darian Leung
rodzic
9300bef9b8
commit
c318c89453
|
|
@ -642,48 +642,13 @@ FORCE_INLINE_ATTR BaseType_t xPortGetCoreID(void)
|
|||
/* ------------------------------------------------------ Misc ---------------------------------------------------------
|
||||
* - Miscellaneous porting macros
|
||||
* - These are not port of the FreeRTOS porting interface, but are used by other FreeRTOS dependent components
|
||||
* - [refactor-todo] Remove dependency on MPU wrappers by modifying TCB
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// -------------------- Co-Processor -----------------------
|
||||
|
||||
// When coprocessors are defined, we maintain a pointer to coprocessors area.
|
||||
// We currently use a hack: redefine field xMPU_SETTINGS in TCB block as a structure that can hold:
|
||||
// MPU wrappers, coprocessor area pointer, trace code structure, and more if needed.
|
||||
// The field is normally used for memory protection. FreeRTOS should create another general purpose field.
|
||||
typedef struct {
|
||||
#if XCHAL_CP_NUM > 0
|
||||
volatile StackType_t *coproc_area; // Pointer to coprocessor save area; MUST BE FIRST
|
||||
#endif
|
||||
|
||||
#if portUSING_MPU_WRAPPERS
|
||||
// Define here mpu_settings, which is port dependent
|
||||
int mpu_setting; // Just a dummy example here; MPU not ported to Xtensa yet
|
||||
#endif
|
||||
} xMPU_SETTINGS;
|
||||
|
||||
// Main hack to use MPU_wrappers even when no MPU is defined (warning: mpu_setting should not be accessed; otherwise move this above xMPU_SETTINGS)
|
||||
#if (XCHAL_CP_NUM > 0) && !portUSING_MPU_WRAPPERS // If MPU wrappers not used, we still need to allocate coproc area
|
||||
#undef portUSING_MPU_WRAPPERS
|
||||
#define portUSING_MPU_WRAPPERS 1 // Enable it to allocate coproc area
|
||||
#define MPU_WRAPPERS_H // Override mpu_wrapper.h to disable unwanted code
|
||||
#define PRIVILEGED_FUNCTION
|
||||
#define PRIVILEGED_DATA
|
||||
#endif
|
||||
|
||||
void _xt_coproc_release(volatile void *coproc_sa_base);
|
||||
|
||||
/*
|
||||
* The structures and methods of manipulating the MPU are contained within the
|
||||
* port layer.
|
||||
*
|
||||
* Fills the xMPUSettings structure with the memory region information
|
||||
* contained in xRegions.
|
||||
*/
|
||||
#if( portUSING_MPU_WRAPPERS == 1 )
|
||||
struct xMEMORY_REGION;
|
||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION *const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth ) PRIVILEGED_FUNCTION;
|
||||
void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings );
|
||||
void vPortCleanUpCoprocArea(void *pvTCB);
|
||||
#define portCLEAN_UP_COPROC(pvTCB) vPortCleanUpCoprocArea(pvTCB)
|
||||
#endif
|
||||
|
||||
// -------------------- Heap Related -----------------------
|
||||
|
|
|
|||
|
|
@ -170,6 +170,15 @@ The implementation may use only a2-4, a15 (all other regs must be preserved).
|
|||
// void* XT_RTOS_CP_STATE(void)
|
||||
#define XT_RTOS_CP_STATE _frxt_task_coproc_state
|
||||
|
||||
/*
|
||||
RTOS provided hook function that is called on every coprocessor exception. May
|
||||
only be called from assembly code and by the 'call0' instruction.
|
||||
The implementation may use only a2-4, a15 (all other regs must be preserved).
|
||||
*/
|
||||
// void XT_RTOS_CP_EXC_HOOK(void)
|
||||
#if XCHAL_CP_NUM > 0
|
||||
#define XT_RTOS_CP_EXC_HOOK _frxt_coproc_exc_hook
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
|
||||
|
|
|
|||
|
|
@ -81,9 +81,21 @@ _Static_assert(tskNO_AFFINITY == CONFIG_FREERTOS_NO_AFFINITY, "incorrect tskNO_A
|
|||
|
||||
|
||||
/* ---------------------------------------------------- Variables ------------------------------------------------------
|
||||
*
|
||||
* - Various variables used to maintain the FreeRTOS port's state. Used from both port.c and various .S files
|
||||
* - Constant offsets are used by assembly to jump to particular TCB members or a stack area (such as the CPSA). We use
|
||||
* C constants instead of preprocessor macros due to assembly lacking "offsetof()".
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
/* Offsets used to navigate to a task's CPSA on the stack */
|
||||
const DRAM_ATTR uint32_t offset_pxEndOfStack = offsetof(StaticTask_t, pxDummy8);
|
||||
const DRAM_ATTR uint32_t offset_cpsa = XT_CP_SIZE; /* Offset to start of the CPSA area on the stack. See uxInitialiseStackCPSA(). */
|
||||
#if configNUM_CORES > 1
|
||||
/* Offset to TCB_t.xCoreID member. Used to pin unpinned tasks that use the FPU. */
|
||||
const DRAM_ATTR uint32_t offset_xCoreID = offsetof(StaticTask_t, xDummyCoreID);
|
||||
#endif /* configNUM_CORES > 1 */
|
||||
#endif /* XCHAL_CP_NUM > 0 */
|
||||
|
||||
volatile unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = {0}; // Indicates whether scheduler is running on a per-core basis
|
||||
unsigned port_interruptNesting[portNUM_PROCESSORS] = {0}; // Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit
|
||||
BaseType_t port_uxCriticalNesting[portNUM_PROCESSORS] = {0};
|
||||
|
|
@ -389,16 +401,21 @@ FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackFrame(UBaseType_t uxStackPointer,
|
|||
return uxStackPointer;
|
||||
}
|
||||
|
||||
#if portUSING_MPU_WRAPPERS
|
||||
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged)
|
||||
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
#else
|
||||
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
#endif
|
||||
{
|
||||
/*
|
||||
HIGH ADDRESS
|
||||
|---------------------------| <- pxTopOfStack on entry
|
||||
| Coproc Save Area |
|
||||
| Coproc Save Area | (CPSA MUST BE FIRST)
|
||||
| ------------------------- |
|
||||
| TLS Variables |
|
||||
| ------------------------- | <- Start of useable stack
|
||||
|
|
@ -417,7 +434,7 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
|
|||
// Make sure the incoming stack pointer is aligned on 16
|
||||
configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
|
||||
#if XCHAL_CP_NUM > 0
|
||||
// Initialize the coprocessor save area
|
||||
// Initialize the coprocessor save area. THIS MUST BE THE FIRST AREA due to access from _frxt_task_coproc_state()
|
||||
uxStackPointer = uxInitialiseStackCPSA(uxStackPointer);
|
||||
// Each allocated section on the stack must have a size aligned on 16
|
||||
configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
|
||||
|
|
@ -583,33 +600,17 @@ void vPortSetStackWatchpoint( void *pxStackStart )
|
|||
esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, 32, ESP_CPU_WATCHPOINT_STORE);
|
||||
}
|
||||
|
||||
/* ---------------------------------------------- Misc Implementations -------------------------------------------------
|
||||
*
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// -------------------- Co-Processor -----------------------
|
||||
|
||||
/*
|
||||
* Used to set coprocessor area in stack. Current hack is to reuse MPU pointer for coprocessor area.
|
||||
*/
|
||||
#if portUSING_MPU_WRAPPERS
|
||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION *const xRegions, StackType_t *pxBottomOfStack, uint32_t usStackDepth )
|
||||
{
|
||||
#if XCHAL_CP_NUM > 0
|
||||
xMPUSettings->coproc_area = ( StackType_t * ) ( ( uint32_t ) ( pxBottomOfStack + usStackDepth - 1 ));
|
||||
xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) xMPUSettings->coproc_area ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
|
||||
xMPUSettings->coproc_area = ( StackType_t * ) ( ( ( uint32_t ) xMPUSettings->coproc_area - XT_CP_SIZE ) & ~0xf );
|
||||
void _xt_coproc_release(volatile void *coproc_sa_base);
|
||||
|
||||
|
||||
/* NOTE: we cannot initialize the coprocessor save area here because FreeRTOS is going to
|
||||
* clear the stack area after we return. This is done in pxPortInitialiseStack().
|
||||
*/
|
||||
#endif
|
||||
}
|
||||
|
||||
void vPortReleaseTaskMPUSettings( xMPU_SETTINGS *xMPUSettings )
|
||||
void vPortCleanUpCoprocArea(void *pvTCB)
|
||||
{
|
||||
/* If task has live floating point registers somewhere, release them */
|
||||
_xt_coproc_release( xMPUSettings->coproc_area );
|
||||
/* Get a pointer to the task's coprocessor save area */
|
||||
UBaseType_t uxCoprocArea;
|
||||
uxCoprocArea = ( UBaseType_t ) ( ( ( StaticTask_t * ) pvTCB )->pxDummy8 ); /* Get TCB_t.pxEndOfStack */
|
||||
uxCoprocArea = STACKPTR_ALIGN_DOWN(16, uxCoprocArea - XT_CP_SIZE);
|
||||
_xt_coproc_release( ( void * ) uxCoprocArea );
|
||||
}
|
||||
#endif /* portUSING_MPU_WRAPPERS */
|
||||
#endif /* XCHAL_CP_NUM > 0 */
|
||||
|
|
|
|||
|
|
@ -32,9 +32,47 @@
|
|||
#include "sdkconfig.h"
|
||||
|
||||
#define TOPOFSTACK_OFFS 0x00 /* StackType_t *pxTopOfStack */
|
||||
#define CP_TOPOFSTACK_OFFS 0x04 /* xMPU_SETTINGS.coproc_area */
|
||||
|
||||
.extern pxCurrentTCB
|
||||
#if XCHAL_CP_NUM > 0
|
||||
/* Offsets used to get a task's coprocessor save area (CPSA) from its TCB */
|
||||
.extern offset_pxEndOfStack
|
||||
.extern offset_cpsa
|
||||
#if configNUM_CORES > 1
|
||||
/* Offset to TCB_t.xCoreID member. Used to pin unpinned tasks that use the FPU. */
|
||||
.extern offset_xCoreID
|
||||
#endif /* configNUM_CORES > 1 */
|
||||
#endif /* XCHAL_CP_NUM > 0 */
|
||||
|
||||
/*
|
||||
--------------------------------------------------------------------------------
|
||||
Macro get_cpsa_from_tcb - get the pointer to a task's CPSA form its TCB
|
||||
|
||||
Entry:
|
||||
- "reg_A" contains a pointer to the task's TCB
|
||||
Exit:
|
||||
- "reg_A" contains pointer the the task's CPSA
|
||||
- "reg_B" clobbered
|
||||
|
||||
The two arguments must be different AR registers.
|
||||
--------------------------------------------------------------------------------
|
||||
*/
|
||||
#if XCHAL_CP_NUM > 0
|
||||
.macro get_cpsa_from_tcb reg_A reg_B
|
||||
/* Get TCB.pxEndOfStack from reg_A */
|
||||
movi \reg_B, offset_pxEndOfStack /* Move &offset_pxEndOfStack into reg_B */
|
||||
l32i \reg_B, \reg_B, 0 /* Load offset_pxEndOfStack into reg_B */
|
||||
add \reg_A, \reg_A, \reg_B /* Calculate &pxEndOfStack to reg_A (&TCB + offset_pxEndOfStack) */
|
||||
l32i \reg_A, \reg_A, 0 /* Load TCB.pxEndOfStack into reg_A */
|
||||
/* Offset to start of CP save area */
|
||||
movi \reg_B, offset_cpsa /* Move &offset_cpsa into reg_B */
|
||||
l32i \reg_B, \reg_B, 0 /* Load offset_cpsa into reg_B */
|
||||
sub \reg_A, \reg_A, \reg_B /* Subtract offset_cpsa from pxEndOfStack to get to start of CP save area (unaligned) */
|
||||
/* Align down start of CP save area to 16 byte boundary */
|
||||
movi \reg_B, ~(0xF)
|
||||
and \reg_A, \reg_A, \reg_B /* Align CP save area pointer to 16 bytes */
|
||||
.endm
|
||||
#endif /* XCHAL_CP_NUM > 0 */
|
||||
|
||||
.global port_IntStack
|
||||
.global port_switch_flag //Required by sysview_tracing build
|
||||
|
|
@ -120,23 +158,19 @@ _frxt_int_enter:
|
|||
mull a2, a4, a2
|
||||
add a1, a1, a2 /* for current proc */
|
||||
|
||||
#ifdef CONFIG_FREERTOS_FPU_IN_ISR
|
||||
#if XCHAL_CP_NUM > 0
|
||||
#if CONFIG_FREERTOS_FPU_IN_ISR && XCHAL_CP_NUM > 0
|
||||
rsr a3, CPENABLE /* Restore thread scope CPENABLE */
|
||||
addi sp, sp,-4 /* ISR will manage FPU coprocessor by forcing */
|
||||
s32i a3, a1, 0 /* its trigger */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
.Lnested:
|
||||
1:
|
||||
#ifdef CONFIG_FREERTOS_FPU_IN_ISR
|
||||
#if XCHAL_CP_NUM > 0
|
||||
#if CONFIG_FREERTOS_FPU_IN_ISR && XCHAL_CP_NUM > 0
|
||||
movi a3, 0 /* whilst ISRs pending keep CPENABLE exception active */
|
||||
wsr a3, CPENABLE
|
||||
rsync
|
||||
#endif
|
||||
#endif
|
||||
|
||||
mov a0, a12 /* restore return addr and return */
|
||||
ret
|
||||
|
|
@ -174,14 +208,12 @@ _frxt_int_exit:
|
|||
s32i a2, a3, 0 /* save nesting count */
|
||||
bnez a2, .Lnesting /* !=0 after decr so still nested */
|
||||
|
||||
#ifdef CONFIG_FREERTOS_FPU_IN_ISR
|
||||
#if XCHAL_CP_NUM > 0
|
||||
#if CONFIG_FREERTOS_FPU_IN_ISR && XCHAL_CP_NUM > 0
|
||||
l32i a3, sp, 0 /* Grab last CPENABLE before leave ISR */
|
||||
addi sp, sp, 4
|
||||
wsr a3, CPENABLE
|
||||
rsync /* ensure CPENABLE was modified */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
movi a2, pxCurrentTCB
|
||||
addx4 a2, a4, a2
|
||||
|
|
@ -460,11 +492,11 @@ _frxt_dispatch:
|
|||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
/* Restore CPENABLE from task's co-processor save area. */
|
||||
movi a3, pxCurrentTCB /* cp_state = */
|
||||
getcoreid a2
|
||||
addx4 a3, a2, a3
|
||||
l32i a3, a3, 0
|
||||
l32i a2, a3, CP_TOPOFSTACK_OFFS /* StackType_t *pxStack; */
|
||||
movi a2, pxCurrentTCB /* cp_state = */
|
||||
getcoreid a3
|
||||
addx4 a2, a3, a2
|
||||
l32i a2, a2, 0
|
||||
get_cpsa_from_tcb a2, a3 /* After this, pointer to CP save area is in a2, a3 is destroyed */
|
||||
l16ui a3, a2, XT_CPENABLE /* CPENABLE = cp_state->cpenable; */
|
||||
wsr a3, CPENABLE
|
||||
#endif
|
||||
|
|
@ -563,7 +595,7 @@ vPortYield:
|
|||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
/* Clear CPENABLE, also in task's co-processor state save area. */
|
||||
l32i a2, a2, CP_TOPOFSTACK_OFFS /* a2 = pxCurrentTCB->cp_state */
|
||||
get_cpsa_from_tcb a2, a3 /* After this, pointer to CP save area is in a2, a3 is destroyed */
|
||||
movi a3, 0
|
||||
wsr a3, CPENABLE
|
||||
beqz a2, 1f
|
||||
|
|
@ -604,12 +636,12 @@ vPortYieldFromInt:
|
|||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
/* Save CPENABLE in task's co-processor save area, and clear CPENABLE. */
|
||||
movi a3, pxCurrentTCB /* cp_state = */
|
||||
getcoreid a2
|
||||
addx4 a3, a2, a3
|
||||
l32i a3, a3, 0
|
||||
movi a2, pxCurrentTCB /* cp_state = */
|
||||
getcoreid a3
|
||||
addx4 a2, a3, a2
|
||||
l32i a2, a2, 0
|
||||
|
||||
l32i a2, a3, CP_TOPOFSTACK_OFFS
|
||||
get_cpsa_from_tcb a2, a3 /* After this, pointer to CP save area is in a2, a3 is destroyed */
|
||||
|
||||
rsr a3, CPENABLE
|
||||
s16i a3, a2, XT_CPENABLE /* cp_state->cpenable = CPENABLE; */
|
||||
|
|
@ -663,10 +695,58 @@ _frxt_task_coproc_state:
|
|||
l32i a15, a15, 0 /* && pxCurrentTCB != 0) { */
|
||||
|
||||
beqz a15, 2f
|
||||
l32i a15, a15, CP_TOPOFSTACK_OFFS
|
||||
get_cpsa_from_tcb a15, a3 /* After this, pointer to CP save area is in a15, a3 is destroyed */
|
||||
ret
|
||||
|
||||
1: movi a15, 0
|
||||
2: ret
|
||||
|
||||
#endif /* XCHAL_CP_NUM > 0 */
|
||||
|
||||
/*
|
||||
**********************************************************************************************************
|
||||
* _frxt_coproc_exc_hook
|
||||
* void _frxt_coproc_exc_hook(void)
|
||||
*
|
||||
* Implements the Xtensa RTOS porting layer's XT_RTOS_CP_EXC_HOOK function for FreeRTOS.
|
||||
*
|
||||
* May only be called from assembly code by the 'call0' instruction. Does NOT obey ABI conventions.
|
||||
* May only only use a2-4, a15 (all other regs must be preserved).
|
||||
* See the detailed description of the XT_RTOS_ENTER macro in xtensa_rtos.h.
|
||||
*
|
||||
**********************************************************************************************************
|
||||
*/
|
||||
#if XCHAL_CP_NUM > 0
|
||||
|
||||
.globl _frxt_coproc_exc_hook
|
||||
.type _frxt_coproc_exc_hook,@function
|
||||
.align 4
|
||||
_frxt_coproc_exc_hook:
|
||||
|
||||
#if configNUM_CORES > 1
|
||||
getcoreid a2 /* a2 = xCurCoreID */
|
||||
/* if (port_xSchedulerRunning[xCurCoreID] == 0) */
|
||||
movi a3, port_xSchedulerRunning
|
||||
addx4 a3, a2, a3
|
||||
l32i a3, a3, 0
|
||||
beqz a3, 1f /* Scheduler hasn't started yet. Return. */
|
||||
/* if (port_interruptNesting[xCurCoreID] != 0) */
|
||||
movi a3, port_interruptNesting
|
||||
addx4 a3, a2, a3
|
||||
l32i a3, a3, 0
|
||||
bnez a3, 1f /* We are in an interrupt. Return*/
|
||||
/* CP operations are incompatible with unpinned tasks. Thus we pin the task
|
||||
to the current running core. */
|
||||
movi a3, pxCurrentTCB
|
||||
addx4 a3, a2, a3
|
||||
l32i a3, a3, 0 /* a3 = pxCurrentTCB[xCurCoreID] */
|
||||
movi a4, offset_xCoreID
|
||||
l32i a4, a4, 0 /* a4 = offset_xCoreID */
|
||||
add a3, a3, a4 /* a3 = &TCB.xCoreID */
|
||||
s32i a2, a3, 0 /* TCB.xCoreID = xCurCoreID */
|
||||
1:
|
||||
#endif /* configNUM_CORES > 1 */
|
||||
|
||||
ret
|
||||
|
||||
#endif /* XCHAL_CP_NUM > 0 */
|
||||
|
|
|
|||
|
|
@ -103,12 +103,6 @@
|
|||
#include "sdkconfig.h"
|
||||
#include "soc/soc.h"
|
||||
|
||||
/*
|
||||
Define for workaround: pin no-cpu-affinity tasks to a cpu when fpu is used.
|
||||
Please change this when the tcb structure is changed
|
||||
*/
|
||||
#define TASKTCB_XCOREID_OFFSET (0x38+configMAX_TASK_NAME_LEN+3)&~3
|
||||
.extern pxCurrentTCB
|
||||
|
||||
/*
|
||||
--------------------------------------------------------------------------------
|
||||
|
|
@ -907,29 +901,15 @@ _xt_coproc_exc:
|
|||
s32i a4, sp, XT_STK_A4
|
||||
s32i a15, sp, XT_STK_A15
|
||||
|
||||
/* Call the RTOS coprocessor exception hook */
|
||||
call0 XT_RTOS_CP_EXC_HOOK
|
||||
|
||||
/* Get co-processor state save area of new owner thread. */
|
||||
call0 XT_RTOS_CP_STATE /* a15 = new owner's save area */
|
||||
#if CONFIG_FREERTOS_FPU_IN_ISR
|
||||
beqz a15, .L_skip_core_pin /* CP used in ISR, skip task pinning */
|
||||
#else
|
||||
#if !CONFIG_FREERTOS_FPU_IN_ISR
|
||||
beqz a15, .L_goto_invalid /* not in a thread (invalid) */
|
||||
#endif
|
||||
|
||||
#if configNUM_CORES > 1
|
||||
/* CP operations are incompatible with unpinned tasks. Thus we pin the task
|
||||
to the current running core. */
|
||||
movi a2, pxCurrentTCB
|
||||
getcoreid a3 /* a3 = current core ID */
|
||||
addx4 a2, a3, a2
|
||||
l32i a2, a2, 0 /* a2 = start of pxCurrentTCB[cpuid] */
|
||||
addi a2, a2, TASKTCB_XCOREID_OFFSET /* a2 = &TCB.xCoreID */
|
||||
s32i a3, a2, 0 /* TCB.xCoreID = current core ID */
|
||||
#endif // configNUM_CORES > 1
|
||||
|
||||
#if CONFIG_FREERTOS_FPU_IN_ISR
|
||||
.L_skip_core_pin:
|
||||
#endif
|
||||
|
||||
/* Enable the co-processor's bit in CPENABLE. */
|
||||
movi a0, _xt_coproc_mask
|
||||
rsr a4, CPENABLE /* a4 = CPENABLE */
|
||||
|
|
@ -945,6 +925,7 @@ everywhere): _xt_coproc_release assumes it works like this in order not to need
|
|||
locking.
|
||||
*/
|
||||
/* Grab correct xt_coproc_owner_sa for this core */
|
||||
getcoreid a3 /* a3 = current core ID */
|
||||
movi a2, XCHAL_CP_MAX << 2
|
||||
mull a2, a2, a3 /* multiply by current processor id */
|
||||
movi a3, _xt_coproc_owner_sa /* a3 = base of owner array */
|
||||
|
|
@ -960,8 +941,9 @@ locking.
|
|||
/* If float is necessary on ISR, we need to remove this check */
|
||||
/* below, because on restoring from ISR we may have new == old condition used
|
||||
* to force cp restore to next thread
|
||||
* Todo: IDF-6418
|
||||
*/
|
||||
#ifndef CONFIG_FREERTOS_FPU_IN_ISR
|
||||
#if !CONFIG_FREERTOS_FPU_IN_ISR
|
||||
bne a15, a2, .L_switch_context
|
||||
j .L_goto_done /* new owner == old, we're done */
|
||||
.L_switch_context:
|
||||
|
|
|
|||
|
|
@ -4848,6 +4848,10 @@ BaseType_t xTaskGetAffinity( TaskHandle_t xTask )
|
|||
vPortReleaseTaskMPUSettings( &( pxTCB->xMPUSettings ) );
|
||||
#endif
|
||||
|
||||
#ifdef portCLEAN_UP_COPROC
|
||||
portCLEAN_UP_COPROC( ( void * ) pxTCB );
|
||||
#endif
|
||||
|
||||
#if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
|
||||
{
|
||||
/* The task can only have been allocated dynamically - free both
|
||||
|
|
|
|||
|
|
@ -171,7 +171,7 @@ This file get's pulled into assembly sources. Therefore, some includes need to b
|
|||
#elif CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#endif
|
||||
#define configRECORD_STACK_HIGH_ADDRESS 1
|
||||
#define configRECORD_STACK_HIGH_ADDRESS 1 // This must be set as the port requires TCB.pxEndOfStack
|
||||
|
||||
// ------------------- Run-time Stats ----------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -13,10 +13,7 @@ entries:
|
|||
port: pxPortInitialiseStack (default)
|
||||
port: xPortStartScheduler (default)
|
||||
if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S3 = y :
|
||||
port: vPortReleaseTaskMPUSettings (default)
|
||||
tasks: xTaskCreateRestricted (default)
|
||||
port: vPortStoreTaskMPUSettings (default)
|
||||
tasks: vTaskAllocateMPURegions (default)
|
||||
port: vPortCleanUpCoprocArea (default)
|
||||
tasks: prvTaskCheckFreeStackSpace (default)
|
||||
tasks: prvInitialiseNewTask (default)
|
||||
tasks: prvInitialiseTaskLists (default)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,5 @@
|
|||
semphr.h:line: warning: argument 'pxStaticSemaphore' of command @param is not found in the argument list of xSemaphoreCreateCounting(uxMaxCount, uxInitialCount)
|
||||
task.h:line: warning: argument 'pxTaskDefinition' of command @param is not found in the argument list of vTaskAllocateMPURegions(TaskHandle_t xTask, const MemoryRegion_t *const pxRegions)
|
||||
task.h:line: warning: argument 'pxCreatedTask' of command @param is not found in the argument list of vTaskAllocateMPURegions(TaskHandle_t xTask, const MemoryRegion_t *const pxRegions)
|
||||
task.h:line: warning: argument 'pxTaskDefinition' of command @param is not found in the argument list of vTaskAllocateMPURegions(TaskHandle_t xTask, const MemoryRegion_t *const pxRegions)
|
||||
task.h:line: warning: argument 'pxCreatedTask' of command @param is not found in the argument list of vTaskAllocateMPURegions(TaskHandle_t xTask, const MemoryRegion_t *const pxRegions)
|
||||
|
|
|
|||
|
|
@ -303,7 +303,6 @@ PREDEFINED = \
|
|||
configNUM_THREAD_LOCAL_STORAGE_POINTERS=1 \
|
||||
configUSE_APPLICATION_TASK_TAG=1 \
|
||||
configTASKLIST_INCLUDE_COREID=1 \
|
||||
portUSING_MPU_WRAPPERS=1 \
|
||||
PRIVILEGED_FUNCTION= \
|
||||
"ESP_EVENT_DECLARE_BASE(x)=extern esp_event_base_t x"
|
||||
|
||||
|
|
|
|||
|
|
@ -7,9 +7,7 @@ PREFIX_RISCV ?= riscv32-esp-elf-
|
|||
PROG_XTENSA := dummy_xtensa.elf
|
||||
PROG_RISCV := dummy_riscv.elf
|
||||
|
||||
# This actually depends on the value of portUSING_MPU_WRAPPERS.
|
||||
# I.e. ESP32-S2 would also have TASK_NAME_OFFSET=52 since portUSING_MPU_WRAPPERS is 0.
|
||||
CPPFLAGS_XTENSA := -DTASK_NAME_OFFSET=56
|
||||
CPPFLAGS_XTENSA := -DTASK_NAME_OFFSET=52
|
||||
CPPFLAGS_RISCV := -DTASK_NAME_OFFSET=52
|
||||
|
||||
all: $(PROG_XTENSA) $(PROG_RISCV)
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue