Merge branch 'feature/further_support_esp32c2_sleep' into 'master'

esp32c2/sleep: further support sleep for esp32c2 with 26MHz XTAL Closes IDF-5544 See merge request espressif/esp-idf!19017
2022-08-08 13:26:15 +08:00 · 2022-08-08 13:26:15 +08:00 · c25c254666
commit c25c254666
--- a/components/bootloader_support/src/bootloader_clock_init.c
+++ b/components/bootloader_support/src/bootloader_clock_init.c
@ -42,13 +42,6 @@ __attribute__((weak)) void bootloader_clock_configure(void)

    if (esp_rom_get_reset_reason(0) != RESET_REASON_CPU0_SW || rtc_clk_apb_freq_get() < APB_CLK_FREQ) {
        rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();
-#if CONFIG_IDF_TARGET_ESP32
-        clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ;
-#endif
-#if CONFIG_IDF_TARGET_ESP32C2
-        clk_cfg.xtal_freq = CONFIG_ESP32C2_XTAL_FREQ;
-#endif
-        /* For other chips, there is no XTAL_FREQ choice */
        clk_cfg.cpu_freq_mhz = cpu_freq_mhz;
        clk_cfg.slow_clk_src = rtc_clk_slow_src_get();
        if (clk_cfg.slow_clk_src == SOC_RTC_SLOW_CLK_SRC_INVALID) {
--- a/components/bt/controller/esp32c2/bt.c
+++ b/components/bt/controller/esp32c2/bt.c
@ -576,13 +576,13 @@ void ble_rtc_clk_init(void)
    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);

-#ifdef CONFIG_ESP32C2_XTAL_FREQ_26
+#ifdef CONFIG_XTAL_FREQ_26
    // LP_TIMER_CLK_DIV_NUM -> 130
    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
 #else
    // LP_TIMER_CLK_DIV_NUM -> 250
    SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
-#endif // CONFIG_ESP32C2_XTAL_FREQ_26
+#endif // CONFIG_XTAL_FREQ_26

    // MODEM_CLKRST_ETM_CLK_ACTIVE -> 1
    // MODEM_CLKRST_ETM_CLK_SEL -> 0
--- a/components/bt/include/esp32c2/include/esp_bt.h
+++ b/components/bt/include/esp32c2/include/esp_bt.h
@ -226,7 +226,7 @@ typedef struct {
    .coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF,     \
    .dis_scan_backoff           = NIMBLE_DISABLE_SCAN_BACKOFF,                          \
    .ble_scan_classify_filter_enable         = 0,                                       \
-    .main_xtal_freq             = CONFIG_ESP32C2_XTAL_FREQ,                             \
+    .main_xtal_freq             = CONFIG_XTAL_FREQ,                                     \
    .config_magic = CONFIG_MAGIC,                                                       \
 };

--- a/components/bt/include/esp32c2/include/esp_bt_cfg.h
+++ b/components/bt/include/esp32c2/include/esp_bt_cfg.h
@ -192,11 +192,11 @@ extern "C" {

 #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N     (3000)

-#ifdef CONFIG_ESP32C2_XTAL_FREQ_26
+#ifdef CONFIG_XTAL_FREQ_26
    #define RTC_FREQ_N                      (40000) /* in Hz */
 #else
    #define RTC_FREQ_N                      (32000) /* in Hz */
-#endif // CONFIG_ESP32C2_XTAL_FREQ_26
+#endif // CONFIG_XTAL_FREQ_26

 #define BLE_LL_TX_PWR_DBM_N                 (0)

--- a/components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m
+++ b/components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m
@ -1,2 +1,2 @@
 CONFIG_IDF_TARGET="esp32c2"
-CONFIG_ESP32C2_XTAL_FREQ_26=y
+CONFIG_XTAL_FREQ_26=y
--- a/components/esp_hw_support/Kconfig
+++ b/components/esp_hw_support/Kconfig
@ -103,7 +103,6 @@ menu "Hardware Settings"

                If you are seeing "flash read err, 1000" message printed to the
                console after deep sleep reset, try increasing this value.
-
    endmenu

    menu "RTC Clock Config"
@ -168,7 +167,6 @@ menu "Hardware Settings"
            default 0x4000 if MMU_PAGE_SIZE_16KB
            default 0x8000 if MMU_PAGE_SIZE_32KB
            default 0x10000 if MMU_PAGE_SIZE_64KB
-
    endmenu

    # Insert chip-specific HW config
@ -193,4 +191,45 @@ menu "Hardware Settings"
                (e.g. SPI Flash write).
    endmenu # GDMA Configuration

+    menu "Main XTAL Config"
+        choice XTAL_FREQ_SEL
+            prompt "Main XTAL frequency"
+            default XTAL_FREQ_40 if SOC_XTAL_SUPPORT_40M
+            help
+                This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+                The selected value MUST reflect the frequency of the given hardware.
+
+                Note: The XTAL_FREQ_AUTO option allows the ESP target to automatically estimating XTAL clock's
+                operating frequency. However, this feature is only supported on the ESP32. The ESP32 uses the
+                internal 8MHZ as a reference when estimating. Due to the internal oscillator's frequency being
+                temperature dependent, usage of the XTAL_FREQ_AUTO is not recommended in applications that operate
+                in high ambient temperatures or use high-temperature qualified chips and modules.
+
+            config XTAL_FREQ_24
+                depends on SOC_XTAL_SUPPORT_24M
+                bool "24 MHz"
+            config XTAL_FREQ_26
+                depends on SOC_XTAL_SUPPORT_26M
+                bool "26 MHz"
+            config XTAL_FREQ_32
+                depends on SOC_XTAL_SUPPORT_32M
+                bool "32 MHz"
+            config XTAL_FREQ_40
+                depends on SOC_XTAL_SUPPORT_40M
+                bool "40 MHz"
+            config XTAL_FREQ_AUTO
+                depends on SOC_XTAL_SUPPORT_AUTO_DETECT
+                bool "Autodetect"
+        endchoice
+
+        # rtc_xtal_freq_t enum in soc/rtc.h lists the XTAL frequencies can be supported
+        # SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+        config XTAL_FREQ
+            int
+            default 24 if XTAL_FREQ_24
+            default 26 if XTAL_FREQ_26
+            default 32 if XTAL_FREQ_32
+            default 40 if XTAL_FREQ_40
+            default 0  if XTAL_FREQ_AUTO
+    endmenu
 endmenu
--- a/components/esp_hw_support/include/esp_private/esp_clk.h
+++ b/components/esp_hw_support/include/esp_private/esp_clk.h
@ -63,7 +63,7 @@ int esp_clk_apb_freq(void);
 * @brief Return frequency of the main XTAL
 *
 * Frequency of the main XTAL can be either auto-detected or set at compile
- * time (see CONFIG_ESP32_XTAL_FREQ_SEL sdkconfig option). In both cases, this
+ * time (see CONFIG_XTAL_FREQ_SEL sdkconfig option). In both cases, this
 * function returns the actual value at run time.
 *
 * @return XTAL frequency, in Hz
--- a/components/esp_hw_support/port/esp32/Kconfig.hw_support
+++ b/components/esp_hw_support/port/esp32/Kconfig.hw_support
@ -24,33 +24,3 @@ config ESP32_REV_MIN
    default 1 if ESP32_REV_MIN_1
    default 2 if ESP32_REV_MIN_2
    default 3 if ESP32_REV_MIN_3
-
-choice ESP32_XTAL_FREQ_SEL
-    prompt "Main XTAL frequency"
-    default ESP32_XTAL_FREQ_40
-    help
-        ESP32 currently supports the following XTAL frequencies:
-
-        - 26 MHz
-        - 40 MHz
-
-        Startup code can automatically estimate XTAL frequency. This feature
-        uses the internal 8MHz oscillator as a reference. Because the internal
-        oscillator frequency is temperature dependent, it is not recommended
-        to use automatic XTAL frequency detection in applications which need
-        to work at high ambient temperatures and use high-temperature
-        qualified chips and modules.
-    config ESP32_XTAL_FREQ_40
-        bool "40 MHz"
-    config ESP32_XTAL_FREQ_26
-        bool "26 MHz"
-    config ESP32_XTAL_FREQ_AUTO
-        bool "Autodetect"
-endchoice
-
-# Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
-config ESP32_XTAL_FREQ
-    int
-    default 0 if ESP32_XTAL_FREQ_AUTO
-    default 40 if ESP32_XTAL_FREQ_40
-    default 26 if ESP32_XTAL_FREQ_26
--- a/components/esp_hw_support/port/esp32/rtc_clk_init.c
+++ b/components/esp_hw_support/port/esp32/rtc_clk_init.c
@ -95,7 +95,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)

        rtc_xtal_freq_t est_xtal_freq = rtc_clk_xtal_freq_estimate();
        if (est_xtal_freq != configured_xtal_freq) {
-            ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_ESP32_XTAL_FREQ setting (%dMHz). Detected %d MHz.",
+            ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_XTAL_FREQ setting (%dMHz). Detected %d MHz.",
                    configured_xtal_freq, est_xtal_freq);
        }
    }
--- a/components/esp_hw_support/port/esp32c2/Kconfig.hw_support
+++ b/components/esp_hw_support/port/esp32c2/Kconfig.hw_support
@ -1,21 +0,0 @@
-config ESP32C2_XTAL_FREQ
-    int
-    default 40 if ESP32C2_XTAL_FREQ_40
-    default 26 if ESP32C2_XTAL_FREQ_26
-
-choice ESP32C2_XTAL_FREQ_SEL
-    prompt "Main XTAL frequency"
-    default ESP32C2_XTAL_FREQ_40
-    help
-        ESP32-C2 currently supports the following XTAL frequencies:
-
-        - 26 MHz
-        - 40 MHz
-
-        This option must be set to the correct value for the given hardware.
-
-    config ESP32C2_XTAL_FREQ_40    # TODO: IDF-5488
-        bool "40 MHz"
-    config ESP32C2_XTAL_FREQ_26
-        bool "26 MHz"
-endchoice
--- a/components/esp_hw_support/port/esp32c2/rtc_clk.c
+++ b/components/esp_hw_support/port/esp32c2/rtc_clk.c
@ -302,8 +302,8 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
    uint32_t xtal_freq_mhz = clk_ll_xtal_load_freq_mhz();
    if (xtal_freq_mhz == 0) {
-        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_ESP32C2_XTAL_FREQ);
-        return CONFIG_ESP32C2_XTAL_FREQ;
+        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_XTAL_FREQ);
+        return CONFIG_XTAL_FREQ;
    }
    return (rtc_xtal_freq_t)xtal_freq_mhz;
 }
--- a/components/esp_hw_support/port/esp32c2/systimer.c
+++ b/components/esp_hw_support/port/esp32c2/systimer.c
@ -12,7 +12,7 @@
 *        So the resolution of the systimer is 40MHz/2.5 = 16MHz, or 26MHz/2.5 = 10.4MHz.
 */

-#if CONFIG_ESP32C2_XTAL_FREQ_40
+#if CONFIG_XTAL_FREQ_40
 uint64_t systimer_ticks_to_us(uint64_t ticks)
 {
    return ticks / 16;
@ -22,7 +22,7 @@ uint64_t systimer_us_to_ticks(uint64_t us)
 {
    return us * 16;
 }
-#elif CONFIG_ESP32C2_XTAL_FREQ_26
+#elif CONFIG_XTAL_FREQ_26
 uint64_t systimer_ticks_to_us(uint64_t ticks)
 {
    return ticks * 5 / 52;
@ -34,4 +34,4 @@ uint64_t systimer_us_to_ticks(uint64_t us)
 }
 #else
 #error "Unsupported XTAL frequency by systimer"
-#endif // CONFIG_ESP32C2_XTAL_FREQ_xx
+#endif // CONFIG_XTAL_FREQ_xx
--- a/components/esp_hw_support/sdkconfig.rename.esp32
+++ b/components/esp_hw_support/sdkconfig.rename.esp32
@ -22,3 +22,8 @@ CONFIG_ESP32_SPIRAM_SUPPORT                             CONFIG_SPIRAM
 CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST           CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP

 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY                    CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY
+
+CONFIG_ESP32_XTAL_FREQ_26                               CONFIG_XTAL_FREQ_26
+CONFIG_ESP32_XTAL_FREQ_40                               CONFIG_XTAL_FREQ_40
+CONFIG_ESP32_XTAL_FREQ_AUTO                             CONFIG_XTAL_FREQ_AUTO
+CONFIG_ESP32_XTAL_FREQ                                  CONFIG_XTAL_FREQ
--- a/components/esp_system/Kconfig
+++ b/components/esp_system/Kconfig
@ -331,7 +331,7 @@ menu "ESP System Settings"
        int
        prompt "UART console baud rate" if ESP_CONSOLE_UART_CUSTOM
        depends on ESP_CONSOLE_UART
-        default 74880 if ESP32C2_XTAL_FREQ_26
+        default 74880 if (IDF_TARGET_ESP32C2 && XTAL_FREQ_26)
        default 115200
        range 1200 4000000 if !PM_ENABLE
        range 1200 1000000 if PM_ENABLE
--- a/components/esp_system/port/soc/esp32c2/clk.c
+++ b/components/esp_system/port/soc/esp32c2/clk.c
@ -71,7 +71,9 @@ static const char *TAG = "clk";
    }
    rtc_init(cfg);

-    assert(rtc_clk_xtal_freq_get() == CONFIG_ESP32C2_XTAL_FREQ);
+#ifndef CONFIG_XTAL_FREQ_AUTO
+    assert(rtc_clk_xtal_freq_get() == CONFIG_XTAL_FREQ);
+#endif

    bool rc_fast_d256_is_enabled = rtc_clk_8md256_enabled();
    rtc_clk_8m_enable(true, rc_fast_d256_is_enabled);
--- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in
@ -127,6 +127,18 @@ config SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL
    int
    default 5

+config SOC_XTAL_SUPPORT_26M
+    bool
+    default y
+
+config SOC_XTAL_SUPPORT_40M
+    bool
+    default y
+
+config SOC_XTAL_SUPPORT_AUTO_DETECT
+    bool
+    default y
+
 config SOC_ADC_RTC_CTRL_SUPPORTED
    bool
    default y
--- a/components/soc/esp32/include/soc/rtc.h
+++ b/components/soc/esp32/include/soc/rtc.h
@ -122,7 +122,7 @@ typedef struct rtc_clk_config_s {
 * Default initializer for rtc_clk_config_t
 */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_AUTO, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
    .cpu_freq_mhz = 80, \
    .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
    .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
--- a/components/soc/esp32/include/soc/soc_caps.h
+++ b/components/soc/esp32/include/soc/soc_caps.h
@ -96,6 +96,11 @@
 #endif // SOC_CAPS_ECO_VER < 2
 #define SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL (5U)

+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_26M            1
+#define SOC_XTAL_SUPPORT_40M            1
+#define SOC_XTAL_SUPPORT_AUTO_DETECT    1
+
 /*-------------------------- ADC CAPS ----------------------------------------*/
 /*!< SAR ADC Module*/
 #define SOC_ADC_RTC_CTRL_SUPPORTED              1
--- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
@ -67,6 +67,14 @@ config SOC_SYSTIMER_SUPPORTED
    bool
    default y

+config SOC_XTAL_SUPPORT_26M
+    bool
+    default y
+
+config SOC_XTAL_SUPPORT_40M
+    bool
+    default y
+
 config SOC_ADC_DIG_CTRL_SUPPORTED
    bool
    default y
--- a/components/soc/esp32c2/include/soc/rtc.h
+++ b/components/soc/esp32c2/include/soc/rtc.h
@ -174,7 +174,7 @@ typedef struct {
 * Default initializer for rtc_clk_config_t
 */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_40M, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
    .cpu_freq_mhz = 80, \
    .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
    .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
--- a/components/soc/esp32c2/include/soc/soc_caps.h
+++ b/components/soc/esp32c2/include/soc/soc_caps.h
@ -42,6 +42,10 @@
 #define SOC_SECURE_BOOT_SUPPORTED       1
 #define SOC_SYSTIMER_SUPPORTED          1

+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_26M            1
+#define SOC_XTAL_SUPPORT_40M            1
+
 /*-------------------------- ADC CAPS -------------------------------*/
 /*!< SAR ADC Module*/
 #define SOC_ADC_DIG_CTRL_SUPPORTED              1
--- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
@ -115,6 +115,10 @@ config SOC_MEMPROT_SUPPORTED
    bool
    default y

+config SOC_XTAL_SUPPORT_40M
+    bool
+    default y
+
 config SOC_AES_SUPPORT_DMA
    bool
    default y
--- a/components/soc/esp32c3/include/soc/rtc.h
+++ b/components/soc/esp32c3/include/soc/rtc.h
@ -177,7 +177,7 @@ typedef struct {
 * Default initializer for rtc_clk_config_t
 */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_40M, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
    .cpu_freq_mhz = 80, \
    .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
    .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
--- a/components/soc/esp32c3/include/soc/soc_caps.h
+++ b/components/soc/esp32c3/include/soc/soc_caps.h
@ -57,6 +57,9 @@
 #define SOC_SECURE_BOOT_SUPPORTED       1
 #define SOC_MEMPROT_SUPPORTED           1

+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_40M            1
+
 /*-------------------------- AES CAPS -----------------------------------------*/
 #define SOC_AES_SUPPORT_DMA     (1)

--- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
@ -103,6 +103,10 @@ config SOC_SECURE_BOOT_SUPPORTED
    bool
    default y

+config SOC_XTAL_SUPPORT_32M
+    bool
+    default y
+
 config SOC_AES_SUPPORT_DMA
    bool
    default y
--- a/components/soc/esp32h2/include/soc/rtc.h
+++ b/components/soc/esp32h2/include/soc/rtc.h
@ -182,7 +182,7 @@ typedef struct {
 * Default initializer for rtc_clk_config_t
 */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_32M, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
    .cpu_freq_mhz = 32, \
    .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
    .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
--- a/components/soc/esp32h2/include/soc/soc_caps.h
+++ b/components/soc/esp32h2/include/soc/soc_caps.h
@ -59,6 +59,8 @@
 #define SOC_FLASH_ENC_SUPPORTED         1
 #define SOC_SECURE_BOOT_SUPPORTED       1

+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_32M            1

 /*-------------------------- AES CAPS -----------------------------------------*/
 #define SOC_AES_SUPPORT_DMA     (1)
--- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
@ -143,6 +143,10 @@ config SOC_TOUCH_SENSOR_SUPPORTED
    bool
    default y

+config SOC_XTAL_SUPPORT_40M
+    bool
+    default y
+
 config SOC_ADC_RTC_CTRL_SUPPORTED
    bool
    default y
--- a/components/soc/esp32s2/include/soc/rtc.h
+++ b/components/soc/esp32s2/include/soc/rtc.h
@ -170,7 +170,7 @@ typedef struct {
 * Default initializer for rtc_clk_config_t
 */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_40M, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
    .cpu_freq_mhz = 80, \
    .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
    .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
--- a/components/soc/esp32s2/include/soc/soc_caps.h
+++ b/components/soc/esp32s2/include/soc/soc_caps.h
@ -75,6 +75,8 @@
 #define SOC_MEMPROT_SUPPORTED           1
 #define SOC_TOUCH_SENSOR_SUPPORTED      1

+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_40M            1

 /*-------------------------- ADC CAPS ----------------------------------------*/
 /*!< SAR ADC Module*/
--- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
@ -199,6 +199,10 @@ config SOC_TOUCH_SENSOR_SUPPORTED
    bool
    default y

+config SOC_XTAL_SUPPORT_40M
+    bool
+    default y
+
 config SOC_APPCPU_HAS_CLOCK_GATING_BUG
    bool
    default y
--- a/components/soc/esp32s3/include/soc/rtc.h
+++ b/components/soc/esp32s3/include/soc/rtc.h
@ -179,7 +179,7 @@ typedef struct {
 * Default initializer for rtc_clk_config_t
 */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_40M, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
    .cpu_freq_mhz = 80, \
    .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
    .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \
--- a/components/soc/esp32s3/include/soc/soc_caps.h
+++ b/components/soc/esp32s3/include/soc/soc_caps.h
@ -65,6 +65,9 @@
 #define SOC_MEMPROT_SUPPORTED           1
 #define SOC_TOUCH_SENSOR_SUPPORTED      1

+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_40M            1
+
 /*-------------------------- SOC CAPS ----------------------------------------*/
 #define SOC_APPCPU_HAS_CLOCK_GATING_BUG (1)

--- a/docs/en/get-started/start-project.rst
+++ b/docs/en/get-started/start-project.rst
@ -328,7 +328,7 @@ After startup and diagnostic logs scroll up, you should see "Hello world!" print

 To exit IDF monitor use the shortcut ``Ctrl+]``.

-.. only:: esp32
+.. only:: esp32 or esp32c2

    If IDF monitor fails shortly after the upload, or, if instead of the messages above, you see random garbage similar to what is given below, your board is likely using a 26 MHz crystal. Most development board designs use 40 MHz, so ESP-IDF uses this frequency as a default value.

@ -340,9 +340,18 @@ To exit IDF monitor use the shortcut ``Ctrl+]``.
    If you have such a problem, do the following:

    1. Exit the monitor.
-    2. Go back to `menuconfig`.
-    3. Go to Component config --> ESP32-specific --> Main XTAL frequency, then change :ref:`CONFIG_ESP32_XTAL_FREQ_SEL` to 26 MHz.
-    4. After that, `build and flash` the application again.
+    2. Go back to ``menuconfig``.
+    3. Go to ``Component config`` --> ``Hardware Settings`` --> ``Main XTAL Config`` --> ``Main XTAL frequency``, then change :ref:`CONFIG_XTAL_FREQ_SEL` to 26 MHz.
+    4. After that, ``build and flash`` the application again.
+
+    In the current version of ESP-IDF, main XTAL frequencies supported by {IDF_TARGET_NAME} are as follows:
+
+    .. list::
+
+        :SOC_XTAL_SUPPORT_24M: - 24 MHz
+        :SOC_XTAL_SUPPORT_26M: - 26 MHz
+        :SOC_XTAL_SUPPORT_32M: - 32 MHz
+        :SOC_XTAL_SUPPORT_40M: - 40 MHz

 .. note::

--- a/docs/zh_CN/get-started/start-project.rst
+++ b/docs/zh_CN/get-started/start-project.rst
@ -328,7 +328,7 @@

 您可使用快捷键 ``Ctrl+]``，退出 IDF 监视器。

-.. only:: esp32
+.. only:: esp32 or esp32c2

    如果 IDF 监视器在烧录后很快发生错误，或打印信息全是乱码（如下），很有可能是因为您的开发板采用了 26 MHz 晶振，而 ESP-IDF 默认支持大多数开发板使用的 40 MHz 晶振。

@ -340,9 +340,18 @@
    此时，您可以：

    1. 退出监视器。
-    2. 返回 `menuconfig`。
-    3. 进入 ``Component config`` --> ``ESP32-specific`` --> ``Main XTAL frequency`` 进行配置，将 :ref:`CONFIG_ESP32_XTAL_FREQ_SEL` 设置为 26 MHz。
-    4. 重新 `编译和烧录` 应用程序。
+    2. 返回 ``menuconfig``。
+    3. 进入 ``Component config`` --> ``Hardware Settings`` --> ``Main XTAL Config`` --> ``Main XTAL frequency`` 进行配置，将 :ref:`CONFIG_XTAL_FREQ_SEL` 设置为 26 MHz。
+    4. 重新 ``编译和烧录`` 应用程序。
+
+    在当前的 ESP-IDF 版本中，{IDF_TARGET_NAME} 支持的主晶振频率如下：
+
+    .. list::
+
+        :SOC_XTAL_SUPPORT_24M: - 24 MHz
+        :SOC_XTAL_SUPPORT_26M: - 26 MHz
+        :SOC_XTAL_SUPPORT_32M: - 32 MHz
+        :SOC_XTAL_SUPPORT_40M: - 40 MHz

 .. note::

--- a/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32
@ -1118,10 +1118,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32
@ -1122,10 +1122,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32
@ -1122,10 +1122,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32
@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32
@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32
@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32
@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32
@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32
@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32
@ -1117,10 +1117,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32
@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32
@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32
@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32
@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32
+++ b/examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32
@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/bluetooth/blufi/sdkconfig.defaults.esp32
+++ b/examples/bluetooth/blufi/sdkconfig.defaults.esp32
@ -1107,10 +1107,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y
 # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-# CONFIG_ESP32_XTAL_FREQ_26 is not set
-# CONFIG_ESP32_XTAL_FREQ_AUTO is not set
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+# CONFIG_XTAL_FREQ_26 is not set
+# CONFIG_XTAL_FREQ_AUTO is not set
+CONFIG_XTAL_FREQ=40
 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
 # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
 # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
--- a/examples/system/light_sleep/main/uart_wakeup.c
+++ b/examples/system/light_sleep/main/uart_wakeup.c
@ -10,6 +10,7 @@
 #include "soc/uart_pins.h"
 #include "driver/uart.h"
 #include "driver/gpio.h"
+#include "sdkconfig.h"

 #define EXAMPLE_UART_NUM        0
 /* Notice that ESP32 has to use the iomux input to configure uart as wakeup source
@ -96,7 +97,7 @@ static void uart_wakeup_task(void *arg)
 static esp_err_t uart_initialization(void)
 {
    uart_config_t uart_cfg = {
-        .baud_rate  = 115200,
+        .baud_rate  = CONFIG_ESP_CONSOLE_UART_BAUDRATE,
        .data_bits  = UART_DATA_8_BITS,
        .parity     = UART_PARITY_DISABLE,
        .stop_bits  = UART_STOP_BITS_1,
@ -106,6 +107,10 @@ static esp_err_t uart_initialization(void)
    //Install UART driver, and get the queue.
    ESP_RETURN_ON_ERROR(uart_driver_install(EXAMPLE_UART_NUM, EXAMPLE_UART_BUF_SIZE, EXAMPLE_UART_BUF_SIZE, 20, &uart_evt_que, 0),
                        TAG, "Install uart failed");
+    if (EXAMPLE_UART_NUM == CONFIG_ESP_CONSOLE_UART_NUM) {
+        /* temp fix for uart garbled output, can be removed when IDF-5683 done */
+        ESP_RETURN_ON_ERROR(uart_wait_tx_idle_polling(EXAMPLE_UART_NUM), TAG, "Wait uart tx done failed");
+    }
    ESP_RETURN_ON_ERROR(uart_param_config(EXAMPLE_UART_NUM, &uart_cfg), TAG, "Configure uart param failed");
    ESP_RETURN_ON_ERROR(uart_set_pin(EXAMPLE_UART_NUM, EXAMPLE_UART_TX_IO_NUM, EXAMPLE_UART_RX_IO_NUM, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE),
                        TAG, "Configure uart gpio pins failed");
--- a/examples/wifi/power_save/main/Kconfig.projbuild
+++ b/examples/wifi/power_save/main/Kconfig.projbuild
@ -67,7 +67,6 @@ menu "Example Configuration"
        default 160 if EXAMPLE_MAX_CPU_FREQ_160
        default 240 if EXAMPLE_MAX_CPU_FREQ_240

-
    choice EXAMPLE_MIN_CPU_FREQ
        prompt "Minimum CPU frequency"
        default EXAMPLE_MIN_CPU_FREQ_10M
@ -78,19 +77,19 @@ menu "Example Configuration"

        config EXAMPLE_MIN_CPU_FREQ_40M
            bool "40 MHz (use with 40MHz XTAL)"
-            depends on !IDF_TARGET_ESP32 || ESP32_XTAL_FREQ_40 || ESP32_XTAL_FREQ_AUTO
+            depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO
        config EXAMPLE_MIN_CPU_FREQ_20M
            bool "20 MHz (use with 40MHz XTAL)"
-            depends on !IDF_TARGET_ESP32 || ESP32_XTAL_FREQ_40 || ESP32_XTAL_FREQ_AUTO
+            depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO
        config EXAMPLE_MIN_CPU_FREQ_10M
            bool "10 MHz (use with 40MHz XTAL)"
-            depends on !IDF_TARGET_ESP32 || ESP32_XTAL_FREQ_40 || ESP32_XTAL_FREQ_AUTO
+            depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO
        config EXAMPLE_MIN_CPU_FREQ_26M
            bool "26 MHz (use with 26MHz XTAL)"
-            depends on ESP32_XTAL_FREQ_26 || ESP32_XTAL_FREQ_AUTO
+            depends on XTAL_FREQ_26 || XTAL_FREQ_AUTO
        config EXAMPLE_MIN_CPU_FREQ_13M
            bool "13 MHz (use with 26MHz XTAL)"
-            depends on ESP32_XTAL_FREQ_26 || ESP32_XTAL_FREQ_AUTO
+            depends on XTAL_FREQ_26 || XTAL_FREQ_AUTO
    endchoice

    config EXAMPLE_MIN_CPU_FREQ_MHZ
--- a/tools/ldgen/samples/sdkconfig
+++ b/tools/ldgen/samples/sdkconfig
@ -184,10 +184,10 @@ CONFIG_RTC_CLK_SRC_EXT_CRYS=
 CONFIG_RTC_CLK_CAL_CYCLES=1024
 CONFIG_RTC_XTAL_BOOTSTRAP_CYCLES=100
 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000
-CONFIG_ESP32_XTAL_FREQ_40=y
-CONFIG_ESP32_XTAL_FREQ_26=
-CONFIG_ESP32_XTAL_FREQ_AUTO=
-CONFIG_ESP32_XTAL_FREQ=40
+CONFIG_XTAL_FREQ_40=y
+CONFIG_XTAL_FREQ_26=
+CONFIG_XTAL_FREQ_AUTO=
+CONFIG_XTAL_FREQ=40
 CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE=
 CONFIG_ESP_TIMER_PROFILING=
 CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS=
--- a/tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal
+++ b/tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal
@ -1,2 +1,2 @@
 CONFIG_IDF_TARGET="esp32c2"
-CONFIG_ESP32C2_XTAL_FREQ_26=y
+CONFIG_XTAL_FREQ_26=y
--- a/tools/unit-test-app/configs/default_c2_26mhz
+++ b/tools/unit-test-app/configs/default_c2_26mhz
@ -1,5 +1,5 @@
 # This config is split between targets since different component needs to be included
 CONFIG_IDF_TARGET="esp32c2"
-CONFIG_ESP32C2_XTAL_FREQ_26=y
+CONFIG_XTAL_FREQ_26=y

 TEST_COMPONENTS=esp_timer
--- a/tools/unit-test-app/sdkconfig.defaults.esp32
+++ b/tools/unit-test-app/sdkconfig.defaults.esp32
@ -1,3 +1,3 @@
 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
-CONFIG_ESP32_XTAL_FREQ_AUTO=y
+CONFIG_XTAL_FREQ_AUTO=y
 CONFIG_SPI_FLASH_SHARE_SPI1_BUS=y
--- a/tools/unit-test-app/tools/ConfigDependency.yml
+++ b/tools/unit-test-app/tools/ConfigDependency.yml
@ -7,5 +7,5 @@
 "ESP32C3_IDF": "CONFIG_IDF_TARGET_ESP32C3=y"
 "quad_psram": '{CONFIG_SPIRAM_MODE_QUAD=y} and {CONFIG_IDF_TARGET_ESP32S3=y}'
 "octal_psram": '{CONFIG_SPIRAM_MODE_OCT=y} and {CONFIG_IDF_TARGET_ESP32S3=y}'
-"xtal_26mhz": '{CONFIG_ESP32C2_XTAL_FREQ_26=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'
-"xtal_40mhz": '{CONFIG_ESP32C2_XTAL_FREQ_40=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'
+"xtal_26mhz": '{CONFIG_XTAL_FREQ_26=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'
+"xtal_40mhz": '{CONFIG_XTAL_FREQ_40=y} and {CONFIG_IDF_TARGET_ESP32C2=y}'