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Merge branch 'fix/enable_crypto_periphs_before_rom_exec' into 'master' 

fix(esp_system): enable crypto periphs before rom execution

See merge request espressif/esp-idf!30116
pull/13651/head
Mahavir Jain 2024-04-13 00:14:16 +08:00
rodzic c8e454b4fa 6ec486e351
commit bf63862c4a
9 zmienionych plików z 48 dodań i 10 usunięć
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24
components/esp_system/port/soc/esp32p4/system_internal.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -62,6 +62,28 @@ void IRAM_ATTR esp_system_reset_modules_on_exit(void)
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN1_REG, HP_SYS_CLKRST_REG_RST_EN_UART3_CORE);
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN1_REG, HP_SYS_CLKRST_REG_RST_EN_UART4_CORE);
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN0_REG, HP_SYS_CLKRST_REG_RST_EN_GDMA);
#if CONFIG_ESP32P4_REV_MIN_FULL <= 100
// enable soc clk and reset parent crypto
SET_PERI_REG_MASK(HP_SYS_CLKRST_SOC_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_CRYPTO_SYS_CLK_EN);
SET_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN2_REG, HP_SYS_CLKRST_REG_RST_EN_CRYPTO);
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN2_REG, HP_SYS_CLKRST_REG_RST_EN_CRYPTO);
// enable soc clk for key manager
SET_PERI_REG_MASK(HP_SYS_CLKRST_SOC_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_KEY_MANAGER_SYS_CLK_EN);
// enable key manager peripheral clock and reset
SET_PERI_REG_MASK(HP_SYS_CLKRST_PERI_CLK_CTRL25_REG, HP_SYS_CLKRST_REG_CRYPTO_KM_CLK_EN);
SET_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN2_REG, HP_SYS_CLKRST_REG_RST_EN_KM);
CLEAR_PERI_REG_MASK(HP_SYS_CLKRST_HP_RST_EN2_REG, HP_SYS_CLKRST_REG_RST_EN_KM);
#endif
#if CONFIG_ESP32P4_REV_MIN_FULL == 0
// enable MPI, SHA and ECDSA peripheral clocks
SET_PERI_REG_MASK(HP_SYS_CLKRST_PERI_CLK_CTRL25_REG, HP_SYS_CLKRST_REG_CRYPTO_RSA_CLK_EN);
SET_PERI_REG_MASK(HP_SYS_CLKRST_PERI_CLK_CTRL25_REG, HP_SYS_CLKRST_REG_CRYPTO_SHA_CLK_EN);
SET_PERI_REG_MASK(HP_SYS_CLKRST_PERI_CLK_CTRL25_REG, HP_SYS_CLKRST_REG_CRYPTO_ECDSA_CLK_EN);
#endif
}
/* "inner" restart function for after RTOS, interrupts & anything else on this

7
components/hal/esp32p4/include/hal/aes_ll.h
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@ -48,7 +48,8 @@ static inline void aes_ll_reset_register(void)
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_aes = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_aes = 0;
// Clear reset on digital signature, otherwise AES is held in reset
// Clear reset on digital signature and parent crypto, otherwise AES is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 0;
}
@ -308,11 +309,11 @@ static inline void aes_ll_gcm_set_j0(const uint8_t *j0)
}
/**
* @brief Sets the number of effective bits of incomplete blocks in plaintext/cipertext.
* @brief Sets the number of effective bits of incomplete blocks in plaintext/ciphertext.
*
* @note Only affects AES-GCM
*
* @param num_valid_bits the number of effective bits of incomplete blocks in plaintext/cipertext.
* @param num_valid_bits the number of effective bits of incomplete blocks in plaintext/ciphertext.
*/
static inline void aes_ll_gcm_set_num_valid_bit(size_t num_valid_bits)
{

3
components/hal/esp32p4/include/hal/ds_ll.h
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@ -46,6 +46,9 @@ static inline void ds_ll_reset_register(void)
{
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 0;
// Clear reset on parent crypto, otherwise DS is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section

3
components/hal/esp32p4/include/hal/ecc_ll.h
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@ -47,7 +47,8 @@ static inline void ecc_ll_reset_register(void)
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecc = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecc = 0;
// Clear reset on ECDSA, otherwise ECC is held in reset
// Clear reset on ECDSA and parent crypto, otherwise ECC is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;
}

3
components/hal/esp32p4/include/hal/ecdsa_ll.h
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@ -92,6 +92,9 @@ static inline void ecdsa_ll_reset_register(void)
{
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;
// Clear reset on parent crypto, otherwise ECDSA is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
}
/**

3
components/hal/esp32p4/include/hal/hmac_ll.h
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@ -53,6 +53,9 @@ static inline void hmac_ll_reset_register(void)
{
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_hmac = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_hmac = 0;
// Clear reset on parent crypto, otherwise HMAC is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section

9
components/hal/esp32p4/include/hal/key_mgr_ll.h
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@ -59,6 +59,9 @@ static inline void key_mgr_ll_reset_register(void)
{
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_km = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_km = 0;
// Clear reset on parent crypto, otherwise Key Manager is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
@ -183,7 +186,7 @@ static inline void key_mgr_ll_lock_use_sw_init_key_reg(void)
/**
* @brief Set the lock for the use_sw_init_key_reg
* After this lock has been set,
* The Key manager configuration about whether to use a paricular key from efuse or key manager cannot be changed.
* The Key manager configuration about whether to use a particular key from efuse or key manager cannot be changed.
*/
static inline void key_mgr_ll_lock_use_efuse_key_reg(esp_key_mgr_key_type_t key_type)
{
@ -198,14 +201,14 @@ static inline void key_mgr_ll_lock_use_efuse_key_reg(esp_key_mgr_key_type_t key_
}
}
/* @brief Configure the key purpose to be used by the Key Manager for key generator opearation */
/* @brief Configure the key purpose to be used by the Key Manager for key generator operation */
static inline void key_mgr_ll_set_key_purpose(const esp_key_mgr_key_purpose_t key_purpose)
{
REG_SET_FIELD(KEYMNG_CONF_REG, KEYMNG_KEY_PURPOSE, key_purpose);
}
/**
* @brief Configure the mode which is used by the Key Manager for the generator key deployement process
* @brief Configure the mode which is used by the Key Manager for the generator key deployment process
*/
static inline void key_mgr_ll_set_key_generator_mode(const esp_key_mgr_key_generator_mode_t mode)
{

3
components/hal/esp32p4/include/hal/mpi_ll.h
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@ -40,7 +40,8 @@ static inline void mpi_ll_reset_register(void)
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_rsa = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_rsa = 0;
// Clear reset on digital signature and ECDSA, otherwise RSA is held in reset
// Clear reset on digital signature, ECDSA and parent crypto, otherwise RSA is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;
}

3
components/hal/esp32p4/include/hal/sha_ll.h
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@ -36,7 +36,8 @@ static inline void sha_ll_reset_register(void)
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_sha = 1;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_sha = 0;
// Clear reset on digital signature, hmac and ecdsa, otherwise SHA is held in reset
// Clear reset on digital signature, hmac, ecdsa and parent crypto, otherwise SHA is held in reset
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ds = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_hmac = 0;
HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_ecdsa = 0;