kopia lustrzana https://github.com/espressif/esp-idf
system: add an example showing how to run non-iram ISR when operating Flash
Armando
rodzic
1d02e638bd
commit
a36e5188e9
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@ -54,6 +54,19 @@ example_test_pytest_esp32c3_generic:
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- ESP32C3
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- Example_GENERIC
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example_test_pytest_esp32c3_flash_suspend:
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extends:
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- .pytest_examples_dir_template
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- .rules:test:example_test-esp32c3
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needs:
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- build_examples_pytest_esp32c3
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variables:
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TARGET: esp32c3
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ENV_MARKER: flash_suspend
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tags:
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- ESP32C3_IDF
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- UT_T1_Flash_Suspend
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# for parallel jobs, CI_JOB_NAME will be "job_name index/total" (for example, "IT_001 1/2")
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# we need to convert to pattern "job_name_index.yml"
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.define_config_file_name: &define_config_file_name |
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@ -0,0 +1,6 @@
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# The following lines of boilerplate have to be in your project's
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# CMakeLists in this exact order for cmake to work correctly
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cmake_minimum_required(VERSION 3.5)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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project(flash_suspend)
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@ -0,0 +1,115 @@
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| Supported Targets | ESP32-C3 |
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| ----------------- | -------- |
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# Flash Suspend Example
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## Overview
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One problem in IDF is that during Flash operations (via either ESP Flash, NVS or Partition APIs), concurrent execution of code residing in Flash will lead to a crash. Consequently, all ISRs and their callbacks need to be placed in internal RAM.
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Background: In IDF, executable code (instructions) are usually placed in Flash.
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However, by using the auto-suspend feature, it is not necessary to put ISRs and their callbacks into internal RAM anymore.
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Here we define two sets of Flash operations:
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SET1: Operations where CPU fetches data and instructions from Flash.
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SET2: `ESP Flash` driver operations and other operations from drivers based on `ESP Flash` (NVS, Partition drivers, etc.).
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- During Erase Operation (SET 2), if there is a SET 1 request, the ongoing SET 2 Flash operation will be suspended automatically, the Erase Operation is interrupted, CPU will get a chance to read from Flash. After CPU's access, the Flash chip will be resumed automatically and the Erase Operation will continue.
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- During other Flash Operations (SET 2), if there is a SET 1 request, CPU will usually wait until the SET 2 operation finishes, then get the chance to read from Flash.
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## Example Process
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As mentioned above, in this example we go through the following steps:
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`General Steps`:
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1. Create a partition for Flash Erase Operation
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2. Configure a GP timer to trigger an alarm once
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3. Register a timer alarm event callback
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`Misc Steps`:
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4. Make the callback call a function (`s_function_in_flash`) in Flash
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5. Start the timer
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6. Start a Flash Erase Operation
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7. Pause the timer
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`IRAM Steps`:
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8. Make the callback call a function (`s_function_in_iram`) in Internal RAM
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9. Start the timer
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10. Start a Flash Erase Operation
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## Example Result
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You will see an ISR happening during each of the Flash Erase Operations (SET 2).
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### `Misc Steps`
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The ISR callback calls a function, and its main body is in `.flash.text`. You may use
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```
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riscv32-esp-elf-objdump
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```
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to see the concrete instructions of the function. It contains around 10 instructions. The Cache will read from the Flash, if these instructions are not cached yet. CPU then fetches these instructions from the Cache. For ESP32C3, the time between the call to `s_function_in_flash`, and its execution, is around 32 us, when the CPU frequency is 160MHz. Apart from the context switch time, instruction execution time (please refer to the example comments to know the function body), and other hardware overheads, there is still around 28.5us, which should be the time for the Cache synchronisation (see note 1.).
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----
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*note 1*
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**Cache synchronisation:**
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In ESP-IDF, the cache is a small memory system which can provide low-latency access to a block of data, residing in Flash or PSRAM. The CPU accesses Flash and PSRAM via the cache. When the CPU requested data that is not in the cache, we have a cache miss and the data will be synchronized to cache from either Flash or PSRAM.
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In this example, for `Misc Steps`, the involved cache synchronization time is a bit longer, since a SET 2 Flash Erase Operation is ongoing. The ESP chip will send a suspend command to the Flash chip, to suspend the ongoing Erase Operation, and let the Cache access the Flash chip.
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*The Cache synchronisation time would be even longer, if more instructions need to be fetched.*
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### `IRAM Steps`
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The ISR callback calls a function, and its main body is in `.iram0.text`. For ESP32C3, the time between `s_function_in_iram` is called, and its execution, is around 3.8 us, when the CPU frequency is 160MHz. Under this circumstance, around 400 times instruction execution will cost about 2.5us. Apart from the context switch and other overheads, these instructions in Internal RAM can be fetched within 1us.
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## Conclusion for Code Placement
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For ESP-IDF drivers, we usually expect the ISR callbacks to be short, simple and useful. It's more like a way to inform users of a hardware event. And the event handling routines should be delegated to the main program.
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What should not be used in an ISR callback:
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- printf (there is mutex underneath)
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- long log print (even using `esp_rom_printf`)
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- blocking logic
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Based on these principles,
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- If the `CONFIG_SPI_FLASH_AUTO_SUSPEND` is not enabled/supported, usually an ISR and its callbacks should be put in Internal RAM, when you also need to operate the Flash via `ESP Flash` driver and the drivers based on `ESP Flash`.
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- If the `CONFIG_SPI_FLASH_AUTO_SUSPEND` is enabled, the ISR function and its callbacks **can** be put in Flash. But their maximum response time will be **prolonged**.
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- If the `CONFIG_SPI_FLASH_AUTO_SUSPEND` is enabled, a Flash Erase Operation would be interrupted by the CPU / Cache access request to the Flash. Therefore, when the ISR happens frequently, the Flash Erase Operation may be **prolonged** a lot.
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### Configure the project
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To change the `Auto suspend long erase/write operations` (`CONFIG_SPI_FLASH_AUTO_SUSPEND`), open the project configuration menu (`idf.py menuconfig`).
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Navigate to `Component config -> SPI Flash driver` menu.
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### Build and Flash
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Run `idf.py -p PORT flash monitor` to build and flash the project..
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(To exit the serial monitor, type ``Ctrl-]``.)
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See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects.
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## Example Output
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```
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I (285) Example: found partition 'storage1' at offset 0x110000 with size 0x80000
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I (5615) Example: Flash Driver Erase Operation finishes, duration:
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2635600.01 us
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I (5615) Example: During Erase, ISR callback function(in flash) response time:
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32.26 us
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I (8295) Example: Flash Driver Erase Operation finishes, duration:
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2626830.69 us
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I (8295) Example: During Erase, ISR callback function(in iram) response time:
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3.83 us
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I (8295) Example: Finish
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```
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## Troubleshooting
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For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you soon.
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@ -0,0 +1,2 @@
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idf_component_register(SRCS "app_main.c"
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INCLUDE_DIRS "")
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@ -0,0 +1,153 @@
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* In this example, we show you a way to make an ISR-based callback work during Flash operations, when the ISR-based
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* callback is put in Flash.
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*
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* Please read the README.md to know more details about this feature!
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*/
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#include <stdbool.h>
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#include <stdio.h>
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#include "sdkconfig.h"
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#include "esp_log.h"
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#include "esp_attr.h"
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#include "esp_cpu.h"
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#include "esp_partition.h"
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#include "driver/gptimer.h"
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#define TIMER_RESOLUTION_HZ (1 * 1000 * 1000) // 1MHz resolution
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#define TIMER_ALARM_PERIOD_S 1 // Alarm period 1s
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#if CONFIG_IDF_TARGET_ESP32C3
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#define CPU_FREQ_MHZ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ
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#endif
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#define RECORD_TIME_PREPARE() uint32_t __t1, __t2
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#define RECORD_TIME_START() do {__t1 = esp_cpu_get_ccount();} while(0)
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#define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_ccount(); p_time = (__t2 - __t1);} while(0)
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#define GET_US_BY_CCOUNT(t) ((double)(t)/CPU_FREQ_MHZ)
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const static char *TAG = "Example";
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DRAM_ATTR static uint32_t s_t1;
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DRAM_ATTR static uint32_t s_flash_func_t2;
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DRAM_ATTR static uint32_t s_iram_func_t2;
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static NOINLINE_ATTR void s_function_in_flash(void)
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{
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/**
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* - Here we will have few instructions in .flash.text
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* - Cache will read from Flash to get the instructions synchronized.
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* - CPU will execute around 400 times.
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*/
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for (int i = 0; i < 100; i++) {
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asm volatile("nop");
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}
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s_flash_func_t2 = esp_cpu_get_ccount();
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}
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static IRAM_ATTR NOINLINE_ATTR void s_funtion_in_iram(void)
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{
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/**
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* - Here we will have few instructions in .iram0.text
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* - CPU will execute around 400 times.
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*/
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for (int i = 0; i < 100; i++) {
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asm volatile("nop");
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}
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s_iram_func_t2 = esp_cpu_get_ccount();
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}
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static bool IRAM_ATTR on_gptimer_alarm_cb(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx)
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{
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bool is_flash = *(bool *)user_ctx;
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s_t1 = esp_cpu_get_ccount();
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if (is_flash) {
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s_function_in_flash();
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} else {
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s_funtion_in_iram();
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}
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return false;
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}
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static const esp_partition_t *s_get_partition(void)
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{
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//Find the "storage1" partition defined in `partitions.csv`
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const esp_partition_t *result = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_ANY, "storage1");
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if (!result) {
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ESP_LOGE(TAG, "Can't find the partition, please define it correctly in `partitions.csv`");
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abort();
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}
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return result;
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}
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void app_main(void)
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{
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//Get the partition used for SPI1 erase operation
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const esp_partition_t *part = s_get_partition();
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ESP_LOGI(TAG, "found partition '%s' at offset 0x%x with size 0x%x", part->label, part->address, part->size);
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//Erase whole region
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ESP_ERROR_CHECK(esp_flash_erase_region(part->flash_chip, part->address, part->size));
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gptimer_handle_t gptimer = NULL;
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gptimer_config_t timer_config = {
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.clk_src = GPTIMER_CLK_SRC_APB,
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.direction = GPTIMER_COUNT_UP,
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.resolution_hz = TIMER_RESOLUTION_HZ,
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};
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ESP_ERROR_CHECK(gptimer_new_timer(&timer_config, &gptimer));
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gptimer_alarm_config_t alarm_config = {
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.reload_count = 0,
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.alarm_count = 1 * 1000 * 1000,
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.flags.auto_reload_on_alarm = false,
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};
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ESP_ERROR_CHECK(gptimer_set_alarm_action(gptimer, &alarm_config));
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gptimer_event_callbacks_t cbs = {
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.on_alarm = on_gptimer_alarm_cb,
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};
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bool is_flash = true;
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ESP_ERROR_CHECK(gptimer_register_event_callbacks(gptimer, &cbs, &is_flash));
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ESP_ERROR_CHECK(gptimer_start(gptimer));
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uint32_t erase_time = 0;
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RECORD_TIME_PREPARE();
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RECORD_TIME_START();
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ESP_ERROR_CHECK(esp_flash_erase_region(part->flash_chip, part->address, part->size));
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RECORD_TIME_END(erase_time);
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ESP_ERROR_CHECK(gptimer_stop(gptimer));
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ESP_LOGI(TAG, "Flash Driver Erase Operation finishes, duration:\n\t\t%0.2f us", GET_US_BY_CCOUNT(erase_time));
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ESP_LOGI(TAG, "During Erase, ISR callback function(in flash) response time:\n\t\t%0.2f us", GET_US_BY_CCOUNT(s_flash_func_t2 - s_t1));
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//Let the timer alarm callback to run code reside in .iram0.text
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is_flash = false;
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ESP_ERROR_CHECK(gptimer_set_raw_count(gptimer, 0));
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ESP_ERROR_CHECK(gptimer_set_alarm_action(gptimer, &alarm_config));
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ESP_ERROR_CHECK(gptimer_start(gptimer));
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RECORD_TIME_START();
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//Erase whole region
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ESP_ERROR_CHECK(esp_flash_erase_region(part->flash_chip, part->address, part->size));
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RECORD_TIME_END(erase_time);
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ESP_ERROR_CHECK(gptimer_stop(gptimer));
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ESP_LOGI(TAG, "Flash Driver Erase Operation finishes, duration:\n\t\t%0.2f us", GET_US_BY_CCOUNT(erase_time));
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ESP_LOGI(TAG, "During Erase, ISR callback function(in iram) response time:\n\t\t%0.2f us", GET_US_BY_CCOUNT(s_iram_func_t2 - s_t1));
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ESP_LOGI(TAG, "Finish");
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ESP_ERROR_CHECK(gptimer_del_timer(gptimer));
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}
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@ -0,0 +1,6 @@
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# Name, Type, SubType, Offset, Size, Flags
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# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
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nvs, data, nvs, 0x9000, 0x6000,
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phy_init, data, phy, 0xf000, 0x1000,
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factory, app, factory, 0x10000, 1M,
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storage1, data, fat, , 512K,
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@ -0,0 +1,21 @@
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# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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from pytest_embedded.dut import Dut
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@pytest.mark.esp32c3
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@pytest.mark.flash_suspend
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@pytest.mark.parametrize('config', [
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'flash_suspend',
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], indirect=True)
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def test_flash_suspend_example(dut: Dut) -> None:
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dut.expect_exact('found partition')
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res = dut.expect(r'During Erase, ISR callback function\(in flash\) response time:\s+(\d+(\.\d{1,2})) us')
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response_time = res.group(1).decode('utf8')
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assert 0 <= float(response_time) < 40
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res = dut.expect(r'During Erase, ISR callback function\(in iram\) response time:\s+(\d+(\.\d{1,2})) us')
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response_time = res.group(1).decode('utf8')
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assert 0 <= float(response_time) < 5
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@ -0,0 +1,4 @@
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CONFIG_SPI_FLASH_AUTO_SUSPEND=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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@ -0,0 +1,2 @@
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CONFIG_ESP32C3_DEFAULT_CPU_FREQ_160=y
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CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ=160
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@ -13,6 +13,7 @@ markers =
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esp32s3: support esp32s3 target
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esp32c3: support esp32c3 target
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generic: tests should be run on generic runners
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flash_suspend: support flash suspend feature
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# log related
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log_auto_indent = True
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Reference in New Issue