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feat(ulp): add basic support for running lp core on C5

pull/13431/head
Marius Vikhammer 2024-03-08 14:22:07 +08:00
rodzic 966f47f5c1
commit a32fb07e7b
24 zmienionych plików z 239 dodań i 116 usunięć
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125
components/hal/esp32c5/include/hal/lp_core_ll.h 100644
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@ -0,0 +1,125 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/*******************************************************************************
* NOTICE
* The hal is not public api, don't use it in application code.
******************************************************************************/
#pragma once
#include <stdbool.h>
#include "soc/lpperi_struct.h"
#include "soc/pmu_struct.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LP_CORE_LL_WAKEUP_SOURCE_HP_CPU BIT(0) // Started by HP core (1 single wakeup)
#define LP_CORE_LL_WAKEUP_SOURCE_LP_UART BIT(1) // Enable wake-up by a certain number of LP UART RX pulses
#define LP_CORE_LL_WAKEUP_SOURCE_LP_IO BIT(2) // Enable wake-up by LP IO interrupt
#define LP_CORE_LL_WAKEUP_SOURCE_ETM BIT(3) // Enable wake-up by ETM event
#define LP_CORE_LL_WAKEUP_SOURCE_LP_TIMER BIT(4) // Enable wake-up by LP timer
/**
* @brief Enable the bus clock for LP-coree
*
* @param enable true to enable, false to disable
*/
static inline void lp_core_ll_enable_bus_clock(bool enable)
{
LPPERI.clk_en.lp_cpu_ck_en = enable;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define lp_core_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; lp_core_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the lp_core module
*
*/
static inline void lp_core_ll_reset_register(void)
{
LPPERI.reset_en.lp_cpu_reset_en = 1;
LPPERI.reset_en.lp_cpu_reset_en = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define lp_core_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; lp_core_ll_reset_register(__VA_ARGS__)
/**
* @brief Trigger a LP_CORE_LL_WAKEUP_SOURCE_HP_CPU wake-up on the lp core
*
*/
static inline void lp_core_ll_hp_wake_lp(void)
{
PMU.hp_lp_cpu_comm.hp_trigger_lp = 1;
}
/**
* @brief Enables the LP core debug module, allowing JTAG to connect
*
* @param enable enable if true, disable if false
*/
static inline void lp_core_ll_debug_module_enable(bool enable)
{
LPPERI.cpu.lpcore_dbgm_unavaliable = !enable;
}
/**
* @brief Enables CPU reset at sleep
*
* @param enable enable if true, disable if false
*/
static inline void lp_core_ll_rst_at_sleep_enable(bool enable)
{
PMU.lp_ext.pwr0.slp_reset_en = enable;
}
/**
* @brief Stall lp core cpu at sleep request
*
* @param enable enable if true, disable if false
*/
static inline void lp_core_ll_stall_at_sleep_request(bool enable)
{
PMU.lp_ext.pwr0.slp_stall_en = enable;
}
/**
* @brief Set the wake-up source for the lp-core
*
* @param flags wake-up sources
*/
static inline void lp_core_ll_set_wakeup_source(uint32_t flags)
{
PMU.lp_ext.pwr1.wakeup_en = flags;
}
/**
* @brief Get wake-up sources for the LP-core
*/
static inline uint32_t lp_core_ll_get_wakeup_source(void)
{
return PMU.lp_ext.pwr1.wakeup_en;
}
/**
* @brief Request PMU to put LP core to sleep
*/
static inline void lp_core_ll_request_sleep(void)
{
PMU.lp_ext.pwr1.sleep_req = 1;
}
#ifdef __cplusplus
}
#endif

13
components/hal/esp32c5/include/hal/pmu_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -671,6 +671,17 @@ FORCE_INLINE_ATTR uint32_t pmu_ll_get_sysclk_sleep_select_state(pmu_dev_t *hw)
return hw->clk_state0.sysclk_slp_sel;
}
FORCE_INLINE_ATTR uint32_t pmu_ll_lp_get_interrupt_raw(pmu_dev_t *hw)
{
return hw->lp_ext.int_raw.val;
}
FORCE_INLINE_ATTR void pmu_ll_lp_clear_intsts_mask(pmu_dev_t *hw, uint32_t mask)
{
hw->lp_ext.int_clr.val = mask;
}
#ifdef __cplusplus
}
#endif

8
components/soc/esp32c5/beta3/include/soc/Kconfig.soc_caps.in
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@ -67,6 +67,14 @@ config SOC_LP_PERIPHERALS_SUPPORTED
bool
default y
config SOC_ULP_SUPPORTED
bool
default y
config SOC_LP_CORE_SUPPORTED
bool
default y
config SOC_SPI_FLASH_SUPPORTED
bool
default y

2
components/soc/esp32c5/beta3/include/soc/soc_caps.h
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@ -63,6 +63,8 @@
// #define SOC_LP_AON_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638, IDF-8640
#define SOC_LP_PERIPHERALS_SUPPORTED 1
// #define SOC_LP_I2C_SUPPORTED 1 // TODO: [ESP32C5] IDF-8634
#define SOC_ULP_SUPPORTED 1
#define SOC_LP_CORE_SUPPORTED 1
// #define SOC_ULP_LP_UART_SUPPORTED 1 // TODO: [ESP32C5] IDF-8633
// #define SOC_CLK_TREE_SUPPORTED 1 // TODO: [ESP32C5] IDF-8642
// #define SOC_ASSIST_DEBUG_SUPPORTED 1 // TODO: [ESP32C5] IDF-8663

17
components/ulp/CMakeLists.txt
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@ -9,8 +9,7 @@ set(includes "")
if(CONFIG_ULP_COPROC_ENABLED OR (CONFIG_IDF_DOC_BUILD AND CONFIG_SOC_ULP_SUPPORTED))
list(APPEND includes
ulp_common/include
ulp_common/include/${target})
ulp_common/include)
endif()
if(CONFIG_ULP_COPROC_TYPE_FSM OR (CONFIG_IDF_DOC_BUILD AND CONFIG_SOC_ULP_FSM_SUPPORTED))
@ -53,14 +52,20 @@ endif()
if(CONFIG_ULP_COPROC_TYPE_LP_CORE)
list(APPEND srcs
"lp_core/lp_core.c"
"lp_core/shared/ulp_lp_core_memory_shared.c"
"lp_core/shared/ulp_lp_core_lp_timer_shared.c"
"lp_core/lp_core_uart.c")
"lp_core/shared/ulp_lp_core_memory_shared.c")
if(CONFIG_IDF_TARGET_ESP32C6)
if(CONFIG_SOC_ULP_LP_UART_SUPPORTED)
list(APPEND srcs "lp_core/lp_core_uart.c")
endif()
if(CONFIG_SOC_LP_I2C_SUPPORTED)
# Add to P4 TODO IDF-7540
list(APPEND srcs "lp_core/lp_core_i2c.c")
endif()
if(CONFIG_SOC_LP_TIMER_SUPPORTED)
list(APPEND srcs "lp_core/shared/ulp_lp_core_lp_timer_shared.c")
endif()
endif()
idf_component_register(SRCS ${srcs}

9
components/ulp/cmake/CMakeLists.txt
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@ -101,8 +101,15 @@ elseif(ULP_COCPU_IS_LP_CORE)
target_link_options(${ULP_APP_NAME} PRIVATE "-Wl,--no-warn-rwx-segments")
target_link_options(${ULP_APP_NAME} PRIVATE -Wl,--gc-sections)
target_link_options(${ULP_APP_NAME} PRIVATE -Wl,-Map=${CMAKE_CURRENT_BINARY_DIR}/${ULP_APP_NAME}.map)
if(${IDF_TARGET} STREQUAL "esp32c5")
set(target_folder "esp32c5/mp")
else()
set(target_folder ${IDF_TARGET})
endif()
target_link_options(${ULP_APP_NAME}
PRIVATE SHELL:-T ${IDF_PATH}/components/soc/${IDF_TARGET}/ld/${IDF_TARGET}.peripherals.ld)
PRIVATE SHELL:-T ${IDF_PATH}/components/soc/${target_folder}/ld/${IDF_TARGET}.peripherals.ld)
if(CONFIG_ESP_ROM_HAS_LP_ROM)
target_link_options(${ULP_APP_NAME}

13
components/ulp/lp_core/lp_core.c
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@ -6,6 +6,7 @@
#include "sdkconfig.h"
#include "esp_rom_caps.h"
#include "soc/soc_caps.h"
#include "esp_log.h"
#include "esp_assert.h"
#include "soc/pmu_reg.h"
@ -17,7 +18,7 @@
#include "ulp_lp_core_lp_timer_shared.h"
#include "hal/lp_core_ll.h"
#if CONFIG_IDF_TARGET_ESP32P4
#if CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5
#define LP_CORE_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define LP_CORE_RCC_ATOMIC()
@ -55,19 +56,17 @@ esp_err_t ulp_lp_core_run(ulp_lp_core_cfg_t* cfg)
return ESP_ERR_INVALID_ARG;
}
ulp_lp_core_memory_shared_cfg_t* shared_mem = ulp_lp_core_memory_shared_cfg_get();
#if ESP_ROM_HAS_LP_ROM
/* If we have a LP ROM we boot from it, before jumping to the app code */
intptr_t boot_addr;
if (cfg->skip_lp_rom_boot) {
boot_addr = RTC_SLOW_MEM;
boot_addr = (intptr_t)RTC_SLOW_MEM;
} else {
boot_addr = SOC_LP_ROM_LOW;
}
lp_core_ll_set_boot_address(boot_addr);
lp_core_ll_set_app_boot_address(RTC_SLOW_MEM);
lp_core_ll_set_app_boot_address((intptr_t)RTC_SLOW_MEM);
#endif //ESP_ROM_HAS_LP_ROM
LP_CORE_RCC_ATOMIC() {
@ -96,6 +95,9 @@ esp_err_t ulp_lp_core_run(ulp_lp_core_cfg_t* cfg)
lp_core_ll_hp_wake_lp();
}
#if SOC_LP_TIMER_SUPPORTED
ulp_lp_core_memory_shared_cfg_t* shared_mem = ulp_lp_core_memory_shared_cfg_get();
if (cfg->wakeup_source & ULP_LP_CORE_WAKEUP_SOURCE_LP_TIMER) {
if (!cfg->lp_timer_sleep_duration_us) {
ESP_LOGI(TAG, "LP timer specified as wakeup source, but no sleep duration set. ULP will only wake-up once unless it calls ulp_lp_core_lp_timer_set_wakeup_time()");
@ -105,6 +107,7 @@ esp_err_t ulp_lp_core_run(ulp_lp_core_cfg_t* cfg)
/* Set first wakeup alarm */
ulp_lp_core_lp_timer_set_wakeup_time(cfg->lp_timer_sleep_duration_us);
}
#endif
if (cfg->wakeup_source & (ULP_LP_CORE_WAKEUP_SOURCE_LP_UART | ULP_LP_CORE_WAKEUP_SOURCE_LP_IO | ULP_LP_CORE_WAKEUP_SOURCE_ETM)) {
ESP_LOGE(TAG, "Wake-up source not yet supported");

8
components/ulp/lp_core/lp_core/lp_core_i2c.c
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@ -5,12 +5,15 @@
*/
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#include "ulp_lp_core_i2c.h"
#include "ulp_lp_core_utils.h"
#include "soc/lp_i2c_reg.h"
#include "soc/i2c_struct.h"
#include "hal/i2c_ll.h"
#if SOC_LP_I2C_SUPPORTED
#define LP_I2C_FIFO_LEN SOC_LP_I2C_FIFO_LEN
#define LP_I2C_READ_MODE I2C_MASTER_READ
#define LP_I2C_WRITE_MODE I2C_MASTER_WRITE
@ -19,9 +22,8 @@
#define MIN(x, y) (((x) < (y)) ? (x) : (y))
#if !CONFIG_IDF_TARGET_ESP32P4 // # Add to P4 TODO IDF-7540
/* I2C LL context */
i2c_dev_t *dev = I2C_LL_GET_HW(LP_I2C_NUM_0);
/* ACK check enable control variable. Enabled by default */
@ -479,4 +481,4 @@ esp_err_t lp_core_i2c_master_write_read_device(i2c_port_t lp_i2c_num, uint16_t d
return ret;
}
#endif //!CONFIG_IDF_TARGET_ESP32P4
#endif //!SOC_LP_I2C_SUPPORTED

4
components/ulp/lp_core/lp_core/lp_core_startup.c
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@ -3,6 +3,7 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/soc_caps.h"
#include "ulp_lp_core_utils.h"
#include "ulp_lp_core_lp_timer_shared.h"
#include "ulp_lp_core_memory_shared.h"
@ -17,11 +18,14 @@ void lp_core_startup()
main();
ulp_lp_core_memory_shared_cfg_t* shared_mem = ulp_lp_core_memory_shared_cfg_get();
#if SOC_LP_TIMER_SUPPORTED
uint64_t sleep_duration = shared_mem->sleep_duration_us;
if (sleep_duration) {
ulp_lp_core_lp_timer_set_wakeup_time(sleep_duration);
}
#endif //SOC_LP_TIMER_SUPPORTED
ulp_lp_core_halt();
}

22
components/ulp/lp_core/lp_core/lp_core_utils.c
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@ -5,24 +5,27 @@
*/
#include <stdint.h>
#include "soc/soc_caps.h"
#include "riscv/csr.h"
#include "soc/soc.h"
#include "soc/pmu_reg.h"
#include "hal/misc.h"
#include "hal/lp_core_ll.h"
#include "hal/etm_ll.h"
#include "hal/lp_timer_ll.h"
#include "hal/pmu_ll.h"
#include "hal/uart_ll.h"
#include "hal/rtc_io_ll.h"
/* LP_FAST_CLK is not very accurate, for now use a rough estimate */
#if CONFIG_IDF_TARGET_ESP32C6
#define LP_CORE_CPU_FREQUENCY_HZ 16000000
#elif CONFIG_IDF_TARGET_ESP32P4
#define LP_CORE_CPU_FREQUENCY_HZ 16000000 // TRM says 20 MHz by default, but we tune it closer to 16 MHz
#if SOC_ETM_SUPPORTED
#include "hal/etm_ll.h"
#endif
#if SOC_LP_TIMER_SUPPORTED
#include "hal/lp_timer_ll.h"
#endif
/* LP_FAST_CLK is not very accurate, for now use a rough estimate */
#define LP_CORE_CPU_FREQUENCY_HZ 16000000 // For P4 TRM says 20 MHz by default, but we tune it closer to 16 MHz
static uint32_t lp_wakeup_cause = 0;
void ulp_lp_core_update_wakeup_cause(void)
@ -45,17 +48,22 @@ void ulp_lp_core_update_wakeup_cause(void)
rtcio_ll_clear_interrupt_status();
}
#if SOC_ETM_SUPPORTED
if ((lp_core_ll_get_wakeup_source() & LP_CORE_LL_WAKEUP_SOURCE_ETM) \
&& etm_ll_is_lpcore_wakeup_triggered()) {
lp_wakeup_cause |= LP_CORE_LL_WAKEUP_SOURCE_ETM;
etm_ll_clear_lpcore_wakeup_status();
}
#endif /* SOC_ETM_SUPPORTED */
#if SOC_LP_TIMER_SUPPORTED
if ((lp_core_ll_get_wakeup_source() & LP_CORE_LL_WAKEUP_SOURCE_LP_TIMER) \
&& (lp_timer_ll_get_lp_intr_raw(&LP_TIMER) & LP_TIMER_MAIN_TIMER_LP_INT_RAW)) {
lp_wakeup_cause |= LP_CORE_LL_WAKEUP_SOURCE_LP_TIMER;
lp_timer_ll_clear_lp_intsts_mask(&LP_TIMER, LP_TIMER_MAIN_TIMER_LP_INT_CLR);
}
#endif /* SOC_LP_TIMER_SUPPORTED */
}
uint32_t ulp_lp_core_get_wakeup_cause()

5
components/ulp/lp_core/shared/ulp_lp_core_lp_timer_shared.c
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@ -4,6 +4,9 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "ulp_lp_core_lp_timer_shared.h"
#include "soc/soc_caps.h"
#if SOC_LP_TIMER_SUPPORTED
#include "hal/lp_timer_ll.h"
#include "hal/clk_tree_ll.h"
#include "soc/rtc.h"
@ -49,3 +52,5 @@ void ulp_lp_core_lp_timer_disable(void)
lp_timer_ll_set_target_enable(lp_timer_context.dev, TIMER_ID, false);
lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_context.dev);
}
#endif //SOC_LP_TIMER_SUPPORTED

21
components/ulp/test_apps/lp_core/main/CMakeLists.txt
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@ -1,17 +1,19 @@
set(app_sources "test_app_main.c" "test_lp_core.c")
# Add to P4 TODO IDF-7540
if(CONFIG_IDF_TARGET_ESP32C6)
if(CONFIG_SOC_LP_I2C_SUPPORTED)
list(APPEND app_sources "test_lp_core_i2c.c")
endif()
set(lp_core_sources "lp_core/test_main.c")
set(lp_core_sources_counter "lp_core/test_main_counter.c")
set(lp_core_sources_set_timer_wakeup "lp_core/test_main_set_timer_wakeup.c")
if(CONFIG_SOC_LP_TIMER_SUPPORTED)
set(lp_core_sources_set_timer_wakeup "lp_core/test_main_set_timer_wakeup.c")
endif()
set(lp_core_sources_gpio "lp_core/test_main_gpio.c")
# Add to P4 TODO IDF-7540
if(CONFIG_IDF_TARGET_ESP32C6)
if(CONFIG_SOC_LP_I2C_SUPPORTED)
set(lp_core_sources_i2c "lp_core/test_main_i2c.c")
endif()
@ -24,10 +26,13 @@ set(lp_core_exp_dep_srcs ${app_sources})
ulp_embed_binary(lp_core_test_app "${lp_core_sources}" "${lp_core_exp_dep_srcs}")
ulp_embed_binary(lp_core_test_app_counter "${lp_core_sources_counter}" "${lp_core_exp_dep_srcs}")
ulp_embed_binary(lp_core_test_app_set_timer_wakeup "${lp_core_sources_set_timer_wakeup}" "${lp_core_exp_dep_srcs}")
if(CONFIG_SOC_LP_TIMER_SUPPORTED)
ulp_embed_binary(lp_core_test_app_set_timer_wakeup "${lp_core_sources_set_timer_wakeup}" "${lp_core_exp_dep_srcs}")
endif()
ulp_embed_binary(lp_core_test_app_gpio "${lp_core_sources_gpio}" "${lp_core_exp_dep_srcs}")
# Add to P4 TODO IDF-7540
if(CONFIG_IDF_TARGET_ESP32C6)
if(CONFIG_SOC_LP_I2C_SUPPORTED)
ulp_embed_binary(lp_core_test_app_i2c "${lp_core_sources_i2c}" "${lp_core_exp_dep_srcs}")
endif()

12
components/ulp/test_apps/lp_core/main/test_lp_core.c
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@ -7,10 +7,15 @@
#include <stdio.h>
#include <inttypes.h>
#include <sys/time.h>
#include "soc/soc_caps.h"
#include "esp_rom_caps.h"
#include "lp_core_test_app.h"
#include "lp_core_test_app_counter.h"
#if SOC_LP_TIMER_SUPPORTED
#include "lp_core_test_app_set_timer_wakeup.h"
#endif
#include "lp_core_test_app_gpio.h"
#include "ulp_lp_core.h"
#include "ulp_lp_core_lp_timer_shared.h"
@ -116,7 +121,7 @@ TEST_CASE("Test LP core delay", "[lp_core]")
#define LP_TIMER_TEST_DURATION_S (5)
#define LP_TIMER_TEST_SLEEP_DURATION_US (20000)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4, ESP32C5)
static void do_ulp_wakeup_deepsleep(lp_core_test_commands_t ulp_cmd)
{
@ -207,7 +212,7 @@ TEST_CASE_MULTIPLE_STAGES("LP Timer can wakeup lp core periodically during deep
do_ulp_wakeup_with_lp_timer_deepsleep,
check_reset_reason_and_sleep_duration);
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4)
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32P4, ESP32C5)
TEST_CASE("LP Timer can wakeup lp core periodically", "[lp_core]")
{
@ -271,6 +276,7 @@ TEST_CASE("LP core can be stopped and and started again from main CPU", "[ulp]")
}
}
#if SOC_LP_TIMER_SUPPORTED
TEST_CASE("LP core can schedule next wake-up time by itself", "[ulp]")
{
int64_t start, test_duration;
@ -313,3 +319,5 @@ TEST_CASE("LP core gpio tests", "[ulp]")
TEST_ASSERT_TRUE(ulp_gpio_test_succeeded);
}
#endif //SOC_LP_TIMER_SUPPORTED

19
components/ulp/ulp_common/include/esp32/ulp_common_defs.h
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@ -1,19 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ULP_COMMON_DEFS_H__
#define __ULP_COMMON_DEFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RTC_SLOW_MEM ((uint32_t*) 0x50000000) /*!< RTC slow memory, 8k size */
#ifdef __cplusplus
}
#endif
#endif // __ULP_COMMON_DEFS_H__

19
components/ulp/ulp_common/include/esp32p4/ulp_common_defs.h
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@ -1,19 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ULP_COMMON_DEFS_H__
#define __ULP_COMMON_DEFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RTC_SLOW_MEM (0x50108000) /*!< LP memory, 32k size */
#ifdef __cplusplus
}
#endif
#endif // __ULP_COMMON_DEFS_H__

19
components/ulp/ulp_common/include/esp32s2/ulp_common_defs.h
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@ -1,19 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ULP_COMMON_DEFS_H__
#define __ULP_COMMON_DEFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RTC_SLOW_MEM ((uint32_t*) 0x50000000) /*!< RTC slow memory, 8k size */
#ifdef __cplusplus
}
#endif
#endif // __ULP_COMMON_DEFS_H__

19
components/ulp/ulp_common/include/esp32s3/ulp_common_defs.h
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@ -1,19 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ULP_COMMON_DEFS_H__
#define __ULP_COMMON_DEFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RTC_SLOW_MEM ((uint32_t*) 0x50000000) /*!< RTC slow memory, 8k size */
#ifdef __cplusplus
}
#endif
#endif // __ULP_COMMON_DEFS_H__

6
components/ulp/ulp_common/include/esp32c6/ulp_common_defs.h → components/ulp/ulp_common/include/ulp_common_defs.h
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@ -1,16 +1,18 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ULP_COMMON_DEFS_H__
#define __ULP_COMMON_DEFS_H__
#include "soc/soc.h"
#ifdef __cplusplus
extern "C" {
#endif
#define RTC_SLOW_MEM ((uint32_t*) 0x50000000) /*!< LP memory, 16k size */
#define RTC_SLOW_MEM ((uint32_t*) SOC_RTC_DATA_LOW)
#ifdef __cplusplus
}

1
docs/doxygen/Doxyfile_esp32
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@ -9,7 +9,6 @@ INPUT += \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/soc_caps.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/uart_channel.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/touch_sensor_channel.h \
$(PROJECT_PATH)/components/ulp/ulp_common/include/$(IDF_TARGET)/ulp_common_defs.h \
$(PROJECT_PATH)/components/ulp/ulp_fsm/include/$(IDF_TARGET)/ulp.h \
$(PROJECT_PATH)/components/bt/include/$(IDF_TARGET)/include/esp_bt.h \
$(PROJECT_PATH)/components/perfmon/include/xtensa_perfmon_access.h \

9
docs/doxygen/Doxyfile_esp32c5
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@ -5,3 +5,12 @@ INPUT += \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/beta3/include/soc/clk_tree_defs.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/beta3/include/soc/gpio_num.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/beta3/include/soc/uart_channel.h \
$(PROJECT_PATH)/components/ulp/lp_core/include/lp_core_i2c.h \
$(PROJECT_PATH)/components/ulp/lp_core/include/lp_core_uart.h \
$(PROJECT_PATH)/components/ulp/lp_core/include/ulp_lp_core.h \
$(PROJECT_PATH)/components/ulp/lp_core/lp_core/include/ulp_lp_core_gpio.h \
$(PROJECT_PATH)/components/ulp/lp_core/lp_core/include/ulp_lp_core_i2c.h \
$(PROJECT_PATH)/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h \
$(PROJECT_PATH)/components/ulp/lp_core/lp_core/include/ulp_lp_core_uart.h \
$(PROJECT_PATH)/components/ulp/lp_core/lp_core/include/ulp_lp_core_utils.h \
$(PROJECT_PATH)/components/ulp/ulp_common/include/ulp_common.h \

1
docs/doxygen/Doxyfile_esp32s2
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@ -8,7 +8,6 @@ INPUT += \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/soc_caps.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/uart_channel.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/touch_sensor_channel.h \
$(PROJECT_PATH)/components/ulp/ulp_common/include/$(IDF_TARGET)/ulp_common_defs.h \
$(PROJECT_PATH)/components/ulp/ulp_fsm/include/$(IDF_TARGET)/ulp.h \
$(PROJECT_PATH)/components/touch_element/include/touch_element/touch_button.h \
$(PROJECT_PATH)/components/touch_element/include/touch_element/touch_element.h \

1
docs/doxygen/Doxyfile_esp32s3
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@ -7,7 +7,6 @@ INPUT += \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/soc_caps.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/touch_sensor_channel.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/uart_channel.h \
$(PROJECT_PATH)/components/ulp/ulp_common/include/$(IDF_TARGET)/ulp_common_defs.h \
$(PROJECT_PATH)/components/ulp/ulp_fsm/include/$(IDF_TARGET)/ulp.h \
$(PROJECT_PATH)/components/touch_element/include/touch_element/touch_button.h \
$(PROJECT_PATH)/components/touch_element/include/touch_element/touch_element.h \

1
docs/en/api-reference/system/ulp.rst
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@ -184,6 +184,5 @@ API Reference
.. include-build-file:: inc/ulp_fsm_common.inc
.. include-build-file:: inc/ulp_common.inc
.. include-build-file:: inc/ulp_common_defs.inc
.. _binutils-esp32ulp toolchain: https://github.com/espressif/binutils-gdb

1
docs/zh_CN/api-reference/system/ulp.rst
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@ -184,6 +184,5 @@ API 参考
.. include-build-file:: inc/ulp_fsm_common.inc
.. include-build-file:: inc/ulp_common.inc
.. include-build-file:: inc/ulp_common_defs.inc
.. _binutils-esp32ulp 工具链: https://github.com/espressif/binutils-gdb