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change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode

pull/13550/head
xiehang 2024-03-25 17:54:38 +08:00
rodzic d5c6e53e8a
commit 9d7bd6a8dd
19 zmienionych plików z 217 dodań i 155 usunięć
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6
components/esp_phy/CMakeLists.txt
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@ -9,6 +9,8 @@ if(IDF_TARGET STREQUAL "esp32p4" OR IDF_TARGET STREQUAL "esp32c61")
return()
endif()
if(CONFIG_ESP_PHY_ENABLED)
set(srcs "src/phy_override.c" "src/lib_printf.c" "src/phy_common.c")
if(CONFIG_APP_NO_BLOBS)
@ -46,6 +48,7 @@ if(CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN_EMBED)
set(embed_files "${build_dir}/phy_multiple_init_data.bin")
endif()
endif()
endif()
# [refactor-todo]: requires "driver" component for periph_ctrl header file
idf_component_register(SRCS "${srcs}"
@ -55,6 +58,7 @@ idf_component_register(SRCS "${srcs}"
EMBED_FILES ${embed_files}
)
if(CONFIG_ESP_PHY_ENABLED)
set(target_name "${idf_target}")
target_link_directories(${COMPONENT_LIB} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}")
@ -122,3 +126,5 @@ if(CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION)
esptool_py_flash_target_image(${phy_name}-flash ${phy_name} "${phy_partition_offset}" "${phy_init_data_bin}")
esptool_py_flash_target_image(flash ${phy_name} "${phy_partition_offset}" "${phy_init_data_bin}")
endif()
endif()

23
components/esp_phy/Kconfig
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@ -1,12 +1,17 @@
menu "PHY"
config ESP_PHY_ENABLED
bool
default y if (SOC_PHY_SUPPORTED)
if (ESP_PHY_ENABLED)
config ESP_PHY_CALIBRATION_AND_DATA_STORAGE
bool "Store phy calibration data in NVS"
default y
help
If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
will be performed and stored in NVS. Normally, only partial calibration will be performed.
PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full
calibration will be performed and stored in NVS. Normally, only partial calibration will be performed.
If this option is disabled, full calibration will be performed.
If it's easy that your board calibrate bad data, choose 'n'.
@ -112,13 +117,14 @@ menu "PHY"
|| ESP_CONSOLE_USB_SERIAL_JTAG || ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG
default n
help
On some ESP targets, the USB PHY can interfere with WiFi thus lowering WiFi performance. As a result, on
those affected ESP targets, the ESP PHY library's initialization will automatically disable the USB PHY to
get best WiFi performance. This option controls whether or not the ESP PHY library will keep the USB PHY
enabled on initialization.
On some ESP targets, the USB PHY can interfere with WiFi thus lowering WiFi performance.
As a result, on those affected ESP targets, the ESP PHY library's initialization will automatically
disable the USB PHY to get best WiFi performance.
This option controls whether or not the ESP PHY library will keep the USB PHY enabled on
initialization.
Note: This option can be disabled to increase WiFi performance. However, disabling this option will also
mean that the USB PHY cannot be used while WiFi is enabled.
Note: This option can be disabled to increase WiFi performance. However, disabling this option will
also mean that the USB PHY cannot be used while WiFi is enabled.
config ESP_PHY_ENABLE_CERT_TEST
@ -167,4 +173,5 @@ menu "PHY"
help
If enabled, there will be some logs while pll tracking
endif
endmenu # PHY

11
components/esp_wifi/src/wifi_init.c
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@ -18,8 +18,10 @@
#include "esp_wpa.h"
#include "esp_netif.h"
#include "private/esp_coexist_internal.h"
#ifdef CONFIG_ESP_PHY_ENABLED
#include "esp_phy_init.h"
#include "esp_private/phy.h"
#endif
#if __has_include("esp_psram.h")
#include "esp_psram.h"
#endif
@ -183,7 +185,9 @@ static esp_err_t wifi_deinit_internal(void)
s_wifi_modem_sleep_lock = NULL;
}
#endif
#ifdef CONFIG_ESP_PHY_ENABLED
esp_wifi_power_domain_off();
#endif
#if CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT
wifi_beacon_monitor_config_t monitor_config = WIFI_BEACON_MONITOR_CONFIG_DEFAULT(false);
@ -217,8 +221,9 @@ static esp_err_t wifi_deinit_internal(void)
esp_wifi_internal_modem_state_configure(false);
esp_pm_unregister_skip_light_sleep_callback(sleep_modem_wifi_modem_state_skip_light_sleep);
#endif
#ifdef CONFIG_ESP_PHY_ENABLED
esp_phy_modem_deinit();
#endif
s_wifi_inited = false;
return err;
@ -379,7 +384,9 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
coex_init();
#endif
esp_wifi_set_log_level();
#ifdef CONFIG_ESP_PHY_ENABLED
esp_wifi_power_domain_on();
#endif
#ifdef CONFIG_ESP_WIFI_FTM_ENABLE
esp_chip_info_t info = {0};
esp_chip_info(&info);
@ -393,7 +400,9 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
esp_mac_bb_pd_mem_init();
esp_wifi_mac_pd_mem_init();
#endif
#ifdef CONFIG_ESP_PHY_ENABLED
esp_phy_modem_init();
#endif
#if CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
if (sleep_modem_wifi_modem_state_enabled()) {
esp_pm_register_skip_light_sleep_callback(sleep_modem_wifi_modem_state_skip_light_sleep);

4
components/soc/esp32/include/soc/Kconfig.soc_caps.in
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@ -51,6 +51,10 @@ config SOC_PCNT_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_WIFI_SUPPORTED
bool
default y

1
components/soc/esp32/include/soc/soc_caps.h
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@ -70,6 +70,7 @@
#define SOC_SDMMC_HOST_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_WIFI_SUPPORTED 1
#define SOC_SDIO_SLAVE_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1

4
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
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@ -27,6 +27,10 @@ config SOC_GPTIMER_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_BT_SUPPORTED
bool
default y

1
components/soc/esp32c2/include/soc/soc_caps.h
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@ -23,6 +23,7 @@
#define SOC_GDMA_SUPPORTED 1
#define SOC_AHB_GDMA_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
#define SOC_WIFI_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1

4
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
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@ -51,6 +51,10 @@ config SOC_XT_WDT_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_WIFI_SUPPORTED
bool
default y

1
components/soc/esp32c3/include/soc/soc_caps.h
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@ -29,6 +29,7 @@
#define SOC_USB_SERIAL_JTAG_SUPPORTED 1
#define SOC_TEMP_SENSOR_SUPPORTED 1
#define SOC_XT_WDT_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_WIFI_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
#define SOC_EFUSE_KEY_PURPOSE_FIELD 1

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
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@ -67,6 +67,10 @@ config SOC_TEMP_SENSOR_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_WIFI_SUPPORTED
bool
default y

1
components/soc/esp32c6/include/soc/soc_caps.h
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@ -33,6 +33,7 @@
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_USB_SERIAL_JTAG_SUPPORTED 1
#define SOC_TEMP_SENSOR_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_WIFI_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
#define SOC_ULP_SUPPORTED 1

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
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@ -7,6 +7,10 @@ config SOC_UART_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_SUPPORTS_SECURE_DL_MODE
bool
default y

1
components/soc/esp32c61/include/soc/soc_caps.h
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@ -28,6 +28,7 @@
// #define SOC_ASYNC_MEMCPY_SUPPORTED 1 //TODO: [ESP32C61] IDF-9315
// #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9319
// #define SOC_TEMP_SENSOR_SUPPORTED 1 //TODO: [ESP32C61] IDF-9322
#define SOC_PHY_SUPPORTED 1
// #define SOC_WIFI_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
// #define SOC_ULP_SUPPORTED 1

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@ -43,6 +43,10 @@ config SOC_TWAI_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_BT_SUPPORTED
bool
default y

1
components/soc/esp32h2/include/soc/soc_caps.h
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@ -27,6 +27,7 @@
#define SOC_PCNT_SUPPORTED 1
#define SOC_MCPWM_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
#define SOC_IEEE802154_SUPPORTED 1

4
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
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@ -51,6 +51,10 @@ config SOC_PCNT_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_WIFI_SUPPORTED
bool
default y

1
components/soc/esp32s2/include/soc/soc_caps.h
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@ -49,6 +49,7 @@
#define SOC_RISCV_COPROC_SUPPORTED 1
#define SOC_USB_OTG_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_WIFI_SUPPORTED 1
#define SOC_ULP_SUPPORTED 1
#define SOC_CCOMP_TIMER_SUPPORTED 1

4
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
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@ -35,6 +35,10 @@ config SOC_PCNT_SUPPORTED
bool
default y
config SOC_PHY_SUPPORTED
bool
default y
config SOC_WIFI_SUPPORTED
bool
default y

1
components/soc/esp32s3/include/soc/soc_caps.h
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@ -25,6 +25,7 @@
#define SOC_ADC_SUPPORTED 1
#define SOC_UART_SUPPORTED 1
#define SOC_PCNT_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1
#define SOC_WIFI_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1