kopia lustrzana https://github.com/espressif/esp-idf
change(soc): remove clockoutput hardware unavaliable registers
rodzic
ffd5d1fd66
commit
8ad94931f2
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@ -4248,13 +4248,6 @@ extern "C" {
|
|||
#define HP_SYS_CLKRST_REG_DBG_CH1_SEL_M (HP_SYS_CLKRST_REG_DBG_CH1_SEL_V << HP_SYS_CLKRST_REG_DBG_CH1_SEL_S)
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH1_SEL_V 0x000000FFU
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH1_SEL_S 8
|
||||
/** HP_SYS_CLKRST_REG_DBG_CH2_SEL : R/W; bitpos: [23:16]; default: 255;
|
||||
* Reserved
|
||||
*/
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_SEL 0x000000FFU
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_SEL_M (HP_SYS_CLKRST_REG_DBG_CH2_SEL_V << HP_SYS_CLKRST_REG_DBG_CH2_SEL_S)
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_SEL_V 0x000000FFU
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_SEL_S 16
|
||||
/** HP_SYS_CLKRST_REG_DBG_CH0_DIV_NUM : R/W; bitpos: [31:24]; default: 3;
|
||||
* Reserved
|
||||
*/
|
||||
|
@ -4274,13 +4267,6 @@ extern "C" {
|
|||
#define HP_SYS_CLKRST_REG_DBG_CH1_DIV_NUM_M (HP_SYS_CLKRST_REG_DBG_CH1_DIV_NUM_V << HP_SYS_CLKRST_REG_DBG_CH1_DIV_NUM_S)
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH1_DIV_NUM_V 0x000000FFU
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH1_DIV_NUM_S 0
|
||||
/** HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM : R/W; bitpos: [15:8]; default: 3;
|
||||
* Reserved
|
||||
*/
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM 0x000000FFU
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM_M (HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM_V << HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM_S)
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM_V 0x000000FFU
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_DIV_NUM_S 8
|
||||
/** HP_SYS_CLKRST_REG_DBG_CH0_EN : R/W; bitpos: [16]; default: 0;
|
||||
* Reserved
|
||||
*/
|
||||
|
@ -4295,13 +4281,6 @@ extern "C" {
|
|||
#define HP_SYS_CLKRST_REG_DBG_CH1_EN_M (HP_SYS_CLKRST_REG_DBG_CH1_EN_V << HP_SYS_CLKRST_REG_DBG_CH1_EN_S)
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH1_EN_V 0x00000001U
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH1_EN_S 17
|
||||
/** HP_SYS_CLKRST_REG_DBG_CH2_EN : R/W; bitpos: [18]; default: 0;
|
||||
* Reserved
|
||||
*/
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_EN (BIT(18))
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_EN_M (HP_SYS_CLKRST_REG_DBG_CH2_EN_V << HP_SYS_CLKRST_REG_DBG_CH2_EN_S)
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_EN_V 0x00000001U
|
||||
#define HP_SYS_CLKRST_REG_DBG_CH2_EN_S 18
|
||||
|
||||
/** HP_SYS_CLKRST_HPCORE_WDT_RESET_SOURCE0_REG register
|
||||
* Reserved
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/**
|
||||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@ -2859,10 +2859,7 @@ typedef union {
|
|||
* Reserved
|
||||
*/
|
||||
uint32_t reg_dbg_ch1_sel:8;
|
||||
/** reg_dbg_ch2_sel : R/W; bitpos: [23:16]; default: 255;
|
||||
* Reserved
|
||||
*/
|
||||
uint32_t reg_dbg_ch2_sel:8;
|
||||
uint32_t reserved_16:8;
|
||||
/** reg_dbg_ch0_div_num : R/W; bitpos: [31:24]; default: 3;
|
||||
* Reserved
|
||||
*/
|
||||
|
@ -2880,10 +2877,7 @@ typedef union {
|
|||
* Reserved
|
||||
*/
|
||||
uint32_t reg_dbg_ch1_div_num:8;
|
||||
/** reg_dbg_ch2_div_num : R/W; bitpos: [15:8]; default: 3;
|
||||
* Reserved
|
||||
*/
|
||||
uint32_t reg_dbg_ch2_div_num:8;
|
||||
uint32_t reserved_8:8;
|
||||
/** reg_dbg_ch0_en : R/W; bitpos: [16]; default: 0;
|
||||
* Reserved
|
||||
*/
|
||||
|
@ -2892,11 +2886,7 @@ typedef union {
|
|||
* Reserved
|
||||
*/
|
||||
uint32_t reg_dbg_ch1_en:1;
|
||||
/** reg_dbg_ch2_en : R/W; bitpos: [18]; default: 0;
|
||||
* Reserved
|
||||
*/
|
||||
uint32_t reg_dbg_ch2_en:1;
|
||||
uint32_t reserved_19:13;
|
||||
uint32_t reserved_18:14;
|
||||
};
|
||||
uint32_t val;
|
||||
} hp_sys_clkrst_dbg_clk_ctrl1_reg_t;
|
||||
|
|
Ładowanie…
Reference in New Issue