From 86772165761a2f5291592a470908fd6d2627f58a Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Wed, 19 Oct 2022 15:57:24 +0800 Subject: [PATCH] esp32h2: renaming esp32h2 to esp32h4 --- .gitlab/ci/build.yml | 18 +- .gitlab/ci/dependencies/dependencies.yml | 4 +- .gitlab/ci/host-test.yml | 4 +- .gitlab/ci/rules.yml | 48 +- .gitlab/ci/target-test.yml | 12 +- Kconfig | 26 +- README.md | 2 +- README_CN.md | 2 +- components/app_trace/Kconfig | 2 +- components/app_update/esp_ota_ops.c | 4 +- components/app_update/include/esp_ota_ops.h | 2 +- .../main/ld/esp32h2/bootloader.rom.ld | 6 - .../ld/{esp32h2 => esp32h4}/bootloader.ld | 2 +- .../main/ld/esp32h4/bootloader.rom.ld | 6 + ...h2.c => bootloader_flash_config_esp32h4.c} | 6 +- .../include/esp_app_format.h | 8 +- .../private_include/bootloader_signature.h | 4 +- .../src/bootloader_clock_init.c | 2 +- .../src/bootloader_console.c | 6 +- .../bootloader_support/src/bootloader_efuse.c | 2 +- ..._esp32h2.c => bootloader_random_esp32h4.c} | 2 +- .../src/bootloader_utility.c | 12 +- .../bootloader_esp32h4.c} | 6 +- .../src/{esp32h2 => esp32h4}/bootloader_sha.c | 2 +- .../src/{esp32h2 => esp32h4}/bootloader_soc.c | 0 .../flash_encryption_secure_features.c | 0 .../secure_boot_secure_features.c | 0 .../bootloader_support/src/esp_image_format.c | 4 +- .../bootloader_support/src/flash_encrypt.c | 4 +- .../src/secure_boot_v2/secure_boot.c | 4 +- .../secure_boot_signature_priv.h | 4 +- components/bt/CMakeLists.txt | 14 +- .../{esp32h2 => esp32h4}/Kconfig.in | 0 .../bt/controller/{esp32h2 => esp32h4}/bt.c | 8 +- components/bt/host/bluedroid/Kconfig.in | 2 +- components/bt/host/nimble/Kconfig.in | 8 +- .../{esp32h2 => esp32h4}/include/esp_bt.h | 0 .../{esp32h2 => esp32h4}/include/esp_bt_cfg.h | 0 .../nimble/include/nimble/ble_hci_trans.h | 2 +- .../nimble/include/nimble/nimble_port.h | 2 +- components/bt/sdkconfig.rename.esp32h2 | 0 .../deprecated/driver/adc_types_legacy.h | 4 +- .../test/include/test/test_common_spi.h | 2 +- components/driver/test/test_i2c.c | 4 +- components/driver/test/test_ledc.c | 2 +- components/driver/test/test_rs485.c | 2 +- components/driver/test/test_spi_bus_lock.c | 4 +- components/driver/test/test_spi_slave.c | 2 +- components/driver/test/test_spi_slave_hd.c | 2 +- .../driver/test_apps/gpio/main/test_gpio.h | 2 +- .../i2s_test_apps/test_inc/test_i2s.h | 2 +- components/driver/uart.c | 2 +- components/efuse/efuse_table_gen.py | 2 +- .../{esp32h2 => esp32h4}/esp_efuse_fields.c | 2 +- .../esp_efuse_rtc_calib.c | 0 .../{esp32h2 => esp32h4}/esp_efuse_table.c | 6 +- .../{esp32h2 => esp32h4}/esp_efuse_table.csv | 4 +- .../{esp32h2 => esp32h4}/esp_efuse_utility.c | 0 .../include/esp_efuse_chip.h | 2 +- .../include/esp_efuse_rtc_calib.h | 0 .../include/esp_efuse_table.h | 2 +- .../private_include/esp_efuse_utility.h | 0 .../efuse/{esp32h2 => esp32h4}/sources.cmake | 0 .../include/adc_cali_schemes.h | 0 .../gdbstub_esp32h4.c} | 0 .../gdbstub_target_config.h | 0 components/esp_hw_support/cpu.c | 4 +- components/esp_hw_support/esp_clk.c | 6 +- .../esp_hw_support/include/esp_chip_info.h | 2 +- components/esp_hw_support/include/esp_mac.h | 4 +- .../include/esp_private/esp_sleep_internal.h | 2 +- .../{esp32h2 => esp32h4}/esp_crypto_lock.h | 0 .../include/soc/{esp32h2 => esp32h4}/esp_ds.h | 0 .../include/soc/{esp32h2 => esp32h4}/rtc.h | 2 +- .../{esp32h2 => esp32h4}/soc_memprot_types.h | 2 +- components/esp_hw_support/mac_addr.c | 6 +- .../port/{esp32h2 => esp32h4}/CMakeLists.txt | 0 .../{esp32h2 => esp32h4}/Kconfig.hw_support | 22 +- .../port/{esp32h2 => esp32h4}/Kconfig.mac | 12 +- .../port/{esp32h2 => esp32h4}/Kconfig.rtc | 0 .../port/{esp32h2 => esp32h4}/chip_info.c | 2 +- .../{esp32h2 => esp32h4}/esp_crypto_lock.c | 0 .../port/{esp32h2 => esp32h4}/esp_ds.c | 2 +- .../port/{esp32h2 => esp32h4}/esp_memprot.c | 0 .../port/{esp32h2 => esp32h4}/i2c_brownout.h | 0 .../port/{esp32h2 => esp32h4}/rtc_clk.c | 10 +- .../port/{esp32h2 => esp32h4}/rtc_clk_init.c | 12 +- .../port/{esp32h2 => esp32h4}/rtc_init.c | 4 +- .../port/{esp32h2 => esp32h4}/rtc_pm.c | 2 +- .../port/{esp32h2 => esp32h4}/rtc_sleep.c | 10 +- .../port/{esp32h2 => esp32h4}/rtc_time.c | 4 +- .../{esp32h2 => esp32h4}/sar_periph_ctrl.c | 0 .../port/{esp32h2 => esp32h4}/systimer.c | 0 .../esp_hw_support/sdkconfig.rename.esp32h2 | 7 - components/esp_hw_support/sleep_gpio.c | 2 +- components/esp_hw_support/sleep_modes.c | 10 +- components/esp_hw_support/test/test_rtc_clk.c | 6 +- components/esp_phy/CMakeLists.txt | 16 +- .../esp_phy/esp32h2/include/phy_init_data.h | 30 - .../esp_phy/esp32h4/include/phy_init_data.h | 22 + components/esp_phy/src/phy_init_esp32hxx.c | 22 +- .../esp_pm/include/{esp32h2 => esp32h4}/pm.h | 4 +- components/esp_pm/include/esp_pm.h | 4 +- components/esp_pm/pm_impl.c | 18 +- components/esp_pm/pm_trace.c | 2 +- components/esp_pm/test/test_pm.c | 14 +- components/esp_rom/CMakeLists.txt | 10 +- components/esp_rom/README.md | 4 +- .../{esp32h2 => esp32h4}/Kconfig.soc_caps.in | 0 .../{esp32h2 => esp32h4}/esp_rom_caps.h | 0 .../ld/rev1/esp32h4.rom.api.ld} | 0 .../ld/rev1/esp32h4.rom.ld} | 0 .../ld/rev1/esp32h4.rom.libgcc.ld} | 0 .../ld/rev1/esp32h4.rom.newlib-nano.ld} | 0 .../ld/rev1/esp32h4.rom.newlib.ld} | 0 .../ld/rev1/esp32h4.rom.version.ld} | 0 .../ld/rev2/esp32h4.rom.api.ld} | 0 .../ld/rev2/esp32h4.rom.ld} | 4 +- .../ld/rev2/esp32h4.rom.libgcc.ld} | 4 +- .../ld/rev2/esp32h4.rom.newlib-nano.ld} | 4 +- .../ld/rev2/esp32h4.rom.newlib.ld} | 4 +- .../ld/rev2/esp32h4.rom.version.ld} | 2 +- .../include/esp32h2/rom/apb_backup_dma.h | 25 - .../include/{esp32h2 => esp32h4}/rom/aes.h | 18 +- .../include/esp32h4/rom/apb_backup_dma.h | 17 + .../include/{esp32h2 => esp32h4}/rom/bigint.h | 18 +- .../include/{esp32h2 => esp32h4}/rom/cache.h | 22 +- .../include/{esp32h2 => esp32h4}/rom/crc.h | 18 +- .../rom/digital_signature.h | 18 +- .../include/{esp32h2 => esp32h4}/rom/efuse.h | 0 .../{esp32h2 => esp32h4}/rom/esp_flash.h | 18 +- .../{esp32h2 => esp32h4}/rom/ets_sys.h | 18 +- .../include/{esp32h2 => esp32h4}/rom/gpio.h | 4 +- .../include/{esp32h2 => esp32h4}/rom/hmac.h | 18 +- .../{esp32h2 => esp32h4}/rom/libc_stubs.h | 18 +- .../include/{esp32h2 => esp32h4}/rom/lldesc.h | 0 .../{esp32h2 => esp32h4}/rom/md5_hash.h | 0 .../include/{esp32h2 => esp32h4}/rom/miniz.h | 6 + .../{esp32h2 => esp32h4}/rom/rom_layout.h | 0 .../{esp32h2 => esp32h4}/rom/rsa_pss.h | 18 +- .../include/{esp32h2 => esp32h4}/rom/rtc.h | 0 .../{esp32h2 => esp32h4}/rom/secure_boot.h | 0 .../include/{esp32h2 => esp32h4}/rom/sha.h | 18 +- .../{esp32h2 => esp32h4}/rom/spi_flash.h | 0 .../include/{esp32h2 => esp32h4}/rom/tjpgd.h | 6 + .../include/{esp32h2 => esp32h4}/rom/uart.h | 18 +- components/esp_system/Kconfig | 4 +- components/esp_system/crosscore_int.c | 8 +- components/esp_system/fpga_overrides.c | 6 +- .../include/esp_private/crosscore_int.h | 4 +- .../ld/{esp32h2 => esp32h4}/memory.ld.in | 12 +- .../ld/{esp32h2 => esp32h4}/sections.ld.in | 6 +- components/esp_system/port/cpu_start.c | 12 +- .../soc/{esp32h2 => esp32h4}/CMakeLists.txt | 0 .../port/soc/{esp32h2 => esp32h4}/Kconfig.cpu | 6 +- .../soc/{esp32h2 => esp32h4}/Kconfig.system | 2 +- .../soc/{esp32h2 => esp32h4}/apb_backup_dma.c | 20 +- .../soc/{esp32h2 => esp32h4}/cache_err_int.c | 2 +- .../port/soc/{esp32h2 => esp32h4}/clk.c | 6 +- .../soc/{esp32h2 => esp32h4}/reset_reason.c | 20 +- .../{esp32h2 => esp32h4}/system_internal.c | 4 +- .../esp_system/sdkconfig.rename.esp32h2 | 11 - components/esp_system/system_time.c | 4 +- .../esp_system/test/test_reset_reason.c | 2 +- components/esp_timer/src/esp_timer.c | 4 +- components/esp_timer/src/ets_timer_legacy.c | 4 +- components/esp_timer/src/system_time.c | 4 +- .../esp_timer/test_apps/main/test_ets_timer.c | 4 +- components/esp_wifi/Kconfig | 2 +- components/esptool_py/Kconfig.projbuild | 2 +- components/esptool_py/project_include.cmake | 8 +- components/freertos/Kconfig | 2 +- components/hal/CMakeLists.txt | 14 +- components/hal/cache_hal.c | 4 +- components/hal/esp32h2/include/hal/mpu_ll.h | 53 -- .../hal/{esp32h2 => esp32h4}/brownout_hal.c | 0 .../hal/{esp32h2 => esp32h4}/efuse_hal.c | 0 .../hal/{esp32h2 => esp32h4}/hmac_hal.c | 18 +- .../include/hal/adc_hal_conf.h | 0 .../{esp32h2 => esp32h4}/include/hal/adc_ll.h | 8 +- .../{esp32h2 => esp32h4}/include/hal/aes_ll.h | 0 .../include/hal/cache_ll.h | 16 +- .../include/hal/clk_gate_ll.h | 0 .../include/hal/clk_tree_ll.h | 6 +- .../include/hal/dedic_gpio_cpu_ll.h | 0 .../{esp32h2 => esp32h4}/include/hal/ds_ll.h | 18 +- .../{esp32h2 => esp32h4}/include/hal/ecc_ll.h | 0 .../include/hal/efuse_hal.h | 0 .../include/hal/efuse_ll.h | 2 +- .../include/hal/gdma_ll.h | 0 .../include/hal/gpspi_flash_ll.h | 2 +- .../include/hal/hmac_hal.h | 24 +- .../include/hal/hmac_ll.h | 20 +- .../{esp32h2 => esp32h4}/include/hal/i2c_ll.h | 0 .../{esp32h2 => esp32h4}/include/hal/i2s_ll.h | 4 +- .../include/hal/ledc_ll.h | 0 .../include/hal/memprot_ll.h | 2 +- .../{esp32h2 => esp32h4}/include/hal/mmu_ll.h | 4 +- components/hal/esp32h4/include/hal/mpu_ll.h | 45 ++ .../include/hal/mwdt_ll.h | 0 .../include/hal/regi2c_ctrl_ll.h | 6 +- .../{esp32h2 => esp32h4}/include/hal/rmt_ll.h | 0 .../include/hal/rtc_cntl_ll.h | 4 +- .../include/hal/rwdt_ll.h | 0 .../include/hal/sar_ctrl_ll.h | 0 .../{esp32h2 => esp32h4}/include/hal/sdm_ll.h | 0 .../{esp32h2 => esp32h4}/include/hal/sha_ll.h | 18 +- .../include/hal/spi_flash_encrypted_ll.h | 18 +- .../include/hal/spi_flash_ll.h | 0 .../{esp32h2 => esp32h4}/include/hal/spi_ll.h | 8 +- .../include/hal/spimem_flash_ll.h | 2 +- .../include/hal/systimer_ll.h | 0 .../include/hal/temperature_sensor_ll.h | 4 +- .../include/hal/timer_ll.h | 0 .../include/hal/twai_ll.h | 2 +- .../include/hal/uart_ll.h | 0 .../include/hal/uhci_ll.h | 18 +- .../include/hal/uhci_types.h | 20 +- .../include/hal/usb_phy_ll.h | 0 .../include/hal/usb_serial_jtag_ll.h | 18 +- .../include/rev1/hal/gpio_ll.h | 2 +- .../include/rev2/hal/gpio_ll.h | 6 +- .../hal/{esp32h2 => esp32h4}/rtc_cntl_hal.c | 0 components/hal/include/hal/adc_types.h | 2 +- .../hal/include/hal/adc_types_private.h | 6 +- components/hal/include/hal/gpio_types.h | 4 +- components/hal/include/hal/sha_types.h | 4 +- components/hal/mmu_hal.c | 4 +- components/hal/spi_flash_hal_iram.c | 2 +- .../port/{esp32h2 => esp32h4}/memory_layout.c | 2 +- components/heap/port/memory_layout_utils.c | 4 +- .../idf_performance_target.h | 0 components/ieee802154/.build-test-rules.yml | 4 +- components/ieee802154/CMakeLists.txt | 12 +- components/ieee802154/Kconfig | 4 +- .../test_apps/test_ieee802154/README.md | 2 +- .../test_ieee802154/pytest_test_ieee802154.py | 4 +- .../test_ieee802154/sdkconfig.defaults | 3 +- .../port/{esp32h2 => esp32h4}/bignum.c | 2 +- .../mbedtls/port/esp_ds/esp_rsa_sign_alt.c | 4 +- components/mbedtls/port/sha/dma/sha.c | 4 +- components/newlib/newlib_init.c | 8 +- components/newlib/port/esp_time_impl.c | 6 +- components/newlib/sdkconfig.rename.esp32h2 | 7 - components/newlib/test/test_newlib.c | 4 +- components/newlib/test/test_time.c | 4 +- components/openthread/CMakeLists.txt | 12 +- components/openthread/Kconfig | 2 +- components/soc/esp32h2/i2c_periph.c | 30 - .../soc/esp32h2/include/soc/interrupt_reg.h | 1 - components/soc/esp32h2/include/soc/soc_pins.h | 24 - components/soc/esp32h2/include/soc/spi_pins.h | 34 - components/soc/esp32h2/include/soc/wdev_reg.h | 20 - components/soc/esp32h2/ledc_periph.c | 25 - .../soc/{esp32h2 => esp32h4}/CMakeLists.txt | 6 +- .../soc/{esp32h2 => esp32h4}/adc_periph.c | 0 .../{esp32h2 => esp32h4}/dedic_gpio_periph.c | 0 .../soc/{esp32h2 => esp32h4}/gdma_periph.c | 0 .../soc/{esp32h2 => esp32h4}/gpio_periph.c | 6 +- .../soc/{esp32h2 => esp32h4}/i2c_bias.h | 0 components/soc/esp32h4/i2c_periph.c | 22 + components/soc/{esp32h2 => esp32h4}/i2c_pmu.h | 0 components/soc/{esp32h2 => esp32h4}/i2c_ulp.h | 0 .../soc/{esp32h2 => esp32h4}/i2s_periph.c | 0 .../include/rev1/soc/assist_debug_reg.h | 0 .../include/rev1/soc/clkrst_reg.h | 0 .../include/rev1/soc/efuse_reg.h | 2 +- .../include/rev1/soc/efuse_struct.h | 0 .../include/rev1/soc/gpio_reg.h | 0 .../include/rev1/soc/gpio_sd_reg.h | 0 .../include/rev1/soc/gpio_sig_map.h | 0 .../include/rev1/soc/gpio_struct.h | 0 .../include/rev1/soc/interrupt_core0_reg.h | 0 .../include/rev1/soc/io_mux_reg.h | 0 .../include/rev1/soc/rtc_cntl_reg.h | 0 .../include/rev1/soc/rtc_cntl_struct.h | 0 .../include/rev1/soc/sensitive_reg.h | 0 .../include/rev1/soc/sensitive_struct.h | 0 .../include/rev1/soc/syscon_reg.h | 0 .../include/rev1/soc/syscon_struct.h | 0 .../include/rev1/soc/system_reg.h | 0 .../include/rev1/soc/system_struct.h | 0 .../include/rev1/soc/usb_serial_jtag_reg.h | 0 .../include/rev1/soc/usb_serial_jtag_struct.h | 2 +- .../include/rev2/soc/assist_debug_reg.h | 2 +- .../include/rev2/soc/clkrst_reg.h | 0 .../include/rev2/soc/ecc_mult_reg.h | 0 .../include/rev2/soc/ecc_mult_struct.h | 0 .../include/rev2/soc/efuse_reg.h | 2 +- .../include/rev2/soc/efuse_struct.h | 0 .../include/rev2/soc/gpio_reg.h | 0 .../include/rev2/soc/gpio_sd_reg.h | 0 .../include/rev2/soc/gpio_sig_map.h | 0 .../include/rev2/soc/gpio_struct.h | 0 .../include/rev2/soc/interrupt_core0_reg.h | 2 +- .../include/rev2/soc/io_mux_reg.h | 0 .../include/rev2/soc/rtc_cntl_reg.h | 0 .../include/rev2/soc/rtc_cntl_struct.h | 0 .../include/rev2/soc/sensitive_reg.h | 2 +- .../include/rev2/soc/sensitive_struct.h | 2 +- .../include/rev2/soc/syscon_reg.h | 2 +- .../include/rev2/soc/syscon_struct.h | 2 +- .../include/rev2/soc/system_reg.h | 0 .../include/rev2/soc/system_struct.h | 2 +- .../include/rev2/soc/usb_serial_jtag_reg.h | 0 .../include/rev2/soc/usb_serial_jtag_struct.h | 2 +- .../include/soc/Kconfig.soc_caps.in | 0 .../include/soc/adc_channel.h | 0 .../include/soc/apb_saradc_reg.h | 18 +- .../include/soc/apb_saradc_struct.h | 18 +- .../{esp32h2 => esp32h4}/include/soc/bb_reg.h | 18 +- .../include/soc/boot_mode.h | 18 +- .../include/soc/clk_tree_defs.h | 2 +- .../include/soc/clkout_channel.h | 2 +- .../include/soc/dport_access.h | 0 .../include/soc/dport_reg.h | 0 .../include/soc/ext_mem_defs.h | 0 .../include/soc/extmem_reg.h | 18 +- .../{esp32h2 => esp32h4}/include/soc/fe_reg.h | 18 +- .../include/soc/gdma_channel.h | 0 .../include/soc/gdma_reg.h | 0 .../include/soc/gdma_struct.h | 0 .../include/soc/gpio_pins.h | 4 +- .../include/soc/gpio_sd_struct.h | 0 .../include/soc/hwcrypto_reg.h | 0 .../include/soc/i2c_reg.h | 0 .../include/soc/i2c_struct.h | 0 .../include/soc/i2s_reg.h | 0 .../include/soc/i2s_struct.h | 0 .../soc/esp32h4/include/soc/interrupt_reg.h | 7 + .../include/soc/ledc_reg.h | 18 +- .../include/soc/ledc_struct.h | 0 .../{esp32h2 => esp32h4}/include/soc/mmu.h | 0 .../include/soc/nrx_reg.h | 18 +- .../include/soc/periph_defs.h | 0 .../include/soc/reg_base.h | 0 .../include/soc/regi2c_bbpll.h | 0 .../include/soc/regi2c_bias.h | 0 .../include/soc/regi2c_brownout.h | 0 .../include/soc/regi2c_defs.h | 0 .../include/soc/regi2c_dig_reg.h | 0 .../include/soc/regi2c_lp_bias.h | 0 .../include/soc/regi2c_pmu.h | 0 .../include/soc/regi2c_saradc.h | 0 .../include/soc/regi2c_ulp.h | 0 .../include/soc/reset_reasons.h | 0 .../include/soc/rmt_reg.h | 0 .../include/soc/rmt_struct.h | 0 .../{esp32h2 => esp32h4}/include/soc/rtc.h | 2 +- .../include/soc/rtc_i2c_reg.h | 18 +- .../include/soc/rtc_i2c_struct.h | 18 +- .../{esp32h2 => esp32h4}/include/soc/soc.h | 4 +- .../include/soc/soc_caps.h | 28 +- components/soc/esp32h4/include/soc/soc_pins.h | 16 + .../include/soc/spi_mem_reg.h | 18 +- .../include/soc/spi_mem_struct.h | 18 +- components/soc/esp32h4/include/soc/spi_pins.h | 26 + .../include/soc/spi_reg.h | 18 +- .../include/soc/spi_struct.h | 18 +- .../include/soc/systimer_reg.h | 0 .../include/soc/systimer_struct.h | 0 .../include/soc/timer_group_reg.h | 2 +- .../include/soc/timer_group_struct.h | 2 +- .../include/soc/twai_struct.h | 2 +- .../include/soc/uart_channel.h | 6 +- .../include/soc/uart_pins.h | 18 +- .../include/soc/uart_reg.h | 0 .../include/soc/uart_struct.h | 0 .../include/soc/uhci_reg.h | 0 .../include/soc/uhci_struct.h | 0 components/soc/esp32h4/include/soc/wdev_reg.h | 12 + .../soc/{esp32h2 => esp32h4}/interrupts.c | 0 .../ld/esp32h4.peripherals.ld} | 0 components/soc/esp32h4/ledc_periph.c | 17 + .../soc/{esp32h2 => esp32h4}/rmt_periph.c | 0 .../soc/{esp32h2 => esp32h4}/sdm_periph.c | 0 .../soc/{esp32h2 => esp32h4}/spi_periph.c | 0 .../temperature_sensor_periph.c | 0 .../soc/{esp32h2 => esp32h4}/timer_periph.c | 0 .../soc/{esp32h2 => esp32h4}/uart_periph.c | 18 +- components/spi_flash/cache_utils.c | 16 +- .../flash_ops_esp32h4.c} | 2 +- components/spi_flash/esp_flash_spi_init.c | 4 +- components/spi_flash/flash_mmap.c | 4 +- components/spi_flash/flash_ops.c | 4 +- components/spi_flash/spi_flash_os_func_noos.c | 12 +- .../spi_flash/test/test_cache_disabled.c | 2 +- components/spi_flash/test/test_esp_flash.c | 4 +- .../esp_flash/main/test_esp_flash_drv.c | 4 +- .../spi_flash/test_apps/flash_mmap/README.md | 2 +- .../wpa_supplicant/src/utils/includes.h | 4 +- conftest.py | 2 +- .../{Doxyfile_esp32h2 => Doxyfile_esp32h4} | 0 docs/en/api-guides/openthread.rst | 8 +- docs/en/api-guides/tools/idf-clang-tidy.rst | 8 +- .../peripherals/adc_calibration.rst | 2 +- .../en/api-reference/peripherals/clk_tree.rst | 28 +- docs/en/api-reference/peripherals/hmac.rst | 2 +- docs/en/api-reference/peripherals/i2c.rst | 2 +- docs/en/api-reference/peripherals/i2s.rst | 4 +- docs/en/api-reference/peripherals/ledc.rst | 8 +- .../release-5.x/5.0/removed-components.rst | 2 +- docs/zh_CN/api-reference/peripherals/i2c.rst | 2 +- docs/zh_CN/api-reference/peripherals/ledc.rst | 8 +- .../release-5.x/5.0/removed-components.rst | 2 +- examples/bluetooth/.build-test-rules.yml | 4 +- .../bluedroid/ble/ble_ancs/README.md | 4 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../ble/ble_compatibility_test/README.md | 4 +- .../sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble/ble_eddystone/README.md | 18 +- .../sdkconfig.defaults.esp32h4} | 2 +- .../ble/ble_hid_device_demo/README.md | 12 +- .../sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble/ble_ibeacon/README.md | 8 +- .../sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble/ble_spp_client/README.md | 36 +- .../ble_spp_client/sdkconfig.defaults.esp32h2 | 10 - .../ble_spp_client/sdkconfig.defaults.esp32h4 | 10 + .../bluedroid/ble/ble_spp_server/README.md | 4 +- .../ble_spp_server/sdkconfig.defaults.esp32h2 | 10 - .../ble_spp_server/sdkconfig.defaults.esp32h4 | 10 + .../throughput_client/README.md | 16 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../throughput_server/README.md | 10 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble/gatt_client/README.md | 18 +- .../gatt_client/sdkconfig.defaults.esp32h2 | 10 - .../gatt_client/sdkconfig.defaults.esp32h4 | 10 + .../ble/gatt_security_client/README.md | 28 +- .../sdkconfig.defaults.esp32h2 | 10 - .../sdkconfig.defaults.esp32h4 | 10 + .../ble/gatt_security_server/README.md | 12 +- .../sdkconfig.defaults.esp32h2 | 10 - .../sdkconfig.defaults.esp32h4 | 10 + .../bluedroid/ble/gatt_server/README.md | 6 +- .../gatt_server/sdkconfig.defaults.esp32h2 | 10 - .../gatt_server/sdkconfig.defaults.esp32h4 | 10 + .../ble/gatt_server_service_table/README.md | 4 +- .../sdkconfig.defaults.esp32h2 | 10 - .../sdkconfig.defaults.esp32h4 | 10 + .../ble/gattc_multi_connect/README.md | 28 +- .../sdkconfig.defaults.esp32h2 | 10 - .../sdkconfig.defaults.esp32h4 | 10 + .../ble_50/ble50_security_client/README.md | 12 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../ble_50/ble50_security_server/README.md | 12 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble_50/multi-adv/README.md | 2 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble_50/peroidic_adv/README.md | 4 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- .../bluedroid/ble_50/peroidic_sync/README.md | 6 +- .../peroidic_sync/sdkconfig.defaults.esp32h2 | 7 - .../peroidic_sync/sdkconfig.defaults.esp32h4 | 7 + .../main/ble_mesh_console_main.c | 4 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 6 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 2 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 6 +- ...lts.esp32h2 => sdkconfig.defaults.esp32h4} | 6 +- .../cmake/idf_as_lib/CMakeLists.txt | 2 +- .../build_system/cmake/idf_as_lib/README.md | 2 +- .../{build-esp32h2.sh => build-esp32h4.sh} | 0 .../{run-esp32h2.sh => run-esp32h4.sh} | 0 .../{esp32h2 => esp32h4}/Kconfig.env_caps | 0 examples/get-started/.build-test-rules.yml | 2 +- .../get-started/blink/main/Kconfig.projbuild | 2 +- examples/get-started/hello_world/README.md | 6 +- examples/openthread/.build-test-rules.yml | 8 +- examples/openthread/README.md | 6 +- examples/openthread/ot_br/README.md | 10 +- ...=> thread-border-router-esp32-esp32h4.jpg} | Bin examples/openthread/ot_cli/README.md | 6 +- .../openthread/ot_cli/main/esp_ot_config.h | 2 +- examples/openthread/ot_cli/sdkconfig.ci.cli | 6 +- examples/openthread/ot_cli/sdkconfig.defaults | 4 +- examples/openthread/ot_rcp/README.md | 6 +- examples/openthread/ot_rcp/main/esp_ot_rcp.c | 10 +- examples/openthread/ot_rcp/sdkconfig.defaults | 2 +- examples/openthread/pytest_otbr.py | 16 +- examples/peripherals/.build-test-rules.yml | 2 +- .../main/continuous_read_main.c | 4 +- .../peripherals/gpio/generic_gpio/README.md | 2 +- .../gpio/generic_gpio/main/Kconfig.projbuild | 4 +- .../generic_gpio/main/gpio_example_main.c | 4 +- .../peripherals/i2c/i2c_self_test/README.md | 6 +- examples/peripherals/i2c/i2c_tools/README.md | 2 +- .../i2c/i2c_tools/main/cmd_i2ctools.c | 2 +- .../i2s_std/main/i2s_std_example_main.c | 2 +- .../i2s/i2s_codec/i2s_es8311/README.md | 2 +- .../i2s_es8311/main/i2s_es8311_example.c | 4 +- .../musical_buzzer/pytest_musical_buzzer.py | 2 +- .../spi_slave/receiver/main/app_main.c | 2 +- .../spi_slave/sender/main/app_main.c | 2 +- .../segment_mode/seg_master/main/app_main.c | 2 +- .../segment_mode/seg_slave/main/app_main.c | 2 +- .../uart/uart_echo/main/Kconfig.projbuild | 4 +- .../uart/uart_echo_rs485/README.md | 4 +- .../uart_echo_rs485/main/Kconfig.projbuild | 4 +- .../main/ext_flash_fatfs_example_main.c | 2 +- examples/storage/semihost_vfs/README.md | 2 +- .../components/cmd_system/cmd_system.c | 4 +- .../system/deep_sleep/main/Kconfig.projbuild | 8 +- examples/system/esp_timer/sdkconfig.ci.rtc | 2 +- examples/system/gcov/main/Kconfig.projbuild | 2 +- .../system/light_sleep/main/gpio_wakeup.c | 2 +- examples/zigbee/.build-test-rules.yml | 18 +- examples/zigbee/esp_zigbee_gateway/README.md | 14 +- examples/zigbee/esp_zigbee_rcp/README.md | 8 +- .../zigbee/esp_zigbee_rcp/sdkconfig.defaults | 2 - .../light_sample/HA_on_off_light/README.md | 34 +- .../HA_on_off_light/sdkconfig.defaults | 2 - .../light_sample/HA_on_off_switch/README.md | 60 +- .../HA_on_off_switch/sdkconfig.defaults | 2 - examples/zigbee/light_sample/README.md | 6 +- pytest.ini | 4 +- tools/ci/build_template_app.sh | 4 +- tools/ci/check_build_test_rules.py | 6 +- tools/ci/check_copyright_ignore.txt | 71 --- tools/ci/check_public_headers_exceptions.txt | 2 +- tools/ci/executable-list.txt | 4 +- tools/ci/python_packages/ttfw_idf/IDFDUT.py | 8 +- tools/ci/python_packages/ttfw_idf/__init__.py | 4 +- tools/ci/test_build_system_cmake.sh | 2 +- tools/cmake/dfu.cmake | 2 +- ...-esp32h2.cmake => toolchain-esp32h4.cmake} | 0 tools/cmake/uf2.cmake | 2 + tools/gdb_panic_server.py | 4 +- tools/idf_py_actions/constants.py | 2 +- ..._data_info.yaml => esp32h4_data_info.yaml} | 0 tools/test_apps/.build-test-rules.yml | 8 +- tools/test_apps/system/eh_frame/README.md | 8 +- .../test_apps/system/g0_components/README.md | 4 +- tools/test_apps/system/panic/README.md | 6 +- tools/test_apps/system/startup/README.md | 2 +- .../{app_esp32h2.map => app_esp32h4.map} | 590 +++++++++--------- tools/test_idf_size/expected_output | 22 +- tools/test_idf_size/test.sh | 24 +- tools/tools.json | 2 +- 539 files changed, 1679 insertions(+), 2126 deletions(-) delete mode 100644 components/bootloader/subproject/main/ld/esp32h2/bootloader.rom.ld rename components/bootloader/subproject/main/ld/{esp32h2 => esp32h4}/bootloader.ld (99%) create mode 100644 components/bootloader/subproject/main/ld/esp32h4/bootloader.rom.ld rename components/bootloader_support/bootloader_flash/src/{bootloader_flash_config_esp32h2.c => bootloader_flash_config_esp32h4.c} (95%) rename components/bootloader_support/src/{bootloader_random_esp32h2.c => bootloader_random_esp32h4.c} (94%) rename components/bootloader_support/src/{esp32h2/bootloader_esp32h2.c => esp32h4/bootloader_esp32h4.c} (98%) rename components/bootloader_support/src/{esp32h2 => esp32h4}/bootloader_sha.c (96%) rename components/bootloader_support/src/{esp32h2 => esp32h4}/bootloader_soc.c (100%) rename components/bootloader_support/src/{esp32h2 => esp32h4}/flash_encryption_secure_features.c (100%) rename components/bootloader_support/src/{esp32h2 => esp32h4}/secure_boot_secure_features.c (100%) rename components/bt/controller/{esp32h2 => esp32h4}/Kconfig.in (100%) rename components/bt/controller/{esp32h2 => esp32h4}/bt.c (99%) rename components/bt/include/{esp32h2 => esp32h4}/include/esp_bt.h (100%) rename components/bt/include/{esp32h2 => esp32h4}/include/esp_bt_cfg.h (100%) delete mode 100644 components/bt/sdkconfig.rename.esp32h2 rename components/efuse/{esp32h2 => esp32h4}/esp_efuse_fields.c (98%) rename components/efuse/{esp32h2 => esp32h4}/esp_efuse_rtc_calib.c (100%) rename components/efuse/{esp32h2 => esp32h4}/esp_efuse_table.c (99%) rename components/efuse/{esp32h2 => esp32h4}/esp_efuse_table.csv (99%) rename components/efuse/{esp32h2 => esp32h4}/esp_efuse_utility.c (100%) rename components/efuse/{esp32h2 => esp32h4}/include/esp_efuse_chip.h (98%) rename components/efuse/{esp32h2 => esp32h4}/include/esp_efuse_rtc_calib.h (100%) rename components/efuse/{esp32h2 => esp32h4}/include/esp_efuse_table.h (99%) rename components/efuse/{esp32h2 => esp32h4}/private_include/esp_efuse_utility.h (100%) rename components/efuse/{esp32h2 => esp32h4}/sources.cmake (100%) rename components/esp_adc/{esp32h2 => esp32h4}/include/adc_cali_schemes.h (100%) rename components/esp_gdbstub/{esp32h2/gdbstub_esp32h2.c => esp32h4/gdbstub_esp32h4.c} (100%) rename components/esp_gdbstub/{esp32h2 => esp32h4}/gdbstub_target_config.h (100%) rename components/esp_hw_support/include/soc/{esp32h2 => esp32h4}/esp_crypto_lock.h (100%) rename components/esp_hw_support/include/soc/{esp32h2 => esp32h4}/esp_ds.h (100%) rename components/esp_hw_support/include/soc/{esp32h2 => esp32h4}/rtc.h (95%) rename components/esp_hw_support/include/soc/{esp32h2 => esp32h4}/soc_memprot_types.h (98%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/CMakeLists.txt (100%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/Kconfig.hw_support (63%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/Kconfig.mac (62%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/Kconfig.rtc (100%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/chip_info.c (92%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/esp_crypto_lock.c (100%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/esp_ds.c (99%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/esp_memprot.c (100%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/i2c_brownout.h (100%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/rtc_clk.c (98%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/rtc_clk_init.c (92%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/rtc_init.c (99%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/rtc_pm.c (95%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/rtc_sleep.c (98%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/rtc_time.c (98%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/sar_periph_ctrl.c (100%) rename components/esp_hw_support/port/{esp32h2 => esp32h4}/systimer.c (100%) delete mode 100644 components/esp_hw_support/sdkconfig.rename.esp32h2 delete mode 100644 components/esp_phy/esp32h2/include/phy_init_data.h create mode 100644 components/esp_phy/esp32h4/include/phy_init_data.h rename components/esp_pm/include/{esp32h2 => esp32h4}/pm.h (89%) rename components/esp_rom/{esp32h2 => esp32h4}/Kconfig.soc_caps.in (100%) rename components/esp_rom/{esp32h2 => esp32h4}/esp_rom_caps.h (100%) rename components/esp_rom/{esp32h2/ld/rev1/esp32h2.rom.api.ld => esp32h4/ld/rev1/esp32h4.rom.api.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev1/esp32h2.rom.ld => esp32h4/ld/rev1/esp32h4.rom.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev1/esp32h2.rom.libgcc.ld => esp32h4/ld/rev1/esp32h4.rom.libgcc.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev1/esp32h2.rom.newlib-nano.ld => esp32h4/ld/rev1/esp32h4.rom.newlib-nano.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev1/esp32h2.rom.newlib.ld => esp32h4/ld/rev1/esp32h4.rom.newlib.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev1/esp32h2.rom.version.ld => esp32h4/ld/rev1/esp32h4.rom.version.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev2/esp32h2.rom.api.ld => esp32h4/ld/rev2/esp32h4.rom.api.ld} (100%) rename components/esp_rom/{esp32h2/ld/rev2/esp32h2.rom.ld => esp32h4/ld/rev2/esp32h4.rom.ld} (99%) rename components/esp_rom/{esp32h2/ld/rev2/esp32h2.rom.libgcc.ld => esp32h4/ld/rev2/esp32h4.rom.libgcc.ld} (95%) rename components/esp_rom/{esp32h2/ld/rev2/esp32h2.rom.newlib-nano.ld => esp32h4/ld/rev2/esp32h4.rom.newlib-nano.ld} (89%) rename components/esp_rom/{esp32h2/ld/rev2/esp32h2.rom.newlib.ld => esp32h4/ld/rev2/esp32h4.rom.newlib.ld} (96%) rename components/esp_rom/{esp32h2/ld/rev2/esp32h2.rom.version.ld => esp32h4/ld/rev2/esp32h4.rom.version.ld} (89%) delete mode 100644 components/esp_rom/include/esp32h2/rom/apb_backup_dma.h rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/aes.h (56%) create mode 100644 components/esp_rom/include/esp32h4/rom/apb_backup_dma.h rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/bigint.h (54%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/cache.h (97%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/crc.h (81%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/digital_signature.h (89%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/efuse.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/esp_flash.h (64%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/ets_sys.h (96%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/gpio.h (98%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/hmac.h (71%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/libc_stubs.h (86%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/lldesc.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/md5_hash.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/miniz.h (99%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/rom_layout.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/rsa_pss.h (54%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/rtc.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/secure_boot.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/sha.h (65%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/spi_flash.h (100%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/tjpgd.h (96%) rename components/esp_rom/include/{esp32h2 => esp32h4}/rom/uart.h (94%) rename components/esp_system/ld/{esp32h2 => esp32h4}/memory.ld.in (93%) rename components/esp_system/ld/{esp32h2 => esp32h4}/sections.ld.in (98%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/CMakeLists.txt (100%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/Kconfig.cpu (80%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/Kconfig.system (96%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/apb_backup_dma.c (53%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/cache_err_int.c (97%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/clk.c (99%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/reset_reason.c (83%) rename components/esp_system/port/soc/{esp32h2 => esp32h4}/system_internal.c (98%) delete mode 100644 components/esp_system/sdkconfig.rename.esp32h2 delete mode 100644 components/hal/esp32h2/include/hal/mpu_ll.h rename components/hal/{esp32h2 => esp32h4}/brownout_hal.c (100%) rename components/hal/{esp32h2 => esp32h4}/efuse_hal.c (100%) rename components/hal/{esp32h2 => esp32h4}/hmac_hal.c (69%) rename components/hal/{esp32h2 => esp32h4}/include/hal/adc_hal_conf.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/adc_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/aes_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/cache_ll.h (91%) rename components/hal/{esp32h2 => esp32h4}/include/hal/clk_gate_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/clk_tree_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/dedic_gpio_cpu_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/ds_ll.h (88%) rename components/hal/{esp32h2 => esp32h4}/include/hal/ecc_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/efuse_hal.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/efuse_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/gdma_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/gpspi_flash_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/hmac_hal.h (82%) rename components/hal/{esp32h2 => esp32h4}/include/hal/hmac_ll.h (87%) rename components/hal/{esp32h2 => esp32h4}/include/hal/i2c_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/i2s_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/ledc_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/memprot_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/mmu_ll.h (97%) create mode 100644 components/hal/esp32h4/include/hal/mpu_ll.h rename components/hal/{esp32h2 => esp32h4}/include/hal/mwdt_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/regi2c_ctrl_ll.h (94%) rename components/hal/{esp32h2 => esp32h4}/include/hal/rmt_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/rtc_cntl_ll.h (96%) rename components/hal/{esp32h2 => esp32h4}/include/hal/rwdt_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/sar_ctrl_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/sdm_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/sha_ll.h (85%) rename components/hal/{esp32h2 => esp32h4}/include/hal/spi_flash_encrypted_ll.h (85%) rename components/hal/{esp32h2 => esp32h4}/include/hal/spi_flash_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/spi_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/spimem_flash_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/systimer_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/temperature_sensor_ll.h (97%) rename components/hal/{esp32h2 => esp32h4}/include/hal/timer_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/twai_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/hal/uart_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/uhci_ll.h (85%) rename components/hal/{esp32h2 => esp32h4}/include/hal/uhci_types.h (64%) rename components/hal/{esp32h2 => esp32h4}/include/hal/usb_phy_ll.h (100%) rename components/hal/{esp32h2 => esp32h4}/include/hal/usb_serial_jtag_ll.h (87%) rename components/hal/{esp32h2 => esp32h4}/include/rev1/hal/gpio_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/include/rev2/hal/gpio_ll.h (99%) rename components/hal/{esp32h2 => esp32h4}/rtc_cntl_hal.c (100%) rename components/heap/port/{esp32h2 => esp32h4}/memory_layout.c (98%) rename components/idf_test/include/{esp32h2 => esp32h4}/idf_performance_target.h (100%) rename components/mbedtls/port/{esp32h2 => esp32h4}/bignum.c (99%) delete mode 100644 components/newlib/sdkconfig.rename.esp32h2 delete mode 100644 components/soc/esp32h2/i2c_periph.c delete mode 100644 components/soc/esp32h2/include/soc/interrupt_reg.h delete mode 100644 components/soc/esp32h2/include/soc/soc_pins.h delete mode 100644 components/soc/esp32h2/include/soc/spi_pins.h delete mode 100644 components/soc/esp32h2/include/soc/wdev_reg.h delete mode 100644 components/soc/esp32h2/ledc_periph.c rename components/soc/{esp32h2 => esp32h4}/CMakeLists.txt (82%) rename components/soc/{esp32h2 => esp32h4}/adc_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/dedic_gpio_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/gdma_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/gpio_periph.c (96%) rename components/soc/{esp32h2 => esp32h4}/i2c_bias.h (100%) create mode 100644 components/soc/esp32h4/i2c_periph.c rename components/soc/{esp32h2 => esp32h4}/i2c_pmu.h (100%) rename components/soc/{esp32h2 => esp32h4}/i2c_ulp.h (100%) rename components/soc/{esp32h2 => esp32h4}/i2s_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/assist_debug_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/clkrst_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/efuse_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/efuse_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/gpio_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/gpio_sd_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/gpio_sig_map.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/gpio_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/interrupt_core0_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/io_mux_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/rtc_cntl_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/rtc_cntl_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/sensitive_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/sensitive_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/syscon_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/syscon_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/system_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/system_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/usb_serial_jtag_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev1/soc/usb_serial_jtag_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/assist_debug_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/clkrst_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/ecc_mult_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/ecc_mult_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/efuse_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/efuse_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/gpio_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/gpio_sd_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/gpio_sig_map.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/gpio_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/interrupt_core0_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/io_mux_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/rtc_cntl_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/rtc_cntl_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/sensitive_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/sensitive_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/syscon_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/syscon_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/system_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/system_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/usb_serial_jtag_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/rev2/soc/usb_serial_jtag_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/Kconfig.soc_caps.in (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/adc_channel.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/apb_saradc_reg.h (97%) rename components/soc/{esp32h2 => esp32h4}/include/soc/apb_saradc_struct.h (96%) rename components/soc/{esp32h2 => esp32h4}/include/soc/bb_reg.h (52%) rename components/soc/{esp32h2 => esp32h4}/include/soc/boot_mode.h (82%) rename components/soc/{esp32h2 => esp32h4}/include/soc/clk_tree_defs.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/clkout_channel.h (76%) rename components/soc/{esp32h2 => esp32h4}/include/soc/dport_access.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/dport_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/ext_mem_defs.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/extmem_reg.h (98%) rename components/soc/{esp32h2 => esp32h4}/include/soc/fe_reg.h (56%) rename components/soc/{esp32h2 => esp32h4}/include/soc/gdma_channel.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/gdma_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/gdma_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/gpio_pins.h (81%) rename components/soc/{esp32h2 => esp32h4}/include/soc/gpio_sd_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/hwcrypto_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/i2c_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/i2c_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/i2s_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/i2s_struct.h (100%) create mode 100644 components/soc/esp32h4/include/soc/interrupt_reg.h rename components/soc/{esp32h2 => esp32h4}/include/soc/ledc_reg.h (98%) rename components/soc/{esp32h2 => esp32h4}/include/soc/ledc_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/mmu.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/nrx_reg.h (67%) rename components/soc/{esp32h2 => esp32h4}/include/soc/periph_defs.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/reg_base.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_bbpll.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_bias.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_brownout.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_defs.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_dig_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_lp_bias.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_pmu.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_saradc.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/regi2c_ulp.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/reset_reasons.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/rmt_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/rmt_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/rtc.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/rtc_i2c_reg.h (97%) rename components/soc/{esp32h2 => esp32h4}/include/soc/rtc_i2c_struct.h (93%) rename components/soc/{esp32h2 => esp32h4}/include/soc/soc.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/soc_caps.h (96%) create mode 100644 components/soc/esp32h4/include/soc/soc_pins.h rename components/soc/{esp32h2 => esp32h4}/include/soc/spi_mem_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/spi_mem_struct.h (98%) create mode 100644 components/soc/esp32h4/include/soc/spi_pins.h rename components/soc/{esp32h2 => esp32h4}/include/soc/spi_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/spi_struct.h (98%) rename components/soc/{esp32h2 => esp32h4}/include/soc/systimer_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/systimer_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/timer_group_reg.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/timer_group_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/twai_struct.h (99%) rename components/soc/{esp32h2 => esp32h4}/include/soc/uart_channel.h (89%) rename components/soc/{esp32h2 => esp32h4}/include/soc/uart_pins.h (58%) rename components/soc/{esp32h2 => esp32h4}/include/soc/uart_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/uart_struct.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/uhci_reg.h (100%) rename components/soc/{esp32h2 => esp32h4}/include/soc/uhci_struct.h (100%) create mode 100644 components/soc/esp32h4/include/soc/wdev_reg.h rename components/soc/{esp32h2 => esp32h4}/interrupts.c (100%) rename components/soc/{esp32h2/ld/esp32h2.peripherals.ld => esp32h4/ld/esp32h4.peripherals.ld} (100%) create mode 100644 components/soc/esp32h4/ledc_periph.c rename components/soc/{esp32h2 => esp32h4}/rmt_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/sdm_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/spi_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/temperature_sensor_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/timer_periph.c (100%) rename components/soc/{esp32h2 => esp32h4}/uart_periph.c (77%) rename components/spi_flash/{esp32h2/flash_ops_esp32h2.c => esp32h4/flash_ops_esp32h4.c} (98%) rename docs/doxygen/{Doxyfile_esp32h2 => Doxyfile_esp32h4} (100%) rename examples/bluetooth/bluedroid/ble/ble_ancs/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (91%) rename examples/bluetooth/bluedroid/ble/{ble_ibeacon/sdkconfig.defaults.esp32h2 => ble_compatibility_test/sdkconfig.defaults.esp32h4} (93%) rename examples/bluetooth/bluedroid/ble/{ble_compatibility_test/sdkconfig.defaults.esp32h2 => ble_eddystone/sdkconfig.defaults.esp32h4} (93%) rename examples/bluetooth/bluedroid/ble/{ble_eddystone/sdkconfig.defaults.esp32h2 => ble_hid_device_demo/sdkconfig.defaults.esp32h4} (93%) rename examples/bluetooth/bluedroid/ble/{ble_hid_device_demo/sdkconfig.defaults.esp32h2 => ble_ibeacon/sdkconfig.defaults.esp32h4} (93%) delete mode 100644 examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h4 delete mode 100644 examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h4 rename examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (93%) rename examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (94%) delete mode 100644 examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h4 delete mode 100644 examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h4 delete mode 100644 examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h4 delete mode 100644 examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h4 delete mode 100644 examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h4 delete mode 100644 examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h4 rename examples/bluetooth/bluedroid/ble_50/ble50_security_client/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (89%) rename examples/bluetooth/bluedroid/ble_50/ble50_security_server/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (89%) rename examples/bluetooth/bluedroid/ble_50/multi-adv/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (89%) rename examples/bluetooth/bluedroid/ble_50/peroidic_adv/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (89%) delete mode 100644 examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h2 create mode 100644 examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h4 rename examples/bluetooth/nimble/blecent/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (72%) rename examples/bluetooth/nimble/bleprph/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (90%) rename examples/bluetooth/nimble/throughput_app/blecent_throughput/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (72%) rename examples/bluetooth/nimble/throughput_app/bleprph_throughput/{sdkconfig.defaults.esp32h2 => sdkconfig.defaults.esp32h4} (72%) rename examples/build_system/cmake/idf_as_lib/{build-esp32h2.sh => build-esp32h4.sh} (100%) rename examples/build_system/cmake/idf_as_lib/{run-esp32h2.sh => run-esp32h4.sh} (100%) rename examples/common_components/env_caps/{esp32h2 => esp32h4}/Kconfig.env_caps (100%) rename examples/openthread/ot_br/image/{thread-border-router-esp32-esp32h2.jpg => thread-border-router-esp32-esp32h4.jpg} (100%) rename tools/cmake/{toolchain-esp32h2.cmake => toolchain-esp32h4.cmake} (100%) rename tools/idf_size_yaml/{esp32h2_data_info.yaml => esp32h4_data_info.yaml} (100%) rename tools/test_idf_size/{app_esp32h2.map => app_esp32h4.map} (99%) diff --git a/.gitlab/ci/build.yml b/.gitlab/ci/build.yml index 5820b6fa90..e2ae6a1611 100644 --- a/.gitlab/ci/build.yml +++ b/.gitlab/ci/build.yml @@ -155,20 +155,20 @@ build_pytest_examples_esp32c2: IDF_TARGET: esp32c2 TEST_DIR: examples -build_pytest_examples_esp32h2: +build_pytest_examples_esp32h4: extends: - .build_pytest_template - - .rules:build:example_test-esp32h2 + - .rules:build:example_test-esp32h4 variables: - IDF_TARGET: esp32h2 + IDF_TARGET: esp32h4 TEST_DIR: examples -build_pytest_components_esp32h2: +build_pytest_components_esp32h4: extends: - .build_pytest_template - - .rules:build:component_ut-esp32h2 + - .rules:build:component_ut-esp32h4 variables: - IDF_TARGET: esp32h2 + IDF_TARGET: esp32h4 TEST_DIR: components build_pytest_examples_esp32c6: @@ -526,12 +526,12 @@ build_examples_cmake_esp32c3: IDF_TARGET: esp32c3 TEST_DIR: examples -build_examples_cmake_esp32h2: +build_examples_cmake_esp32h4: extends: - .build_cmake_template - - .rules:build:example_test-esp32h2 + - .rules:build:example_test-esp32h4 variables: - IDF_TARGET: esp32h2 + IDF_TARGET: esp32h4 TEST_DIR: examples build_examples_cmake_esp32c6: diff --git a/.gitlab/ci/dependencies/dependencies.yml b/.gitlab/ci/dependencies/dependencies.yml index 1ff08f56ec..513bd8cad8 100644 --- a/.gitlab/ci/dependencies/dependencies.yml +++ b/.gitlab/ci/dependencies/dependencies.yml @@ -3,7 +3,7 @@ - esp32s2 - esp32s3 - esp32c3 - - esp32h2 + - esp32h4 - esp32c2 - esp32c6 @@ -173,7 +173,7 @@ build:integration_test: - target_test - example_test included_in: - - "build:example_test-esp32h2" + - "build:example_test-esp32h4" - "build:example_test-esp32s3" - "build:example_test" - build:target_test diff --git a/.gitlab/ci/host-test.yml b/.gitlab/ci/host-test.yml index 6a43f7673e..e949f1c7b7 100644 --- a/.gitlab/ci/host-test.yml +++ b/.gitlab/ci/host-test.yml @@ -260,10 +260,10 @@ test_efuse_table_on_host_esp32c3: variables: IDF_TARGET: esp32c3 -test_efuse_table_on_host_esp32h2: +test_efuse_table_on_host_esp32h4: extends: .test_efuse_table_on_host_template variables: - IDF_TARGET: esp32h2 + IDF_TARGET: esp32h4 test_espcoredump: extends: .host_test_template diff --git a/.gitlab/ci/rules.yml b/.gitlab/ci/rules.yml index 1dd6e6331f..86a54e4ba0 100644 --- a/.gitlab/ci/rules.yml +++ b/.gitlab/ci/rules.yml @@ -387,8 +387,8 @@ .if-label-component_ut_esp32c6: &if-label-component_ut_esp32c6 if: '$BOT_LABEL_COMPONENT_UT_ESP32C6 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32c6(?:,[^,\n\r]+)*$/i' -.if-label-component_ut_esp32h2: &if-label-component_ut_esp32h2 - if: '$BOT_LABEL_COMPONENT_UT_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32h2(?:,[^,\n\r]+)*$/i' +.if-label-component_ut_esp32h4: &if-label-component_ut_esp32h4 + if: '$BOT_LABEL_COMPONENT_UT_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32h4(?:,[^,\n\r]+)*$/i' .if-label-component_ut_esp32s2: &if-label-component_ut_esp32s2 if: '$BOT_LABEL_COMPONENT_UT_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*component_ut_esp32s2(?:,[^,\n\r]+)*$/i' @@ -411,8 +411,8 @@ .if-label-custom_test_esp32c6: &if-label-custom_test_esp32c6 if: '$BOT_LABEL_CUSTOM_TEST_ESP32C6 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32c6(?:,[^,\n\r]+)*$/i' -.if-label-custom_test_esp32h2: &if-label-custom_test_esp32h2 - if: '$BOT_LABEL_CUSTOM_TEST_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32h2(?:,[^,\n\r]+)*$/i' +.if-label-custom_test_esp32h4: &if-label-custom_test_esp32h4 + if: '$BOT_LABEL_CUSTOM_TEST_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32h4(?:,[^,\n\r]+)*$/i' .if-label-custom_test_esp32s2: &if-label-custom_test_esp32s2 if: '$BOT_LABEL_CUSTOM_TEST_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*custom_test_esp32s2(?:,[^,\n\r]+)*$/i' @@ -438,8 +438,8 @@ .if-label-example_test_esp32c6: &if-label-example_test_esp32c6 if: '$BOT_LABEL_EXAMPLE_TEST_ESP32C6 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32c6(?:,[^,\n\r]+)*$/i' -.if-label-example_test_esp32h2: &if-label-example_test_esp32h2 - if: '$BOT_LABEL_EXAMPLE_TEST_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32h2(?:,[^,\n\r]+)*$/i' +.if-label-example_test_esp32h4: &if-label-example_test_esp32h4 + if: '$BOT_LABEL_EXAMPLE_TEST_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32h4(?:,[^,\n\r]+)*$/i' .if-label-example_test_esp32s2: &if-label-example_test_esp32s2 if: '$BOT_LABEL_EXAMPLE_TEST_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*example_test_esp32s2(?:,[^,\n\r]+)*$/i' @@ -492,8 +492,8 @@ .if-label-unit_test_esp32c6: &if-label-unit_test_esp32c6 if: '$BOT_LABEL_UNIT_TEST_ESP32C6 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32c6(?:,[^,\n\r]+)*$/i' -.if-label-unit_test_esp32h2: &if-label-unit_test_esp32h2 - if: '$BOT_LABEL_UNIT_TEST_ESP32H2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32h2(?:,[^,\n\r]+)*$/i' +.if-label-unit_test_esp32h4: &if-label-unit_test_esp32h4 + if: '$BOT_LABEL_UNIT_TEST_ESP32H4 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32h4(?:,[^,\n\r]+)*$/i' .if-label-unit_test_esp32s2: &if-label-unit_test_esp32s2 if: '$BOT_LABEL_UNIT_TEST_ESP32S2 || $CI_MERGE_REQUEST_LABELS =~ /^(?:[^,\n\r]+,)*unit_test_esp32s2(?:,[^,\n\r]+)*$/i' @@ -531,7 +531,7 @@ - <<: *if-label-component_ut_esp32c2 - <<: *if-label-component_ut_esp32c3 - <<: *if-label-component_ut_esp32c6 - - <<: *if-label-component_ut_esp32h2 + - <<: *if-label-component_ut_esp32h4 - <<: *if-label-component_ut_esp32s2 - <<: *if-label-component_ut_esp32s3 - <<: *if-label-lan8720 @@ -541,7 +541,7 @@ - <<: *if-label-unit_test_esp32c2 - <<: *if-label-unit_test_esp32c3 - <<: *if-label-unit_test_esp32c6 - - <<: *if-label-unit_test_esp32h2 + - <<: *if-label-unit_test_esp32h4 - <<: *if-label-unit_test_esp32s2 - <<: *if-label-unit_test_esp32s3 - <<: *if-dev-push @@ -651,17 +651,17 @@ - <<: *if-dev-push changes: *patterns-target_test-i154 -.rules:build:component_ut-esp32h2: +.rules:build:component_ut-esp32h4: rules: - <<: *if-revert-branch when: never - <<: *if-protected - <<: *if-label-build - <<: *if-label-component_ut - - <<: *if-label-component_ut_esp32h2 + - <<: *if-label-component_ut_esp32h4 - <<: *if-label-target_test - <<: *if-label-unit_test - - <<: *if-label-unit_test_esp32h2 + - <<: *if-label-unit_test_esp32h4 - <<: *if-dev-push changes: *patterns-build_components - <<: *if-dev-push @@ -734,7 +734,7 @@ - <<: *if-label-custom_test_esp32c2 - <<: *if-label-custom_test_esp32c3 - <<: *if-label-custom_test_esp32c6 - - <<: *if-label-custom_test_esp32h2 + - <<: *if-label-custom_test_esp32h4 - <<: *if-label-custom_test_esp32s2 - <<: *if-label-custom_test_esp32s3 - <<: *if-label-target_test @@ -897,7 +897,7 @@ - <<: *if-label-example_test_esp32c2 - <<: *if-label-example_test_esp32c3 - <<: *if-label-example_test_esp32c6 - - <<: *if-label-example_test_esp32h2 + - <<: *if-label-example_test_esp32h4 - <<: *if-label-example_test_esp32s2 - <<: *if-label-example_test_esp32s3 - <<: *if-label-iperf_stress_test @@ -1042,14 +1042,14 @@ - <<: *if-dev-push changes: *patterns-target_test-i154 -.rules:build:example_test-esp32h2: +.rules:build:example_test-esp32h4: rules: - <<: *if-revert-branch when: never - <<: *if-protected - <<: *if-label-build - <<: *if-label-example_test - - <<: *if-label-example_test_esp32h2 + - <<: *if-label-example_test_esp32h4 - <<: *if-label-target_test - <<: *if-dev-push changes: *patterns-build-example_test @@ -1172,7 +1172,7 @@ - <<: *if-label-component_ut_esp32c2 - <<: *if-label-component_ut_esp32c3 - <<: *if-label-component_ut_esp32c6 - - <<: *if-label-component_ut_esp32h2 + - <<: *if-label-component_ut_esp32h4 - <<: *if-label-component_ut_esp32s2 - <<: *if-label-component_ut_esp32s3 - <<: *if-label-custom_test @@ -1180,7 +1180,7 @@ - <<: *if-label-custom_test_esp32c2 - <<: *if-label-custom_test_esp32c3 - <<: *if-label-custom_test_esp32c6 - - <<: *if-label-custom_test_esp32h2 + - <<: *if-label-custom_test_esp32h4 - <<: *if-label-custom_test_esp32s2 - <<: *if-label-custom_test_esp32s3 - <<: *if-label-example_test @@ -1188,7 +1188,7 @@ - <<: *if-label-example_test_esp32c2 - <<: *if-label-example_test_esp32c3 - <<: *if-label-example_test_esp32c6 - - <<: *if-label-example_test_esp32h2 + - <<: *if-label-example_test_esp32h4 - <<: *if-label-example_test_esp32s2 - <<: *if-label-example_test_esp32s3 - <<: *if-label-integration_test @@ -1200,7 +1200,7 @@ - <<: *if-label-unit_test_esp32c2 - <<: *if-label-unit_test_esp32c3 - <<: *if-label-unit_test_esp32c6 - - <<: *if-label-unit_test_esp32h2 + - <<: *if-label-unit_test_esp32h4 - <<: *if-label-unit_test_esp32s2 - <<: *if-label-unit_test_esp32s3 - <<: *if-label-weekend_test @@ -1252,7 +1252,7 @@ - <<: *if-label-unit_test_esp32c2 - <<: *if-label-unit_test_esp32c3 - <<: *if-label-unit_test_esp32c6 - - <<: *if-label-unit_test_esp32h2 + - <<: *if-label-unit_test_esp32h4 - <<: *if-label-unit_test_esp32s2 - <<: *if-label-unit_test_esp32s3 - <<: *if-dev-push @@ -1524,7 +1524,7 @@ - <<: *if-dev-push changes: *patterns-component_ut-adc -.rules:test:component_ut-esp32h2-i154: +.rules:test:component_ut-esp32h4-i154: rules: - <<: *if-revert-branch when: never @@ -1532,7 +1532,7 @@ - <<: *if-label-build-only when: never - <<: *if-label-component_ut - - <<: *if-label-component_ut_esp32h2 + - <<: *if-label-component_ut_esp32h4 - <<: *if-label-target_test - <<: *if-dev-push changes: *patterns-target_test-i154 diff --git a/.gitlab/ci/target-test.yml b/.gitlab/ci/target-test.yml index ae1b099c1b..a31147a6c3 100644 --- a/.gitlab/ci/target-test.yml +++ b/.gitlab/ci/target-test.yml @@ -532,13 +532,13 @@ component_ut_pytest_esp32c3_sdspi: - build_pytest_components_esp32c3 tags: [ esp32c3, sdcard_spimode ] -component_ut_pytest_esp32h2_i154: +component_ut_pytest_esp32h4_i154: extends: - .pytest_components_dir_template - - .rules:test:component_ut-esp32h2-i154 + - .rules:test:component_ut-esp32h4-i154 needs: - - build_pytest_components_esp32h2 - tags: [ esp32h2, ieee802154 ] + - build_pytest_components_esp32h4 + tags: [ esp32h4, ieee802154 ] example_test_pytest_openthread_br: extends: @@ -546,9 +546,9 @@ example_test_pytest_openthread_br: - .rules:test:example_test-i154 needs: - build_pytest_examples_esp32s3 - - build_pytest_examples_esp32h2 + - build_pytest_examples_esp32h4 tags: - - esp32h2 + - esp32h4 - i154_multi_dut .pytest_test_apps_dir_template: diff --git a/Kconfig b/Kconfig index c110deae0f..2d89d7b895 100644 --- a/Kconfig +++ b/Kconfig @@ -67,26 +67,26 @@ mainmenu "Espressif IoT Development Framework Configuration" select FREERTOS_UNICORE select IDF_TARGET_ARCH_RISCV - config IDF_TARGET_ESP32H2 + config IDF_TARGET_ESP32H4 bool - default "y" if IDF_TARGET="esp32h2" + default "y" if IDF_TARGET="esp32h4" select FREERTOS_UNICORE select IDF_TARGET_ARCH_RISCV - choice IDF_TARGET_ESP32H2_BETA_VERSION - prompt "ESP32-H2 beta version" - depends on IDF_TARGET_ESP32H2 - default IDF_TARGET_ESP32H2_BETA_VERSION_2 + choice IDF_TARGET_ESP32H4_BETA_VERSION + prompt "ESP32-H4 beta version" + depends on IDF_TARGET_ESP32H4 + default IDF_TARGET_ESP32H4_BETA_VERSION_2 help - Currently ESP32-H2 has several beta versions for internal use only. + Currently ESP32-H4 has several beta versions for internal use only. Select the one that matches your chip model. - config IDF_TARGET_ESP32H2_BETA_VERSION_1 + config IDF_TARGET_ESP32H4_BETA_VERSION_1 bool - prompt "ESP32-H2 beta1" - config IDF_TARGET_ESP32H2_BETA_VERSION_2 + prompt "ESP32-H4 beta1" + config IDF_TARGET_ESP32H4_BETA_VERSION_2 bool - prompt "ESP32-H2 beta2" + prompt "ESP32-H4 beta2" endchoice config IDF_TARGET_ESP32C2 @@ -111,10 +111,10 @@ mainmenu "Espressif IoT Development Framework Configuration" default 0x0002 if IDF_TARGET_ESP32S2 default 0x0005 if IDF_TARGET_ESP32C3 default 0x0009 if IDF_TARGET_ESP32S3 - default 0x000A if IDF_TARGET_ESP32H2_BETA_VERSION_1 + default 0x000A if IDF_TARGET_ESP32H4_BETA_VERSION_1 default 0x000C if IDF_TARGET_ESP32C2 default 0x000D if IDF_TARGET_ESP32C6 - default 0x000E if IDF_TARGET_ESP32H2_BETA_VERSION_2 # ESP32H2-TODO: IDF-3475 + default 0x000E if IDF_TARGET_ESP32H4_BETA_VERSION_2 # ESP32-TODO: IDF-3475 default 0xFFFF diff --git a/README.md b/README.md index 56626b5776..afb4d0b82d 100644 --- a/README.md +++ b/README.md @@ -23,7 +23,7 @@ The following table shows ESP-IDF support of Espressif SoCs where ![alt text][pr |ESP32-S3 | | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32_S3) | |ESP32-C2 | | | | | ![alt text][supported] | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32-C2) | |ESP32-C6 | | | | | | ![alt text][supported] | [Announcement](https://www.espressif.com/en/news/ESP32_C6) | -|ESP32-H2 | | | | ![alt text][preview] | ![alt text][preview] | ![alt text][preview] | [Announcement](https://www.espressif.com/en/news/ESP32_H2) | +|ESP32-H2 beta1/2| | | | ![alt text][preview] | ![alt text][preview] | ![alt text][preview] | [Announcement](https://www.espressif.com/en/news/ESP32_H2) | [supported]: https://img.shields.io/badge/-supported-green "supported" [preview]: https://img.shields.io/badge/-preview-orange "preview" diff --git a/README_CN.md b/README_CN.md index d6bb095010..b63a473787 100644 --- a/README_CN.md +++ b/README_CN.md @@ -23,7 +23,7 @@ ESP-IDF 是乐鑫官方推出的物联网开发框架，支持 Windows、Linux |ESP32-S3 | | | | ![alt text][supported] | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_S3) | |ESP32-C2 | | | | | ![alt text][supported] | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32-C2) | |ESP32-C6 | | | | | | ![alt text][supported] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_C6) | -|ESP32-H2 | | | | ![alt text][preview] | ![alt text][preview] | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_H2) | +|ESP32-H2 beta1/2| | | | ![alt text][preview] | ![alt text][preview] | ![alt text][preview] | [芯片发布公告](https://www.espressif.com/zh-hans/news/ESP32_H2) | [supported]: https://img.shields.io/badge/-%E6%94%AF%E6%8C%81-green "supported" [preview]: https://img.shields.io/badge/-%E9%A2%84%E8%A7%88-orange "preview" diff --git a/components/app_trace/Kconfig b/components/app_trace/Kconfig index e53a1c098a..e4f8f2f47f 100644 --- a/components/app_trace/Kconfig +++ b/components/app_trace/Kconfig @@ -47,7 +47,7 @@ menu "Application Level Tracing" select APPTRACE_ENABLE select APPTRACE_DEST_UART select APPTRACE_DEST_UART_NOUSB - depends on (ESP_CONSOLE_UART_NUM !=2) && !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32S2 && !IDF_TARGET_ESP32H2 + depends on (ESP_CONSOLE_UART_NUM !=2) && (SOC_UART_NUM > 2) config APPTRACE_DEST_USB_CDC bool "USB_CDC" diff --git a/components/app_update/esp_ota_ops.c b/components/app_update/esp_ota_ops.c index 3bc6d0e0dd..ee52c59e00 100644 --- a/components/app_update/esp_ota_ops.c +++ b/components/app_update/esp_ota_ops.c @@ -37,8 +37,8 @@ #include "esp32c3/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/secure_boot.h" #endif diff --git a/components/app_update/include/esp_ota_ops.h b/components/app_update/include/esp_ota_ops.h index 1058c728ae..7809f2dc52 100644 --- a/components/app_update/include/esp_ota_ops.h +++ b/components/app_update/include/esp_ota_ops.h @@ -334,7 +334,7 @@ typedef enum { /** * @brief Revokes the old signature digest. To be called in the application after the rollback logic. * - * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-H2 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1). + * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-H4 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1). * When key \#N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key \#N-1 & Key \#N. * After successfully booting the OTA app should call this function to revoke Key \#N-1. * diff --git a/components/bootloader/subproject/main/ld/esp32h2/bootloader.rom.ld b/components/bootloader/subproject/main/ld/esp32h2/bootloader.rom.ld deleted file mode 100644 index 185a5c2ee3..0000000000 --- a/components/bootloader/subproject/main/ld/esp32h2/bootloader.rom.ld +++ /dev/null @@ -1,6 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ -/* No definition for ESP32-H2 target */ diff --git a/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld b/components/bootloader/subproject/main/ld/esp32h4/bootloader.ld similarity index 99% rename from components/bootloader/subproject/main/ld/esp32h2/bootloader.ld rename to components/bootloader/subproject/main/ld/esp32h4/bootloader.ld index 9e58ba4e63..75c7d6a8fa 100644 --- a/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld +++ b/components/bootloader/subproject/main/ld/esp32h4/bootloader.ld @@ -6,7 +6,7 @@ /** Simplified memory map for the bootloader. * Make sure the bootloader can load into main memory without overwriting itself. * - * ESP32-H2 ROM static data usage is as follows: + * ESP32-H4 ROM static data usage is as follows: * - 0x3fccb900 - 0x3fcdd210: Shared buffers, used in UART/USB/SPI download mode only * - 0x3fcdd210 - 0x3fcdf210: PRO CPU stack, can be reclaimed as heap after RTOS startup * - 0x3fcdf210 - 0x3fce0000: ROM .bss and .data (not easily reclaimable) diff --git a/components/bootloader/subproject/main/ld/esp32h4/bootloader.rom.ld b/components/bootloader/subproject/main/ld/esp32h4/bootloader.rom.ld new file mode 100644 index 0000000000..34156bcc91 --- /dev/null +++ b/components/bootloader/subproject/main/ld/esp32h4/bootloader.rom.ld @@ -0,0 +1,6 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* No definition for ESP32-H4 target */ diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c similarity index 95% rename from components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c rename to components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c index ddbdc5c8a0..1beecfe2d9 100644 --- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c +++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c @@ -9,9 +9,9 @@ #include "sdkconfig.h" #include "esp_err.h" #include "esp_log.h" -#include "esp32h2/rom/gpio.h" -#include "esp32h2/rom/spi_flash.h" -#include "esp32h2/rom/efuse.h" +#include "esp32h4/rom/gpio.h" +#include "esp32h4/rom/spi_flash.h" +#include "esp32h4/rom/efuse.h" #include "soc/gpio_periph.h" #include "soc/efuse_reg.h" #include "soc/spi_reg.h" diff --git a/components/bootloader_support/include/esp_app_format.h b/components/bootloader_support/include/esp_app_format.h index 42ca1e587d..3194d4cfd9 100644 --- a/components/bootloader_support/include/esp_app_format.h +++ b/components/bootloader_support/include/esp_app_format.h @@ -17,10 +17,10 @@ typedef enum { ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */ ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */ ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */ -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 - ESP_CHIP_ID_ESP32H2 = 0x000E, /*!< chip ID: ESP32-H2 Beta2*/ // ESP32H2-TODO: IDF-3475 -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 - ESP_CHIP_ID_ESP32H2 = 0x000A, /*!< chip ID: ESP32-H2 Beta1 */ +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 + ESP_CHIP_ID_ESP32H4 = 0x000E, /*!< chip ID: ESP32-H4 Beta2*/ // ESP32H4-TODO: IDF-3475 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 + ESP_CHIP_ID_ESP32H4 = 0x000A, /*!< chip ID: ESP32-H4 Beta1 */ #endif ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */ ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */ diff --git a/components/bootloader_support/private_include/bootloader_signature.h b/components/bootloader_support/private_include/bootloader_signature.h index 942cdc4fc0..23d94aefb0 100644 --- a/components/bootloader_support/private_include/bootloader_signature.h +++ b/components/bootloader_support/private_include/bootloader_signature.h @@ -17,8 +17,8 @@ #include "esp32c3/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/bootloader_support/src/bootloader_clock_init.c b/components/bootloader_support/src/bootloader_clock_init.c index 588468f95c..ee1d6c3117 100644 --- a/components/bootloader_support/src/bootloader_clock_init.c +++ b/components/bootloader_support/src/bootloader_clock_init.c @@ -46,7 +46,7 @@ __attribute__((weak)) void bootloader_clock_configure(void) clk_ll_cpu_get_freq_mhz_from_pll() == CLK_LL_PLL_240M_FREQ_MHZ) { cpu_freq_mhz = 240; } -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H4 cpu_freq_mhz = 64; #endif diff --git a/components/bootloader_support/src/bootloader_console.c b/components/bootloader_support/src/bootloader_console.c index fe1486880f..ea76d90a2f 100644 --- a/components/bootloader_support/src/bootloader_console.c +++ b/components/bootloader_support/src/bootloader_console.c @@ -22,9 +22,9 @@ #include "esp32c3/rom/uart.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/ets_sys.h" +#include "esp32h4/rom/uart.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/ets_sys.h" #include "esp32c2/rom/uart.h" diff --git a/components/bootloader_support/src/bootloader_efuse.c b/components/bootloader_support/src/bootloader_efuse.c index cf3e49ed76..971e82deec 100644 --- a/components/bootloader_support/src/bootloader_efuse.c +++ b/components/bootloader_support/src/bootloader_efuse.c @@ -27,7 +27,7 @@ int bootloader_clock_get_rated_freq_mhz(void) #elif CONFIG_IDF_TARGET_ESP32C3 return 160; -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H4 return 96; #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/bootloader_support/src/bootloader_random_esp32h2.c b/components/bootloader_support/src/bootloader_random_esp32h4.c similarity index 94% rename from components/bootloader_support/src/bootloader_random_esp32h2.c rename to components/bootloader_support/src/bootloader_random_esp32h4.c index 7d248d1685..2d3d086871 100644 --- a/components/bootloader_support/src/bootloader_random_esp32h2.c +++ b/components/bootloader_support/src/bootloader_random_esp32h4.c @@ -12,7 +12,7 @@ #include "soc/system_reg.h" #include "esp_private/regi2c_ctrl.h" -// ESP32H2-TODO: IDF-3381 +// ESP32H4-TODO: IDF-3381 void bootloader_random_enable(void) { diff --git a/components/bootloader_support/src/bootloader_utility.c b/components/bootloader_support/src/bootloader_utility.c index 7e094426bd..ee9ad49de5 100644 --- a/components/bootloader_support/src/bootloader_utility.c +++ b/components/bootloader_support/src/bootloader_utility.c @@ -28,12 +28,12 @@ #include "esp32c3/rom/uart.h" #include "esp32c3/rom/gpio.h" #include "esp32c3/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/efuse.h" -#include "esp32h2/rom/crc.h" -#include "esp32h2/rom/uart.h" -#include "esp32h2/rom/gpio.h" -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/efuse.h" +#include "esp32h4/rom/crc.h" +#include "esp32h4/rom/uart.h" +#include "esp32h4/rom/gpio.h" +#include "esp32h4/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/efuse.h" #include "esp32c2/rom/crc.h" diff --git a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c b/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c similarity index 98% rename from components/bootloader_support/src/esp32h2/bootloader_esp32h2.c rename to components/bootloader_support/src/esp32h4/bootloader_esp32h4.c index 97b1559ffc..9e4589383e 100644 --- a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c +++ b/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c @@ -25,8 +25,8 @@ #include "soc/extmem_reg.h" #include "soc/io_mux_reg.h" #include "soc/system_reg.h" -#include "esp32h2/rom/efuse.h" -#include "esp32h2/rom/ets_sys.h" +#include "esp32h4/rom/efuse.h" +#include "esp32h4/rom/ets_sys.h" #include "bootloader_common.h" #include "bootloader_init.h" #include "bootloader_clock.h" @@ -38,7 +38,7 @@ #include "hal/mmu_hal.h" #include "hal/cache_hal.h" -static const char *TAG = "boot.esp32h2"; +static const char *TAG = "boot.esp32h4"; void IRAM_ATTR bootloader_configure_spi_pins(int drv) { diff --git a/components/bootloader_support/src/esp32h2/bootloader_sha.c b/components/bootloader_support/src/esp32h4/bootloader_sha.c similarity index 96% rename from components/bootloader_support/src/esp32h2/bootloader_sha.c rename to components/bootloader_support/src/esp32h4/bootloader_sha.c index 4054751df7..1ae0d74459 100644 --- a/components/bootloader_support/src/esp32h2/bootloader_sha.c +++ b/components/bootloader_support/src/esp32h4/bootloader_sha.c @@ -9,7 +9,7 @@ #include #include -#include "esp32h2/rom/sha.h" +#include "esp32h4/rom/sha.h" static SHA_CTX ctx; diff --git a/components/bootloader_support/src/esp32h2/bootloader_soc.c b/components/bootloader_support/src/esp32h4/bootloader_soc.c similarity index 100% rename from components/bootloader_support/src/esp32h2/bootloader_soc.c rename to components/bootloader_support/src/esp32h4/bootloader_soc.c diff --git a/components/bootloader_support/src/esp32h2/flash_encryption_secure_features.c b/components/bootloader_support/src/esp32h4/flash_encryption_secure_features.c similarity index 100% rename from components/bootloader_support/src/esp32h2/flash_encryption_secure_features.c rename to components/bootloader_support/src/esp32h4/flash_encryption_secure_features.c diff --git a/components/bootloader_support/src/esp32h2/secure_boot_secure_features.c b/components/bootloader_support/src/esp32h4/secure_boot_secure_features.c similarity index 100% rename from components/bootloader_support/src/esp32h2/secure_boot_secure_features.c rename to components/bootloader_support/src/esp32h4/secure_boot_secure_features.c diff --git a/components/bootloader_support/src/esp_image_format.c b/components/bootloader_support/src/esp_image_format.c index c46e698eed..3f58a4e72c 100644 --- a/components/bootloader_support/src/esp_image_format.c +++ b/components/bootloader_support/src/esp_image_format.c @@ -29,8 +29,8 @@ #include "esp32s3/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" #include "esp32c2/rom/secure_boot.h" diff --git a/components/bootloader_support/src/flash_encrypt.c b/components/bootloader_support/src/flash_encrypt.c index e6f789f1ef..0ec1db3c31 100644 --- a/components/bootloader_support/src/flash_encrypt.c +++ b/components/bootloader_support/src/flash_encrypt.c @@ -142,7 +142,7 @@ esp_flash_enc_mode_t esp_get_flash_encryption_mode(void) if (dis_dl_enc && dis_dl_icache && dis_dl_dcache) { mode = ESP_FLASH_ENC_MODE_RELEASE; } -#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6 bool dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT); bool dis_dl_icache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE); if (dis_dl_enc && dis_dl_icache) { @@ -191,7 +191,7 @@ void esp_flash_encryption_set_release_mode(void) esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT); esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE); esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_DCACHE); -#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6 esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT); esp_efuse_write_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE); #ifdef CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED diff --git a/components/bootloader_support/src/secure_boot_v2/secure_boot.c b/components/bootloader_support/src/secure_boot_v2/secure_boot.c index 13e2711f80..a71f53411b 100644 --- a/components/bootloader_support/src/secure_boot_v2/secure_boot.c +++ b/components/bootloader_support/src/secure_boot_v2/secure_boot.c @@ -23,8 +23,8 @@ #include "esp32c3/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/secure_boot.h" #endif diff --git a/components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h b/components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h index 0d1c271c6d..c5de29408c 100644 --- a/components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h +++ b/components/bootloader_support/src/secure_boot_v2/secure_boot_signature_priv.h @@ -13,8 +13,8 @@ #include "esp32c3/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/secure_boot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/secure_boot.h" #endif diff --git a/components/bt/CMakeLists.txt b/components/bt/CMakeLists.txt index 9518f7b66c..0dc64bbb41 100644 --- a/components/bt/CMakeLists.txt +++ b/components/bt/CMakeLists.txt @@ -17,9 +17,9 @@ if(CONFIG_BT_ENABLED) list(APPEND srcs "controller/esp32s3/bt.c") list(APPEND include_dirs include/esp32s3/include) - elseif(CONFIG_IDF_TARGET_ESP32H2) - list(APPEND srcs "controller/esp32h2/bt.c") - list(APPEND include_dirs include/esp32h2/include) + elseif(CONFIG_IDF_TARGET_ESP32H4) + list(APPEND srcs "controller/esp32h4/bt.c") + list(APPEND include_dirs include/esp32h4/include) elseif(CONFIG_IDF_TARGET_ESP32C2) list(APPEND srcs "controller/esp32c2/bt.c") @@ -699,10 +699,12 @@ if(CONFIG_BT_ENABLED) target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/controller/lib_esp32c3_family/esp32s3") target_link_libraries(${COMPONENT_LIB} PUBLIC btdm_app) - elseif(CONFIG_IDF_TARGET_ESP32H2) - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) + elseif(CONFIG_IDF_TARGET_ESP32H4) + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) + # TODO: rename esp32h2 to esp32h4 [BT-2875] add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/beta1/libble_app.a") - elseif(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + elseif(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) + # TODO: rename esp32h2 to esp32h4 [BT-2875] add_prebuilt_library(nimblelib "controller/lib_esp32h2/esp32h2-bt-lib/beta2/libble_app.a") endif() target_link_libraries(${COMPONENT_LIB} PRIVATE nimblelib) diff --git a/components/bt/controller/esp32h2/Kconfig.in b/components/bt/controller/esp32h4/Kconfig.in similarity index 100% rename from components/bt/controller/esp32h2/Kconfig.in rename to components/bt/controller/esp32h4/Kconfig.in diff --git a/components/bt/controller/esp32h2/bt.c b/components/bt/controller/esp32h4/bt.c similarity index 99% rename from components/bt/controller/esp32h2/bt.c rename to components/bt/controller/esp32h4/bt.c index 17269414ba..6b01f1a4b1 100644 --- a/components/bt/controller/esp32h2/bt.c +++ b/components/bt/controller/esp32h4/bt.c @@ -567,10 +567,10 @@ void controller_sleep_deinit(void) } -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 void periph_module_etm_active(void) { - /*This part for esp32h2 beta2*/ + /*This part for esp32h4 beta2*/ REG_SET_BIT(SYSTEM_MODCLK_CONF_REG, SYSTEM_ETM_CLK_SEL | SYSTEM_ETM_CLK_ACTIVE ); //Active ETM clock } #endif @@ -625,8 +625,8 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) #endif periph_module_enable(PERIPH_BT_MODULE); -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 - // only use for esp32h2 beta2 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 + // only use for esp32h4 beta2 periph_module_etm_active(); #endif diff --git a/components/bt/host/bluedroid/Kconfig.in b/components/bt/host/bluedroid/Kconfig.in index cf6f015f70..74417f4336 100644 --- a/components/bt/host/bluedroid/Kconfig.in +++ b/components/bt/host/bluedroid/Kconfig.in @@ -1096,7 +1096,7 @@ config BT_BLE_RPA_SUPPORTED cannot be used. This option is disabled by default on ESP32, please enable or disable this option according to your own needs. - For ESP32C3, ESP32S3, ESP32H2 and ESP32C2, devices support network privacy mode and device privacy mode, + For ESP32C3, ESP32S3, ESP32H4 and ESP32C2, devices support network privacy mode and device privacy mode, users can switch the two modes according to their own needs. So this option is enabled by default. config BT_BLE_50_FEATURES_SUPPORTED diff --git a/components/bt/host/nimble/Kconfig.in b/components/bt/host/nimble/Kconfig.in index ceeb05b560..8f8745f69d 100644 --- a/components/bt/host/nimble/Kconfig.in +++ b/components/bt/host/nimble/Kconfig.in @@ -64,10 +64,10 @@ config BT_NIMBLE_LOG_LEVEL config BT_NIMBLE_MAX_CONNECTIONS int "Maximum number of concurrent connections" - range 1 8 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2) + range 1 8 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H4) range 1 2 if IDF_TARGET_ESP32C2 range 1 9 if IDF_TARGET_ESP32 - default 3 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2) + default 3 if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H4) default 2 if IDF_TARGET_ESP32C2 depends on BT_NIMBLE_ENABLED help @@ -483,7 +483,7 @@ config BT_NIMBLE_HOST_BASED_PRIVACY config BT_NIMBLE_ENABLE_CONN_REATTEMPT bool "Enable connection reattempts on connection establishment error" - default y if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H2 || IDF_TARGET_ESP32C2) + default y if (IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32H4 || IDF_TARGET_ESP32C2) default n if IDF_TARGET_ESP32 help Enable to make the NimBLE host to reattempt GAP connection on connection @@ -579,7 +579,7 @@ config BT_NIMBLE_MAX_PERIODIC_SYNCS config BT_NIMBLE_MAX_PERIODIC_ADVERTISER_LIST int "Maximum number of periodic advertiser list" - depends on BT_NIMBLE_50_FEATURE_SUPPORT && (IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2) + depends on BT_NIMBLE_50_FEATURE_SUPPORT && (IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4) range 1 5 default 5 if BT_NIMBLE_50_FEATURE_SUPPORT help diff --git a/components/bt/include/esp32h2/include/esp_bt.h b/components/bt/include/esp32h4/include/esp_bt.h similarity index 100% rename from components/bt/include/esp32h2/include/esp_bt.h rename to components/bt/include/esp32h4/include/esp_bt.h diff --git a/components/bt/include/esp32h2/include/esp_bt_cfg.h b/components/bt/include/esp32h4/include/esp_bt_cfg.h similarity index 100% rename from components/bt/include/esp32h2/include/esp_bt_cfg.h rename to components/bt/include/esp32h4/include/esp_bt_cfg.h diff --git a/components/bt/porting/nimble/include/nimble/ble_hci_trans.h b/components/bt/porting/nimble/include/nimble/ble_hci_trans.h index 41db077b1b..df9cd71c60 100644 --- a/components/bt/porting/nimble/include/nimble/ble_hci_trans.h +++ b/components/bt/porting/nimble/include/nimble/ble_hci_trans.h @@ -66,7 +66,7 @@ struct os_mbuf; typedef int ble_hci_trans_rx_cmd_fn(uint8_t *cmd, void *arg); typedef int ble_hci_trans_rx_acl_fn(struct os_mbuf *om, void *arg); -#if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#if CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 struct ble_hci_trans_funcs_t { int(*_ble_hci_trans_hs_acl_tx)(struct os_mbuf *om); int(*_ble_hci_trans_hs_cmd_tx)(uint8_t *cmd); diff --git a/components/bt/porting/nimble/include/nimble/nimble_port.h b/components/bt/porting/nimble/include/nimble/nimble_port.h index c0a24ba722..37dac6f0bc 100644 --- a/components/bt/porting/nimble/include/nimble/nimble_port.h +++ b/components/bt/porting/nimble/include/nimble/nimble_port.h @@ -27,7 +27,7 @@ #define NIMBLE_HS_STACK_SIZE CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE -#if (CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2) +#if (CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2) #define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE #endif diff --git a/components/bt/sdkconfig.rename.esp32h2 b/components/bt/sdkconfig.rename.esp32h2 deleted file mode 100644 index e69de29bb2..0000000000 diff --git a/components/driver/deprecated/driver/adc_types_legacy.h b/components/driver/deprecated/driver/adc_types_legacy.h index 8336bff9ba..1a2b2a4d55 100644 --- a/components/driver/deprecated/driver/adc_types_legacy.h +++ b/components/driver/deprecated/driver/adc_types_legacy.h @@ -61,7 +61,7 @@ typedef enum { ADC1_CHANNEL_9, /*!< ADC1 channel 9 is GPIO10 */ ADC1_CHANNEL_MAX, } adc1_channel_t; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5310 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5310 typedef enum { ADC1_CHANNEL_0 = 0, /*!< ADC1 channel 0 is GPIO0 */ ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO1 */ @@ -86,7 +86,7 @@ typedef enum { ADC2_CHANNEL_9, /*!< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2) */ ADC2_CHANNEL_MAX, } adc2_channel_t; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5310 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5310 typedef enum { ADC2_CHANNEL_0 = 0, /*!< ADC2 channel 0 is GPIO5 */ ADC2_CHANNEL_MAX, diff --git a/components/driver/test/include/test/test_common_spi.h b/components/driver/test/include/test/test_common_spi.h index 4c9d1ea1c2..db333c4c07 100644 --- a/components/driver/test/include/test/test_common_spi.h +++ b/components/driver/test/include/test/test_common_spi.h @@ -86,7 +86,7 @@ #define ESP_SPI_SLAVE_TV 0 #define WIRE_DELAY 12.5 -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 //NOTE: On these chips, there is only 1 GPSPI controller, so master-slave test on single board should be disabled #define TEST_SPI_HOST SPI2_HOST #define TEST_SLAVE_HOST SPI2_HOST diff --git a/components/driver/test/test_i2c.c b/components/driver/test/test_i2c.c index 7a792e9b17..52c61162bd 100644 --- a/components/driver/test/test_i2c.c +++ b/components/driver/test/test_i2c.c @@ -32,7 +32,7 @@ #define RW_TEST_LENGTH 129 /*! #include "esp_efuse_table.h" -// md5_digest_table 4ff665f7ab2f32b83f2b5b232bcdeac8 +// md5_digest_table b9e60ac2d8c534764d7bee10063617aa // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -378,7 +378,7 @@ static const esp_efuse_desc_t WAFER_VERSION[] = { }; static const esp_efuse_desc_t PKG_VERSION[] = { - {EFUSE_BLK1, 117, 3}, // Package version 0:ESP32H2, + {EFUSE_BLK1, 117, 3}, // Package version 0:ESP32H4, }; static const esp_efuse_desc_t BLOCK1_VERSION[] = { @@ -925,7 +925,7 @@ const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[] = { }; const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = { - &PKG_VERSION[0], // Package version 0:ESP32H2 + &PKG_VERSION[0], // Package version 0:ESP32H4 NULL }; diff --git a/components/efuse/esp32h2/esp_efuse_table.csv b/components/efuse/esp32h4/esp_efuse_table.csv similarity index 99% rename from components/efuse/esp32h2/esp_efuse_table.csv rename to components/efuse/esp32h4/esp_efuse_table.csv index 49f8494cf7..2b08c33d70 100644 --- a/components/efuse/esp32h2/esp_efuse_table.csv +++ b/components/efuse/esp32h4/esp_efuse_table.csv @@ -10,7 +10,7 @@ # this will generate new source files, next rebuild all the sources. # !!!!!!!!!!! # -# ESP32H2-TODO: IDF-3390 +# ESP32H4-TODO: IDF-3390 # EFUSE_RD_REPEAT_DATA BLOCK # ############################## # EFUSE_RD_WR_DIS_REG # @@ -123,7 +123,7 @@ SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, SPI_PAD_configure D6 SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, SPI_PAD_configure D7 WAFER_VERSION, EFUSE_BLK1, 114, 3, WAFER version - PKG_VERSION, EFUSE_BLK1, 117, 3, Package version 0:ESP32H2 + PKG_VERSION, EFUSE_BLK1, 117, 3, Package version 0:ESP32H4 BLOCK1_VERSION, EFUSE_BLK1, 120, 3, BLOCK1 efuse version # SYS_DATA_PART1 BLOCK# - System configuration diff --git a/components/efuse/esp32h2/esp_efuse_utility.c b/components/efuse/esp32h4/esp_efuse_utility.c similarity index 100% rename from components/efuse/esp32h2/esp_efuse_utility.c rename to components/efuse/esp32h4/esp_efuse_utility.c diff --git a/components/efuse/esp32h2/include/esp_efuse_chip.h b/components/efuse/esp32h4/include/esp_efuse_chip.h similarity index 98% rename from components/efuse/esp32h2/include/esp_efuse_chip.h rename to components/efuse/esp32h4/include/esp_efuse_chip.h index 4dce9e72b0..c5a67663c1 100644 --- a/components/efuse/esp32h2/include/esp_efuse_chip.h +++ b/components/efuse/esp32h4/include/esp_efuse_chip.h @@ -11,7 +11,7 @@ extern "C" { #endif /** - * @brief Type of eFuse blocks ESP32H2 + * @brief Type of eFuse blocks ESP32H4 */ typedef enum { EFUSE_BLK0 = 0, /**< Number of eFuse BLOCK0. REPEAT_DATA */ diff --git a/components/efuse/esp32h2/include/esp_efuse_rtc_calib.h b/components/efuse/esp32h4/include/esp_efuse_rtc_calib.h similarity index 100% rename from components/efuse/esp32h2/include/esp_efuse_rtc_calib.h rename to components/efuse/esp32h4/include/esp_efuse_rtc_calib.h diff --git a/components/efuse/esp32h2/include/esp_efuse_table.h b/components/efuse/esp32h4/include/esp_efuse_table.h similarity index 99% rename from components/efuse/esp32h2/include/esp_efuse_table.h rename to components/efuse/esp32h4/include/esp_efuse_table.h index 6f5cb33591..f5ed848a0c 100644 --- a/components/efuse/esp32h2/include/esp_efuse_table.h +++ b/components/efuse/esp32h4/include/esp_efuse_table.h @@ -10,7 +10,7 @@ extern "C" { #include "esp_efuse.h" -// md5_digest_table 4ff665f7ab2f32b83f2b5b232bcdeac8 +// md5_digest_table b9e60ac2d8c534764d7bee10063617aa // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. diff --git a/components/efuse/esp32h2/private_include/esp_efuse_utility.h b/components/efuse/esp32h4/private_include/esp_efuse_utility.h similarity index 100% rename from components/efuse/esp32h2/private_include/esp_efuse_utility.h rename to components/efuse/esp32h4/private_include/esp_efuse_utility.h diff --git a/components/efuse/esp32h2/sources.cmake b/components/efuse/esp32h4/sources.cmake similarity index 100% rename from components/efuse/esp32h2/sources.cmake rename to components/efuse/esp32h4/sources.cmake diff --git a/components/esp_adc/esp32h2/include/adc_cali_schemes.h b/components/esp_adc/esp32h4/include/adc_cali_schemes.h similarity index 100% rename from components/esp_adc/esp32h2/include/adc_cali_schemes.h rename to components/esp_adc/esp32h4/include/adc_cali_schemes.h diff --git a/components/esp_gdbstub/esp32h2/gdbstub_esp32h2.c b/components/esp_gdbstub/esp32h4/gdbstub_esp32h4.c similarity index 100% rename from components/esp_gdbstub/esp32h2/gdbstub_esp32h2.c rename to components/esp_gdbstub/esp32h4/gdbstub_esp32h4.c diff --git a/components/esp_gdbstub/esp32h2/gdbstub_target_config.h b/components/esp_gdbstub/esp32h4/gdbstub_target_config.h similarity index 100% rename from components/esp_gdbstub/esp32h2/gdbstub_target_config.h rename to components/esp_gdbstub/esp32h4/gdbstub_target_config.h diff --git a/components/esp_hw_support/cpu.c b/components/esp_hw_support/cpu.c index 929aa32ff5..355c11c304 100644 --- a/components/esp_hw_support/cpu.c +++ b/components/esp_hw_support/cpu.c @@ -303,12 +303,12 @@ void esp_cpu_configure_region_protection(void) mpu_hal_set_region_access(1, MPU_REGION_RW); // 0x20000000 } -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 void esp_cpu_configure_region_protection(void) { /* Notes on implementation: * - * 1) Note: ESP32-C3/H2 CPU doesn't support overlapping PMP regions + * 1) Note: ESP32-C3/H4 CPU doesn't support overlapping PMP regions * * 2) Therefore, we use TOR (top of range) entries to map the whole address * space, bottom to top. diff --git a/components/esp_hw_support/esp_clk.c b/components/esp_hw_support/esp_clk.c index c1dff5f876..4bd2544e50 100644 --- a/components/esp_hw_support/esp_clk.c +++ b/components/esp_hw_support/esp_clk.c @@ -29,9 +29,9 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/rtc.h" #include "esp32c3/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/rtc.h" -#include "esp32h2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/rtc.h" +#include "esp32h4/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" #include "esp32c2/rtc.h" diff --git a/components/esp_hw_support/include/esp_chip_info.h b/components/esp_hw_support/include/esp_chip_info.h index 227d55a0fa..3e976af880 100644 --- a/components/esp_hw_support/include/esp_chip_info.h +++ b/components/esp_hw_support/include/esp_chip_info.h @@ -24,7 +24,7 @@ typedef enum { CHIP_ESP32S2 = 2, //!< ESP32-S2 CHIP_ESP32S3 = 9, //!< ESP32-S3 CHIP_ESP32C3 = 5, //!< ESP32-C3 - CHIP_ESP32H2 = 6, //!< ESP32-H2 + CHIP_ESP32H4 = 6, //!< ESP32-H4 CHIP_ESP32C2 = 12, //!< ESP32-C2 CHIP_ESP32C6 = 13, //!< ESP32-C6 } esp_chip_model_t; diff --git a/components/esp_hw_support/include/esp_mac.h b/components/esp_hw_support/include/esp_mac.h index e4eb06cd09..a27e404844 100644 --- a/components/esp_hw_support/include/esp_mac.h +++ b/components/esp_hw_support/include/esp_mac.h @@ -37,8 +37,8 @@ typedef enum { #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES #elif CONFIG_IDF_TARGET_ESP32C3 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES -#elif CONFIG_IDF_TARGET_ESP32H2 -#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32H2_UNIVERSAL_MAC_ADDRESSES +#elif CONFIG_IDF_TARGET_ESP32H4 +#define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32H4_UNIVERSAL_MAC_ADDRESSES #elif CONFIG_IDF_TARGET_ESP32C2 #define UNIVERSAL_MAC_ADDR_NUM CONFIG_ESP32C2_UNIVERSAL_MAC_ADDRESSES #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_hw_support/include/esp_private/esp_sleep_internal.h b/components/esp_hw_support/include/esp_private/esp_sleep_internal.h index 359c3f5f75..07af89ff9f 100644 --- a/components/esp_hw_support/include/esp_private/esp_sleep_internal.h +++ b/components/esp_hw_support/include/esp_private/esp_sleep_internal.h @@ -22,7 +22,7 @@ extern "C" { void esp_sleep_enable_adc_tsens_monitor(bool enable); // TODO: IDF-6051, IDF-6052 -#if !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C6 +#if !CONFIG_IDF_TARGET_ESP32H4 && !CONFIG_IDF_TARGET_ESP32C6 /** * @brief Isolate all digital IOs except those that are held during deep sleep * diff --git a/components/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h b/components/esp_hw_support/include/soc/esp32h4/esp_crypto_lock.h similarity index 100% rename from components/esp_hw_support/include/soc/esp32h2/esp_crypto_lock.h rename to components/esp_hw_support/include/soc/esp32h4/esp_crypto_lock.h diff --git a/components/esp_hw_support/include/soc/esp32h2/esp_ds.h b/components/esp_hw_support/include/soc/esp32h4/esp_ds.h similarity index 100% rename from components/esp_hw_support/include/soc/esp32h2/esp_ds.h rename to components/esp_hw_support/include/soc/esp32h4/esp_ds.h diff --git a/components/esp_hw_support/include/soc/esp32h2/rtc.h b/components/esp_hw_support/include/soc/esp32h4/rtc.h similarity index 95% rename from components/esp_hw_support/include/soc/esp32h2/rtc.h rename to components/esp_hw_support/include/soc/esp32h4/rtc.h index 75460416c7..7586359f4e 100644 --- a/components/esp_hw_support/include/soc/esp32h2/rtc.h +++ b/components/esp_hw_support/include/soc/esp32h4/rtc.h @@ -13,7 +13,7 @@ extern "C" { #endif /** - * @file esp32h2/rtc.h + * @file esp32h4/rtc.h * * This file contains declarations of rtc related functions. */ diff --git a/components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h b/components/esp_hw_support/include/soc/esp32h4/soc_memprot_types.h similarity index 98% rename from components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h rename to components/esp_hw_support/include/soc/esp32h4/soc_memprot_types.h index 9b84d1471d..0359804ca4 100644 --- a/components/esp_hw_support/include/soc/esp32h2/soc_memprot_types.h +++ b/components/esp_hw_support/include/soc/esp32h4/soc_memprot_types.h @@ -5,7 +5,7 @@ */ ////////////////////////////////////////////////////////// -// ESP32-H2 PMS memory protection types +// ESP32-H4 PMS memory protection types // #pragma once diff --git a/components/esp_hw_support/mac_addr.c b/components/esp_hw_support/mac_addr.c index 0278df30cb..2069d421bc 100644 --- a/components/esp_hw_support/mac_addr.c +++ b/components/esp_hw_support/mac_addr.c @@ -221,10 +221,10 @@ esp_err_t esp_read_mac(uint8_t *mac, esp_mac_type_t type) case ESP_MAC_BT: #if CONFIG_ESP_MAC_ADDR_UNIVERSE_BT memcpy(mac, efuse_mac, 6); -#if !CONFIG_IDF_TARGET_ESP32H2 - // esp32h2 chips do not have wifi module, so the mac address do not need to add the BT offset +#if !CONFIG_IDF_TARGET_ESP32H4 + // esp32h4 chips do not have wifi module, so the mac address do not need to add the BT offset mac[5] += MAC_ADDR_UNIVERSE_BT_OFFSET; -#endif //!CONFIG_IDF_TARGET_ESP32H2 +#endif //!CONFIG_IDF_TARGET_ESP32H4 #else return ESP_ERR_NOT_SUPPORTED; #endif // CONFIG_ESP_MAC_ADDR_UNIVERSE_BT diff --git a/components/esp_hw_support/port/esp32h2/CMakeLists.txt b/components/esp_hw_support/port/esp32h4/CMakeLists.txt similarity index 100% rename from components/esp_hw_support/port/esp32h2/CMakeLists.txt rename to components/esp_hw_support/port/esp32h4/CMakeLists.txt diff --git a/components/esp_hw_support/port/esp32h2/Kconfig.hw_support b/components/esp_hw_support/port/esp32h4/Kconfig.hw_support similarity index 63% rename from components/esp_hw_support/port/esp32h2/Kconfig.hw_support rename to components/esp_hw_support/port/esp32h4/Kconfig.hw_support index bcb9bff200..2a3d71c4c5 100644 --- a/components/esp_hw_support/port/esp32h2/Kconfig.hw_support +++ b/components/esp_hw_support/port/esp32h4/Kconfig.hw_support @@ -1,6 +1,6 @@ -choice ESP32H2_REV_MIN - prompt "Minimum Supported ESP32-H2 Revision" - default ESP32H2_REV_MIN_0 +choice ESP32H4_REV_MIN + prompt "Minimum Supported ESP32-H4 Revision" + default ESP32H4_REV_MIN_0 help Required minimum chip revision. ESP-IDF will check for it and reject to boot if the chip revision fails the check. @@ -9,33 +9,33 @@ choice ESP32H2_REV_MIN The complied binary will only support chips above this revision, this will also help to reduce binary size. - config ESP32H2_REV_MIN_0 + config ESP32H4_REV_MIN_0 bool "Rev v0.0 (ECO0)" endchoice -config ESP32H2_REV_MIN_FULL +config ESP32H4_REV_MIN_FULL int - default 0 if ESP32H2_REV_MIN_0 + default 0 if ESP32H4_REV_MIN_0 config ESP_REV_MIN_FULL int - default ESP32H2_REV_MIN_FULL + default ESP32H4_REV_MIN_FULL # # MAX Revision # - comment "Maximum Supported ESP32-H2 Revision (Rev v1.99)" + comment "Maximum Supported ESP32-H4 Revision (Rev v1.99)" # Maximum revision that IDF supports. # It can not be changed by user. # Only Espressif can change it when a new version will be supported in IDF. - # Supports all chips starting from ESP32H2_REV_MIN_FULL to ESP32H2_REV_MAX_FULL + # Supports all chips starting from ESP32H4_REV_MIN_FULL to ESP32H4_REV_MAX_FULL -config ESP32H2_REV_MAX_FULL +config ESP32H4_REV_MAX_FULL int default 199 # keep in sync the "Maximum Supported Revision" description with this value config ESP_REV_MAX_FULL int - default ESP32H2_REV_MAX_FULL + default ESP32H4_REV_MAX_FULL diff --git a/components/esp_hw_support/port/esp32h2/Kconfig.mac b/components/esp_hw_support/port/esp32h4/Kconfig.mac similarity index 62% rename from components/esp_hw_support/port/esp32h2/Kconfig.mac rename to components/esp_hw_support/port/esp32h4/Kconfig.mac index 4135169df0..89e627aba5 100644 --- a/components/esp_hw_support/port/esp32h2/Kconfig.mac +++ b/components/esp_hw_support/port/esp32h4/Kconfig.mac @@ -1,18 +1,18 @@ -# ESP32H2-TODO: IDF-3390 -choice ESP32H2_UNIVERSAL_MAC_ADDRESSES +# ESP32H4-TODO: IDF-3390 +choice ESP32H4_UNIVERSAL_MAC_ADDRESSES bool "Number of universally administered (by IEEE) MAC address" - default ESP32H2_UNIVERSAL_MAC_ADDRESSES_TWO + default ESP32H4_UNIVERSAL_MAC_ADDRESSES_TWO help Configure the number of universally administered (by IEEE) MAC addresses. During initialization, MAC addresses for each network interface are generated or derived from a single base MAC address. - config ESP32H2_UNIVERSAL_MAC_ADDRESSES_TWO + config ESP32H4_UNIVERSAL_MAC_ADDRESSES_TWO bool "Two" select ESP_MAC_ADDR_UNIVERSE_IEEE802154 select ESP_MAC_ADDR_UNIVERSE_BT endchoice -config ESP32H2_UNIVERSAL_MAC_ADDRESSES +config ESP32H4_UNIVERSAL_MAC_ADDRESSES int - default 2 if ESP32H2_UNIVERSAL_MAC_ADDRESSES_TWO + default 2 if ESP32H4_UNIVERSAL_MAC_ADDRESSES_TWO diff --git a/components/esp_hw_support/port/esp32h2/Kconfig.rtc b/components/esp_hw_support/port/esp32h4/Kconfig.rtc similarity index 100% rename from components/esp_hw_support/port/esp32h2/Kconfig.rtc rename to components/esp_hw_support/port/esp32h4/Kconfig.rtc diff --git a/components/esp_hw_support/port/esp32h2/chip_info.c b/components/esp_hw_support/port/esp32h4/chip_info.c similarity index 92% rename from components/esp_hw_support/port/esp32h2/chip_info.c rename to components/esp_hw_support/port/esp32h4/chip_info.c index 1b7c172e00..b234821060 100644 --- a/components/esp_hw_support/port/esp32h2/chip_info.c +++ b/components/esp_hw_support/port/esp32h4/chip_info.c @@ -11,7 +11,7 @@ void esp_chip_info(esp_chip_info_t *out_info) { memset(out_info, 0, sizeof(*out_info)); - out_info->model = CHIP_ESP32H2; + out_info->model = CHIP_ESP32H4; out_info->revision = efuse_hal_chip_revision(); out_info->cores = 1; out_info->features = CHIP_FEATURE_IEEE802154 | CHIP_FEATURE_BLE; diff --git a/components/esp_hw_support/port/esp32h2/esp_crypto_lock.c b/components/esp_hw_support/port/esp32h4/esp_crypto_lock.c similarity index 100% rename from components/esp_hw_support/port/esp32h2/esp_crypto_lock.c rename to components/esp_hw_support/port/esp32h4/esp_crypto_lock.c diff --git a/components/esp_hw_support/port/esp32h2/esp_ds.c b/components/esp_hw_support/port/esp32h4/esp_ds.c similarity index 99% rename from components/esp_hw_support/port/esp32h2/esp_ds.c rename to components/esp_hw_support/port/esp32h4/esp_ds.c index 5b5af6963b..d2d99c9828 100644 --- a/components/esp_hw_support/port/esp32h2/esp_ds.c +++ b/components/esp_hw_support/port/esp32h4/esp_ds.c @@ -15,7 +15,7 @@ #include "hal/ds_hal.h" #include "hal/ds_ll.h" #include "hal/hmac_hal.h" -#include "esp32h2/rom/digital_signature.h" +#include "esp32h4/rom/digital_signature.h" #include "esp_timer.h" #include "esp_ds.h" diff --git a/components/esp_hw_support/port/esp32h2/esp_memprot.c b/components/esp_hw_support/port/esp32h4/esp_memprot.c similarity index 100% rename from components/esp_hw_support/port/esp32h2/esp_memprot.c rename to components/esp_hw_support/port/esp32h4/esp_memprot.c diff --git a/components/esp_hw_support/port/esp32h2/i2c_brownout.h b/components/esp_hw_support/port/esp32h4/i2c_brownout.h similarity index 100% rename from components/esp_hw_support/port/esp32h2/i2c_brownout.h rename to components/esp_hw_support/port/esp32h4/i2c_brownout.h diff --git a/components/esp_hw_support/port/esp32h2/rtc_clk.c b/components/esp_hw_support/port/esp32h4/rtc_clk.c similarity index 98% rename from components/esp_hw_support/port/esp32h2/rtc_clk.c rename to components/esp_hw_support/port/esp32h4/rtc_clk.c index 801ccca5c9..c483ccd83a 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32h4/rtc_clk.c @@ -10,10 +10,10 @@ #include #include #include "sdkconfig.h" -#include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/rtc.h" -#include "esp32h2/rom/uart.h" -#include "esp32h2/rom/gpio.h" +#include "esp32h4/rom/ets_sys.h" +#include "esp32h4/rom/rtc.h" +#include "esp32h4/rom/uart.h" +#include "esp32h4/rom/gpio.h" #include "soc/rtc.h" #include "soc/io_mux_reg.h" #include "hal/clk_tree_ll.h" @@ -61,7 +61,7 @@ void rtc_clk_32k_enable_external(void) void rtc_clk_32k_bootstrap(uint32_t cycle) { - /* No special bootstrapping needed for ESP32-H2, 'cycle' argument is to keep the signature + /* No special bootstrapping needed for ESP32-H4, 'cycle' argument is to keep the signature * same as for the ESP32. Just enable the XTAL here. */ (void)cycle; diff --git a/components/esp_hw_support/port/esp32h2/rtc_clk_init.c b/components/esp_hw_support/port/esp32h4/rtc_clk_init.c similarity index 92% rename from components/esp_hw_support/port/esp32h2/rtc_clk_init.c rename to components/esp_hw_support/port/esp32h4/rtc_clk_init.c index d4bd463ef8..26ad1c0ed3 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_clk_init.c +++ b/components/esp_hw_support/port/esp32h4/rtc_clk_init.c @@ -9,10 +9,10 @@ #include #include #include "sdkconfig.h" -#include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/rtc.h" -#include "esp32h2/rom/uart.h" -#include "esp32h2/rom/gpio.h" +#include "esp32h4/rom/ets_sys.h" +#include "esp32h4/rom/rtc.h" +#include "esp32h4/rom/uart.h" +#include "esp32h4/rom/gpio.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" #include "soc/rtc_cntl_reg.h" @@ -38,9 +38,9 @@ void rtc_clk_init(rtc_clk_config_t cfg) * - CK8M_DFREQ value controls tuning of 8M clock. * CLK_8M_DFREQ constant gives the best temperature characteristics. */ -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 REG_SET_FIELD(RTC_CNTL_REGULATOR_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_SCK_DCAP, cfg.slow_clk_dcap); #endif REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_DFREQ, cfg.clk_8m_dfreq); diff --git a/components/esp_hw_support/port/esp32h2/rtc_init.c b/components/esp_hw_support/port/esp32h4/rtc_init.c similarity index 99% rename from components/esp_hw_support/port/esp32h2/rtc_init.c rename to components/esp_hw_support/port/esp32h4/rtc_init.c index 80adb0ffff..126e1e05db 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_init.c +++ b/components/esp_hw_support/port/esp32h4/rtc_init.c @@ -81,10 +81,10 @@ void rtc_init(rtc_config_t cfg) SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BB_I2C_FORCE_PU); } -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 CLEAR_PERI_REG_MASK(RTC_CNTL_REGULATOR_REG, RTC_CNTL_REGULATOR_FORCE_PU); CLEAR_PERI_REG_MASK(RTC_CNTL_REGULATOR_REG, RTC_CNTL_DBOOST_FORCE_PU); -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 CLEAR_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU); CLEAR_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_DBOOST_FORCE_PU); #endif diff --git a/components/esp_hw_support/port/esp32h2/rtc_pm.c b/components/esp_hw_support/port/esp32h4/rtc_pm.c similarity index 95% rename from components/esp_hw_support/port/esp32h2/rtc_pm.c rename to components/esp_hw_support/port/esp32h4/rtc_pm.c index 3b6c44967a..486f761791 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_pm.c +++ b/components/esp_hw_support/port/esp32h4/rtc_pm.c @@ -44,7 +44,7 @@ pm_sw_reject_t pm_set_sleep_mode(pm_sleep_mode_t sleep_mode, void(*pmac_save_par switch (sleep_mode) { case PM_LIGHT_SLEEP: - // cfg.wifi_pd_en = 1; // ESP32-H2 TO-DO: IDF-3693 + // cfg.wifi_pd_en = 1; // ESP32-H4 TO-DO: IDF-3693 cfg.dig_dbias_wak = 4; cfg.dig_dbias_slp = 0; cfg.rtc_dbias_wak = 0; diff --git a/components/esp_hw_support/port/esp32h2/rtc_sleep.c b/components/esp_hw_support/port/esp32h4/rtc_sleep.c similarity index 98% rename from components/esp_hw_support/port/esp32h2/rtc_sleep.c rename to components/esp_hw_support/port/esp32h4/rtc_sleep.c index 563bbd1658..df09677777 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32h4/rtc_sleep.c @@ -16,8 +16,8 @@ #include "soc/fe_reg.h" #include "soc/timer_group_reg.h" #include "soc/system_reg.h" -#include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/rtc.h" +#include "esp32h4/rom/ets_sys.h" +#include "esp32h4/rom/rtc.h" #include "regi2c_ctrl.h" #include "soc/regi2c_bias.h" #include "soc/regi2c_ulp.h" @@ -26,10 +26,10 @@ #include "esp_hw_log.h" #include "esp_rom_uart.h" -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 #define RTC_CNTL_DIG_REGULATOR_REG1 RTC_CNTL_DIG_REGULATOR_REG #define RTC_CNTL_DIG_REGULATOR_REG2 RTC_CNTL_DIG_REGULATOR_REG -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 #define RTC_CNTL_DIG_REGULATOR_REG1 RTC_CNTL_DIGULATOR_REG #define RTC_CNTL_DIG_REGULATOR_REG2 RTC_CNTL_REG #define RTC_CNTL_DIG_REGULATOR1_DBIAS_REG RTC_CNTL_DIGULATOR1_DBIAS_REG @@ -244,7 +244,7 @@ void rtc_sleep_init(rtc_sleep_config_t cfg) REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_MONITOR, cfg.pd_cur_monitor); REG_SET_FIELD(RTC_CNTL_BIAS_CONF_REG, RTC_CNTL_PD_CUR_DEEP_SLP, cfg.pd_cur_slp); - // ESP32-H2 TO-DO: IDF-3693 + // ESP32-H4 TO-DO: IDF-3693 if (cfg.deep_slp) { // REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_XPD_CK, 0); // CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_REGULATOR_REG2, RTC_CNTL_REGULATOR_FORCE_PU); diff --git a/components/esp_hw_support/port/esp32h2/rtc_time.c b/components/esp_hw_support/port/esp32h4/rtc_time.c similarity index 98% rename from components/esp_hw_support/port/esp32h2/rtc_time.c rename to components/esp_hw_support/port/esp32h4/rtc_time.c index 88563ebc8b..81522556ca 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_time.c +++ b/components/esp_hw_support/port/esp32h4/rtc_time.c @@ -5,7 +5,7 @@ */ #include -#include "esp32h2/rom/ets_sys.h" +#include "esp32h4/rom/ets_sys.h" #include "soc/rtc.h" #include "soc/rtc_cntl_reg.h" #include "hal/clk_tree_ll.h" @@ -32,7 +32,7 @@ */ uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles) { - /* On ESP32H2, choosing RTC_CAL_RTC_MUX results in calibration of + /* On ESP32H4, choosing RTC_CAL_RTC_MUX results in calibration of * the 150k RTC clock regardless of the currenlty selected SLOW_CLK. * On the ESP32, it used the currently selected SLOW_CLK. * The following code emulates ESP32 behavior: diff --git a/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32h4/sar_periph_ctrl.c similarity index 100% rename from components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c rename to components/esp_hw_support/port/esp32h4/sar_periph_ctrl.c diff --git a/components/esp_hw_support/port/esp32h2/systimer.c b/components/esp_hw_support/port/esp32h4/systimer.c similarity index 100% rename from components/esp_hw_support/port/esp32h2/systimer.c rename to components/esp_hw_support/port/esp32h4/systimer.c diff --git a/components/esp_hw_support/sdkconfig.rename.esp32h2 b/components/esp_hw_support/sdkconfig.rename.esp32h2 deleted file mode 100644 index b9df04f7d0..0000000000 --- a/components/esp_hw_support/sdkconfig.rename.esp32h2 +++ /dev/null @@ -1,7 +0,0 @@ -# sdkconfig replacement configurations for deprecated options formatted as -# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION - -CONFIG_ESP32H2_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC -CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS CONFIG_RTC_CLK_SRC_EXT_CRYS -CONFIG_ESP32H2_RTC_CLK_SRC_EXT_OSC CONFIG_RTC_CLK_SRC_EXT_OSC -CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c index e432044d2d..d83b5cc918 100644 --- a/components/esp_hw_support/sleep_gpio.c +++ b/components/esp_hw_support/sleep_gpio.c @@ -105,7 +105,7 @@ void esp_sleep_enable_gpio_switch(bool enable) #endif // SOC_GPIO_SUPPORT_SLP_SWITCH // TODO: IDF-6051, IDF-6052 -#if !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C6 +#if !CONFIG_IDF_TARGET_ESP32H4 && !CONFIG_IDF_TARGET_ESP32C6 IRAM_ATTR void esp_sleep_isolate_digital_gpio(void) { gpio_hal_context_t gpio_hal = { diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 4208465cfa..8b48c371eb 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -71,9 +71,9 @@ #include "esp32c3/rom/rtc.h" #include "soc/extmem_reg.h" #include "esp_private/sleep_mac_bb.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" -#include "esp32h2/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" +#include "esp32h4/rom/rtc.h" #include "soc/extmem_reg.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" @@ -106,7 +106,7 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #define DEFAULT_SLEEP_OUT_OVERHEAD_US (105) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37) -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H4 #define DEFAULT_SLEEP_OUT_OVERHEAD_US (105) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37) #elif CONFIG_IDF_TARGET_ESP32C2 @@ -510,7 +510,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags) uint32_t result; if (deep_sleep) { // TODO: IDF-6051, IDF-6052 -#if !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C6 +#if !CONFIG_IDF_TARGET_ESP32H4 && !CONFIG_IDF_TARGET_ESP32C6 esp_sleep_isolate_digital_gpio(); #endif diff --git a/components/esp_hw_support/test/test_rtc_clk.c b/components/esp_hw_support/test/test_rtc_clk.c index c45357ede3..cb7819e3be 100644 --- a/components/esp_hw_support/test/test_rtc_clk.c +++ b/components/esp_hw_support/test/test_rtc_clk.c @@ -40,9 +40,9 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" #include "esp32c3/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rtc.h" -#include "esp32h2/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rtc.h" +#include "esp32h4/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rtc.h" #include "esp32c2/rom/rtc.h" diff --git a/components/esp_phy/CMakeLists.txt b/components/esp_phy/CMakeLists.txt index 46e9abde13..cf2e7db86e 100644 --- a/components/esp_phy/CMakeLists.txt +++ b/components/esp_phy/CMakeLists.txt @@ -15,7 +15,7 @@ else() set(ldfragments "linker.lf") endif() -if(IDF_TARGET STREQUAL "esp32h2") +if(IDF_TARGET STREQUAL "esp32h4") list(APPEND srcs "src/phy_init_esp32hxx.c") else() list(APPEND srcs "src/phy_init.c") @@ -42,12 +42,14 @@ idf_component_register(SRCS "${srcs}" ) set(target_name "${idf_target}") -if(IDF_TARGET STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) - target_link_directories(${COMPONENT_LIB} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/rev2") +if(IDF_TARGET STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) + # TODO: rename esp32h2 to esp32h4 [WIFI-4956] + target_link_directories(${COMPONENT_LIB} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/rev2") endif() - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) - target_link_directories(${COMPONENT_LIB} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/rev1") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) + # TODO: rename esp32h2 to esp32h4 [WIFI-4956] + target_link_directories(${COMPONENT_LIB} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/rev1") endif() else() target_link_directories(${COMPONENT_LIB} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}") @@ -73,7 +75,7 @@ if(link_binary_libs) endif() if(CONFIG_IDF_TARGET_ESP32C3 OR CONFIG_IDF_TARGET_ESP32S3 - OR CONFIG_IDF_TARGET_ESP32H2 OR CONFIG_IDF_TARGET_ESP32C2) + OR CONFIG_IDF_TARGET_ESP32H4 OR CONFIG_IDF_TARGET_ESP32C2) target_link_libraries(${COMPONENT_LIB} PUBLIC btbb) target_link_libraries(${COMPONENT_LIB} INTERFACE $ libphy.a libbtbb.a $) diff --git a/components/esp_phy/esp32h2/include/phy_init_data.h b/components/esp_phy/esp32h2/include/phy_init_data.h deleted file mode 100644 index 7330d7e371..0000000000 --- a/components/esp_phy/esp32h2/include/phy_init_data.h +++ /dev/null @@ -1,30 +0,0 @@ -// Copyright 2016-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef PHY_INIT_DATA_H -#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */ -#include "esp_phy_init.h" -#include "sdkconfig.h" - -#ifdef __cplusplus -extern "C" { -#endif - -// There is no init data for H2 right now, could be added when necessary. - -#ifdef __cplusplus -} -#endif - -#endif /* PHY_INIT_DATA_H */ diff --git a/components/esp_phy/esp32h4/include/phy_init_data.h b/components/esp_phy/esp32h4/include/phy_init_data.h new file mode 100644 index 0000000000..6035cb9eab --- /dev/null +++ b/components/esp_phy/esp32h4/include/phy_init_data.h @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef PHY_INIT_DATA_H +#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */ +#include "esp_phy_init.h" +#include "sdkconfig.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// There is no init data for H4 right now, could be added when necessary. + +#ifdef __cplusplus +} +#endif + +#endif /* PHY_INIT_DATA_H */ diff --git a/components/esp_phy/src/phy_init_esp32hxx.c b/components/esp_phy/src/phy_init_esp32hxx.c index dce1fd672e..3c09b77cf2 100644 --- a/components/esp_phy/src/phy_init_esp32hxx.c +++ b/components/esp_phy/src/phy_init_esp32hxx.c @@ -1,16 +1,8 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "esp_attr.h" #include "freertos/portmacro.h" @@ -63,10 +55,10 @@ void esp_phy_enable(void) s_phy_access_ref++; _lock_release(&s_phy_access_lock); - // ESP32H2-TODO: enable common clk. + // ESP32H4-TODO: enable common clk. } void esp_phy_disable(void) { - // ESP32H2-TODO: close rf and disable clk for modem sleep and light sleep + // ESP32H4-TODO: close rf and disable clk for modem sleep and light sleep } diff --git a/components/esp_pm/include/esp32h2/pm.h b/components/esp_pm/include/esp32h4/pm.h similarity index 89% rename from components/esp_pm/include/esp32h2/pm.h rename to components/esp_pm/include/esp32h4/pm.h index 89af67ac8f..9a1c9c9c42 100644 --- a/components/esp_pm/include/esp32h2/pm.h +++ b/components/esp_pm/include/esp32h4/pm.h @@ -16,7 +16,7 @@ extern "C" { /** - * @brief Power management config for ESP32H2 + * @brief Power management config for ESP32H4 * * Pass a pointer to this structure as an argument to esp_pm_configure function. */ @@ -24,7 +24,7 @@ typedef struct { int max_freq_mhz; /*!< Maximum CPU frequency, in MHz */ int min_freq_mhz; /*!< Minimum CPU frequency to use when no locks are taken, in MHz */ bool light_sleep_enable; /*!< Enter light sleep when no locks are taken */ -} esp_pm_config_esp32h2_t; +} esp_pm_config_esp32h4_t; #ifdef __cplusplus diff --git a/components/esp_pm/include/esp_pm.h b/components/esp_pm/include/esp_pm.h index 32f711e520..4b8a3b05ca 100644 --- a/components/esp_pm/include/esp_pm.h +++ b/components/esp_pm/include/esp_pm.h @@ -17,8 +17,8 @@ #include "esp32s3/pm.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/pm.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/pm.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/pm.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/pm.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_pm/pm_impl.c b/components/esp_pm/pm_impl.c index 0d4094aceb..69f84f074e 100644 --- a/components/esp_pm/pm_impl.c +++ b/components/esp_pm/pm_impl.c @@ -50,8 +50,8 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/pm.h" #include "driver/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/pm.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/pm.h" #include "driver/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/pm.h" @@ -91,7 +91,7 @@ #define REF_CLK_DIV_MIN 2 // TODO: IDF-5660 #elif CONFIG_IDF_TARGET_ESP32C3 #define REF_CLK_DIV_MIN 2 -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H4 #define REF_CLK_DIV_MIN 2 #elif CONFIG_IDF_TARGET_ESP32C2 #define REF_CLK_DIV_MIN 2 @@ -229,8 +229,8 @@ esp_err_t esp_pm_configure(const void* vconfig) const esp_pm_config_esp32s3_t* config = (const esp_pm_config_esp32s3_t*) vconfig; #elif CONFIG_IDF_TARGET_ESP32C3 const esp_pm_config_esp32c3_t* config = (const esp_pm_config_esp32c3_t*) vconfig; -#elif CONFIG_IDF_TARGET_ESP32H2 - const esp_pm_config_esp32h2_t* config = (const esp_pm_config_esp32h2_t*) vconfig; +#elif CONFIG_IDF_TARGET_ESP32H4 + const esp_pm_config_esp32h4_t* config = (const esp_pm_config_esp32h4_t*) vconfig; #elif CONFIG_IDF_TARGET_ESP32C2 const esp_pm_config_esp32c2_t* config = (const esp_pm_config_esp32c2_t*) vconfig; #elif CONFIG_IDF_TARGET_ESP32C6 @@ -341,8 +341,8 @@ esp_err_t esp_pm_get_configuration(void* vconfig) esp_pm_config_esp32s3_t* config = (esp_pm_config_esp32s3_t*) vconfig; #elif CONFIG_IDF_TARGET_ESP32C3 esp_pm_config_esp32c3_t* config = (esp_pm_config_esp32c3_t*) vconfig; -#elif CONFIG_IDF_TARGET_ESP32H2 - esp_pm_config_esp32h2_t* config = (esp_pm_config_esp32h2_t*) vconfig; +#elif CONFIG_IDF_TARGET_ESP32H4 + esp_pm_config_esp32h4_t* config = (esp_pm_config_esp32h4_t*) vconfig; #elif CONFIG_IDF_TARGET_ESP32C2 esp_pm_config_esp32c2_t* config = (esp_pm_config_esp32c2_t*) vconfig; #elif CONFIG_IDF_TARGET_ESP32C6 @@ -787,8 +787,8 @@ void esp_pm_impl_init(void) esp_pm_config_esp32s3_t cfg = { #elif CONFIG_IDF_TARGET_ESP32C3 esp_pm_config_esp32c3_t cfg = { -#elif CONFIG_IDF_TARGET_ESP32H2 - esp_pm_config_esp32h2_t cfg = { +#elif CONFIG_IDF_TARGET_ESP32H4 + esp_pm_config_esp32h4_t cfg = { #elif CONFIG_IDF_TARGET_ESP32C2 esp_pm_config_esp32c2_t cfg = { #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_pm/pm_trace.c b/components/esp_pm/pm_trace.c index 3e3ab3050d..c77e77ffb3 100644 --- a/components/esp_pm/pm_trace.c +++ b/components/esp_pm/pm_trace.c @@ -15,7 +15,7 @@ * Feel free to change when debugging. */ static const int DRAM_ATTR s_trace_io[] = { -#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32C2) +#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H4) && !defined(CONFIG_IDF_TARGET_ESP32C2) BIT(4), BIT(5), // ESP_PM_TRACE_IDLE BIT(16), BIT(17), // ESP_PM_TRACE_TICK BIT(18), BIT(18), // ESP_PM_TRACE_FREQ_SWITCH diff --git a/components/esp_pm/test/test_pm.c b/components/esp_pm/test/test_pm.c index 83f4d8bcd8..e9961e4e98 100644 --- a/components/esp_pm/test/test_pm.c +++ b/components/esp_pm/test/test_pm.c @@ -52,8 +52,8 @@ static void switch_freq(int mhz) esp_pm_config_esp32c2_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32C3 esp_pm_config_esp32c3_t pm_config = { -#elif CONFIG_IDF_TARGET_ESP32H2 - esp_pm_config_esp32h2_t pm_config = { +#elif CONFIG_IDF_TARGET_ESP32H4 + esp_pm_config_esp32h4_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32C6 esp_pm_config_esp32c6_t pm_config = { #endif @@ -74,7 +74,7 @@ static const int test_freqs[] = {40, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 80, 40, 80 #elif CONFIG_IDF_TARGET_ESP32C2 static const int test_freqs[] = {CONFIG_XTAL_FREQ, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 80, CONFIG_XTAL_FREQ, 80, CONFIG_XTAL_FREQ / 2, CONFIG_XTAL_FREQ}; // C2 xtal has 40/26MHz option -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H4 static const int test_freqs[] = {32, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 32} // TODO: IDF-3786 #else static const int test_freqs[] = {240, 40, 160, 240, 80, 40, 240, 40, 80, 10, 80, 20, 40}; @@ -109,8 +109,8 @@ static void light_sleep_enable(void) esp_pm_config_esp32c2_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32C3 esp_pm_config_esp32c3_t pm_config = { -#elif CONFIG_IDF_TARGET_ESP32H2 - esp_pm_config_esp32h2_t pm_config = { +#elif CONFIG_IDF_TARGET_ESP32H4 + esp_pm_config_esp32h4_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32C6 esp_pm_config_esp32c6_t pm_config = { #endif @@ -135,8 +135,8 @@ static void light_sleep_disable(void) esp_pm_config_esp32c2_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32C3 esp_pm_config_esp32c3_t pm_config = { -#elif CONFIG_IDF_TARGET_ESP32H2 - esp_pm_config_esp32h2_t pm_config = { +#elif CONFIG_IDF_TARGET_ESP32H4 + esp_pm_config_esp32h4_t pm_config = { #elif CONFIG_IDF_TARGET_ESP32C6 esp_pm_config_esp32c6_t pm_config = { #endif diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index b0212cf048..84463a9a61 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -42,10 +42,10 @@ idf_component_register(SRCS ${sources} PRIV_REQUIRES ${private_required_comp} LDFRAGMENTS linker.lf) -if(target STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) +if(target STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) set(ld_folder "ld/rev1") - elseif(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + elseif(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) set(ld_folder "ld/rev2") endif() else() @@ -99,7 +99,7 @@ if(BOOTLOADER_BUILD) elseif(target STREQUAL "esp32c3") rom_linker_script("newlib") - elseif(target STREQUAL "esp32h2") + elseif(target STREQUAL "esp32h4") rom_linker_script("newlib") elseif(target STREQUAL "esp32c2") @@ -196,7 +196,7 @@ else() # Regular app build rom_linker_script("eco3") endif() - elseif(target STREQUAL "esp32h2") + elseif(target STREQUAL "esp32h4") rom_linker_script("newlib") rom_linker_script("version") diff --git a/components/esp_rom/README.md b/components/esp_rom/README.md index bfef38f0e2..3cef0e4c82 100644 --- a/components/esp_rom/README.md +++ b/components/esp_rom/README.md @@ -17,8 +17,8 @@ When using ROM functions in esp-idf, the including convention is `/rom/< #include "esp32c3/rom/uart.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/uart.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/uart.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/uart.h" ... ``` diff --git a/components/esp_rom/esp32h2/Kconfig.soc_caps.in b/components/esp_rom/esp32h4/Kconfig.soc_caps.in similarity index 100% rename from components/esp_rom/esp32h2/Kconfig.soc_caps.in rename to components/esp_rom/esp32h4/Kconfig.soc_caps.in diff --git a/components/esp_rom/esp32h2/esp_rom_caps.h b/components/esp_rom/esp32h4/esp_rom_caps.h similarity index 100% rename from components/esp_rom/esp32h2/esp_rom_caps.h rename to components/esp_rom/esp32h4/esp_rom_caps.h diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld b/components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.api.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld rename to components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.api.ld diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.ld b/components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.ld rename to components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.ld diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.libgcc.ld b/components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.libgcc.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.libgcc.ld rename to components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.libgcc.ld diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.newlib-nano.ld b/components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.newlib-nano.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.newlib-nano.ld rename to components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.newlib-nano.ld diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.newlib.ld b/components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.newlib.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.newlib.ld rename to components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.newlib.ld diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.version.ld b/components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.version.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.version.ld rename to components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.version.ld diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.api.ld similarity index 100% rename from components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld rename to components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.api.ld diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.ld b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.ld similarity index 99% rename from components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.ld rename to components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.ld index 25b9de8df4..a6dbff60a7 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.ld +++ b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.ld @@ -3,10 +3,10 @@ * * SPDX-License-Identifier: Apache-2.0 */ -/* ROM function interface esp32h2.rom.ld for esp32h2 +/* ROM function interface esp32h4.rom.ld for esp32h4 * * - * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum da4c474a48c097d4ac9acad67f70fda6 + * Generated from ./target/esp32h4/interface-esp32h4.yml md5sum da4c474a48c097d4ac9acad67f70fda6 * * Compatible with ROM where ECO version equal or greater to 0. * diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.libgcc.ld b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.libgcc.ld similarity index 95% rename from components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.libgcc.ld rename to components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.libgcc.ld index f96bf11486..d7374c7510 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.libgcc.ld +++ b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.libgcc.ld @@ -3,10 +3,10 @@ * * SPDX-License-Identifier: Apache-2.0 */ -/* ROM function interface esp32h2.rom.libgcc.ld for esp32h2 +/* ROM function interface esp32h4.rom.libgcc.ld for esp32h4 * * - * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum da4c474a48c097d4ac9acad67f70fda6 + * Generated from ./target/esp32h4/interface-esp32h4.yml md5sum da4c474a48c097d4ac9acad67f70fda6 * * Compatible with ROM where ECO version equal or greater to 0. * diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.newlib-nano.ld b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.newlib-nano.ld similarity index 89% rename from components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.newlib-nano.ld rename to components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.newlib-nano.ld index f0d95e4294..ab7bbb3eab 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.newlib-nano.ld +++ b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.newlib-nano.ld @@ -3,10 +3,10 @@ * * SPDX-License-Identifier: Apache-2.0 */ -/* ROM function interface esp32h2.rom.newlib-nano.ld for esp32h2 +/* ROM function interface esp32h4.rom.newlib-nano.ld for esp32h4 * * - * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum da4c474a48c097d4ac9acad67f70fda6 + * Generated from ./target/esp32h4/interface-esp32h4.yml md5sum da4c474a48c097d4ac9acad67f70fda6 * * Compatible with ROM where ECO version equal or greater to 0. * diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.newlib.ld b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.newlib.ld similarity index 96% rename from components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.newlib.ld rename to components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.newlib.ld index 1733b9a5dc..141a85d09f 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.newlib.ld +++ b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.newlib.ld @@ -3,10 +3,10 @@ * * SPDX-License-Identifier: Apache-2.0 */ -/* ROM function interface esp32h2.rom.newlib.ld for esp32h2 +/* ROM function interface esp32h4.rom.newlib.ld for esp32h4 * * - * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum da4c474a48c097d4ac9acad67f70fda6 + * Generated from ./target/esp32h4/interface-esp32h4.yml md5sum da4c474a48c097d4ac9acad67f70fda6 * * Compatible with ROM where ECO version equal or greater to 0. * diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.version.ld b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.version.ld similarity index 89% rename from components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.version.ld rename to components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.version.ld index c7330d8d1d..fbe937c345 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.version.ld +++ b/components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.version.ld @@ -3,7 +3,7 @@ * * SPDX-License-Identifier: Apache-2.0 */ -/* ROM version variables for esp32h2 +/* ROM version variables for esp32h4 * * These addresses should be compatible with any ROM version for this chip. * diff --git a/components/esp_rom/include/esp32h2/rom/apb_backup_dma.h b/components/esp_rom/include/esp32h2/rom/apb_backup_dma.h deleted file mode 100644 index d4e709b742..0000000000 --- a/components/esp_rom/include/esp32h2/rom/apb_backup_dma.h +++ /dev/null @@ -1,25 +0,0 @@ -// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void)); - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_rom/include/esp32h2/rom/aes.h b/components/esp_rom/include/esp32h4/rom/aes.h similarity index 56% rename from components/esp_rom/include/esp32h2/rom/aes.h rename to components/esp_rom/include/esp32h4/rom/aes.h index d8002ef58c..a9ae04b2fa 100644 --- a/components/esp_rom/include/esp32h2/rom/aes.h +++ b/components/esp_rom/include/esp32h4/rom/aes.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_AES_H_ #define _ROM_AES_H_ diff --git a/components/esp_rom/include/esp32h4/rom/apb_backup_dma.h b/components/esp_rom/include/esp32h4/rom/apb_backup_dma.h new file mode 100644 index 0000000000..14948bbde1 --- /dev/null +++ b/components/esp_rom/include/esp32h4/rom/apb_backup_dma.h @@ -0,0 +1,17 @@ +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void)); + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_rom/include/esp32h2/rom/bigint.h b/components/esp_rom/include/esp32h4/rom/bigint.h similarity index 54% rename from components/esp_rom/include/esp32h2/rom/bigint.h rename to components/esp_rom/include/esp32h4/rom/bigint.h index b63172ea7f..a25f36a9fd 100644 --- a/components/esp_rom/include/esp32h2/rom/bigint.h +++ b/components/esp_rom/include/esp32h4/rom/bigint.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_BIGINT_H_ #define _ROM_BIGINT_H_ diff --git a/components/esp_rom/include/esp32h2/rom/cache.h b/components/esp_rom/include/esp32h4/rom/cache.h similarity index 97% rename from components/esp_rom/include/esp32h2/rom/cache.h rename to components/esp_rom/include/esp32h4/rom/cache.h index 587871a9a2..105a778e6d 100644 --- a/components/esp_rom/include/esp32h2/rom/cache.h +++ b/components/esp_rom/include/esp32h4/rom/cache.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_CACHE_H_ #define _ROM_CACHE_H_ @@ -194,7 +186,7 @@ void Cache_MMU_Init(void); * Please do not call this function in your SDK application. * * @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In - * esp32h2, external memory is always flash + * esp32h4, external memory is always flash * * @param uint32_t vaddr : virtual address in CPU address space. * Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address. @@ -222,7 +214,7 @@ int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32 * Please do not call this function in your SDK application. * * @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In - * esp32h2, external memory is always flash + * esp32h4, external memory is always flash * * @param uint32_t vaddr : virtual address in CPU address space. * Can be DRam0, DRam1, DRom0, DPort and AHB buses address. diff --git a/components/esp_rom/include/esp32h2/rom/crc.h b/components/esp_rom/include/esp32h4/rom/crc.h similarity index 81% rename from components/esp_rom/include/esp32h2/rom/crc.h rename to components/esp_rom/include/esp32h4/rom/crc.h index e683f4fd41..a651ce2db6 100644 --- a/components/esp_rom/include/esp32h2/rom/crc.h +++ b/components/esp_rom/include/esp32h4/rom/crc.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef ROM_CRC_H #define ROM_CRC_H diff --git a/components/esp_rom/include/esp32h2/rom/digital_signature.h b/components/esp_rom/include/esp32h4/rom/digital_signature.h similarity index 89% rename from components/esp_rom/include/esp32h2/rom/digital_signature.h rename to components/esp_rom/include/esp32h4/rom/digital_signature.h index 54c01681d4..3b8ad1a376 100644 --- a/components/esp_rom/include/esp32h2/rom/digital_signature.h +++ b/components/esp_rom/include/esp32h4/rom/digital_signature.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once diff --git a/components/esp_rom/include/esp32h2/rom/efuse.h b/components/esp_rom/include/esp32h4/rom/efuse.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/efuse.h rename to components/esp_rom/include/esp32h4/rom/efuse.h diff --git a/components/esp_rom/include/esp32h2/rom/esp_flash.h b/components/esp_rom/include/esp32h4/rom/esp_flash.h similarity index 64% rename from components/esp_rom/include/esp32h2/rom/esp_flash.h rename to components/esp_rom/include/esp32h4/rom/esp_flash.h index 40e5872c09..85b4ae8755 100644 --- a/components/esp_rom/include/esp32h2/rom/esp_flash.h +++ b/components/esp_rom/include/esp32h4/rom/esp_flash.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once diff --git a/components/esp_rom/include/esp32h2/rom/ets_sys.h b/components/esp_rom/include/esp32h4/rom/ets_sys.h similarity index 96% rename from components/esp_rom/include/esp32h2/rom/ets_sys.h rename to components/esp_rom/include/esp32h4/rom/ets_sys.h index b378024884..9a94c64259 100644 --- a/components/esp_rom/include/esp32h2/rom/ets_sys.h +++ b/components/esp_rom/include/esp32h4/rom/ets_sys.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_ETS_SYS_H_ #define _ROM_ETS_SYS_H_ diff --git a/components/esp_rom/include/esp32h2/rom/gpio.h b/components/esp_rom/include/esp32h4/rom/gpio.h similarity index 98% rename from components/esp_rom/include/esp32h2/rom/gpio.h rename to components/esp_rom/include/esp32h4/rom/gpio.h index be60742711..f7c8b07029 100644 --- a/components/esp_rom/include/esp32h2/rom/gpio.h +++ b/components/esp_rom/include/esp32h4/rom/gpio.h @@ -32,10 +32,10 @@ extern "C" { #define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) #define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4) -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 #define GPIO_FUNC_IN_HIGH 0x38 #define GPIO_FUNC_IN_LOW 0x3C -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 #define GPIO_FUNC_IN_HIGH 0x1E #define GPIO_FUNC_IN_LOW 0x1F #endif diff --git a/components/esp_rom/include/esp32h2/rom/hmac.h b/components/esp_rom/include/esp32h4/rom/hmac.h similarity index 71% rename from components/esp_rom/include/esp32h2/rom/hmac.h rename to components/esp_rom/include/esp32h4/rom/hmac.h index 223fe884a3..8f110328e9 100644 --- a/components/esp_rom/include/esp32h2/rom/hmac.h +++ b/components/esp_rom/include/esp32h4/rom/hmac.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_HMAC_H_ #define _ROM_HMAC_H_ diff --git a/components/esp_rom/include/esp32h2/rom/libc_stubs.h b/components/esp_rom/include/esp32h4/rom/libc_stubs.h similarity index 86% rename from components/esp_rom/include/esp32h2/rom/libc_stubs.h rename to components/esp_rom/include/esp32h4/rom/libc_stubs.h index df78851c1b..0836f39cd9 100644 --- a/components/esp_rom/include/esp32h2/rom/libc_stubs.h +++ b/components/esp_rom/include/esp32h4/rom/libc_stubs.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_LIBC_STUBS_H_ #define _ROM_LIBC_STUBS_H_ diff --git a/components/esp_rom/include/esp32h2/rom/lldesc.h b/components/esp_rom/include/esp32h4/rom/lldesc.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/lldesc.h rename to components/esp_rom/include/esp32h4/rom/lldesc.h diff --git a/components/esp_rom/include/esp32h2/rom/md5_hash.h b/components/esp_rom/include/esp32h4/rom/md5_hash.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/md5_hash.h rename to components/esp_rom/include/esp32h4/rom/md5_hash.h diff --git a/components/esp_rom/include/esp32h2/rom/miniz.h b/components/esp_rom/include/esp32h4/rom/miniz.h similarity index 99% rename from components/esp_rom/include/esp32h2/rom/miniz.h rename to components/esp_rom/include/esp32h4/rom/miniz.h index aaef48c14a..a9ff412e23 100644 --- a/components/esp_rom/include/esp32h2/rom/miniz.h +++ b/components/esp_rom/include/esp32h4/rom/miniz.h @@ -1,3 +1,9 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + #ifndef MINIZ_HEADER_INCLUDED #define MINIZ_HEADER_INCLUDED diff --git a/components/esp_rom/include/esp32h2/rom/rom_layout.h b/components/esp_rom/include/esp32h4/rom/rom_layout.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/rom_layout.h rename to components/esp_rom/include/esp32h4/rom/rom_layout.h diff --git a/components/esp_rom/include/esp32h2/rom/rsa_pss.h b/components/esp_rom/include/esp32h4/rom/rsa_pss.h similarity index 54% rename from components/esp_rom/include/esp32h2/rom/rsa_pss.h rename to components/esp_rom/include/esp32h4/rom/rsa_pss.h index 4a838071e7..2ee06a8ef0 100644 --- a/components/esp_rom/include/esp32h2/rom/rsa_pss.h +++ b/components/esp_rom/include/esp32h4/rom/rsa_pss.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_RSA_PSS_H_ #define _ROM_RSA_PSS_H_ diff --git a/components/esp_rom/include/esp32h2/rom/rtc.h b/components/esp_rom/include/esp32h4/rom/rtc.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/rtc.h rename to components/esp_rom/include/esp32h4/rom/rtc.h diff --git a/components/esp_rom/include/esp32h2/rom/secure_boot.h b/components/esp_rom/include/esp32h4/rom/secure_boot.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/secure_boot.h rename to components/esp_rom/include/esp32h4/rom/secure_boot.h diff --git a/components/esp_rom/include/esp32h2/rom/sha.h b/components/esp_rom/include/esp32h4/rom/sha.h similarity index 65% rename from components/esp_rom/include/esp32h2/rom/sha.h rename to components/esp_rom/include/esp32h4/rom/sha.h index 54b1b21676..80a8ac9335 100644 --- a/components/esp_rom/include/esp32h2/rom/sha.h +++ b/components/esp_rom/include/esp32h4/rom/sha.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_SHA_H_ #define _ROM_SHA_H_ diff --git a/components/esp_rom/include/esp32h2/rom/spi_flash.h b/components/esp_rom/include/esp32h4/rom/spi_flash.h similarity index 100% rename from components/esp_rom/include/esp32h2/rom/spi_flash.h rename to components/esp_rom/include/esp32h4/rom/spi_flash.h diff --git a/components/esp_rom/include/esp32h2/rom/tjpgd.h b/components/esp_rom/include/esp32h4/rom/tjpgd.h similarity index 96% rename from components/esp_rom/include/esp32h2/rom/tjpgd.h rename to components/esp_rom/include/esp32h4/rom/tjpgd.h index 80d346a1cb..46527e1f11 100644 --- a/components/esp_rom/include/esp32h2/rom/tjpgd.h +++ b/components/esp_rom/include/esp32h4/rom/tjpgd.h @@ -1,3 +1,9 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + /*----------------------------------------------------------------------------/ / TJpgDec - Tiny JPEG Decompressor include file (C)ChaN, 2012 /----------------------------------------------------------------------------*/ diff --git a/components/esp_rom/include/esp32h2/rom/uart.h b/components/esp_rom/include/esp32h4/rom/uart.h similarity index 94% rename from components/esp_rom/include/esp32h2/rom/uart.h rename to components/esp_rom/include/esp32h4/rom/uart.h index adbae64d00..d8af1310bd 100644 --- a/components/esp_rom/include/esp32h2/rom/uart.h +++ b/components/esp_rom/include/esp32h4/rom/uart.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_UART_H_ #define _ROM_UART_H_ diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 1fbb378ad2..fd898c3db3 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -90,7 +90,7 @@ menu "ESP System Settings" default y if IDF_TARGET_ESP32S2 default y if IDF_TARGET_ESP32C3 default y if IDF_TARGET_ESP32S3 - default y if IDF_TARGET_ESP32H2 + default y if IDF_TARGET_ESP32H4 default y if IDF_TARGET_ESP32C6 depends on !IDF_TARGET_ESP32C2 @@ -266,7 +266,7 @@ menu "ESP System Settings" config ESP_CONSOLE_MULTIPLE_UART bool - default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 + default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32H4 && !IDF_TARGET_ESP32C2 choice ESP_CONSOLE_UART_NUM prompt "UART peripheral to use for console output (0-1)" diff --git a/components/esp_system/crosscore_int.c b/components/esp_system/crosscore_int.c index 2fda084714..aaf592318d 100644 --- a/components/esp_system/crosscore_int.c +++ b/components/esp_system/crosscore_int.c @@ -29,7 +29,7 @@ #define REASON_FREQ_SWITCH BIT(1) #define REASON_GDB_CALL BIT(3) -#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 +#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H4 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 #define REASON_PRINT_BACKTRACE BIT(2) #define REASON_TWDT_ABORT BIT(4) #endif @@ -66,7 +66,7 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) { } else { WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0); } -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); #endif @@ -147,7 +147,7 @@ static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) } else { WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1); } -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); #endif } @@ -167,7 +167,7 @@ void IRAM_ATTR esp_crosscore_int_send_gdb_call(int core_id) esp_crosscore_int_send(core_id, REASON_GDB_CALL); } -#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 +#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H4 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id) { esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE); diff --git a/components/esp_system/fpga_overrides.c b/components/esp_system/fpga_overrides.c index b46ceaad98..7745808158 100644 --- a/components/esp_system/fpga_overrides.c +++ b/components/esp_system/fpga_overrides.c @@ -17,8 +17,8 @@ #include "esp32s3/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 @@ -46,7 +46,7 @@ void bootloader_clock_configure(void) uint32_t xtal_freq_mhz = 40; #ifdef CONFIG_IDF_TARGET_ESP32S2 uint32_t apb_freq_hz = 20000000; -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H4 uint32_t apb_freq_hz = 32000000; #else uint32_t apb_freq_hz = CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * 1000000; diff --git a/components/esp_system/include/esp_private/crosscore_int.h b/components/esp_system/include/esp_private/crosscore_int.h index 1325c2a055..f1bc59546b 100644 --- a/components/esp_system/include/esp_private/crosscore_int.h +++ b/components/esp_system/include/esp_private/crosscore_int.h @@ -50,7 +50,7 @@ void esp_crosscore_int_send_freq_switch(int core_id); void esp_crosscore_int_send_gdb_call(int core_id); -#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 +#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H4 && !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 /** * Send an interrupt to a CPU indicating it should print its current backtrace * @@ -75,7 +75,7 @@ void esp_crosscore_int_send_print_backtrace(int core_id); void esp_crosscore_int_send_twdt_abort(int core_id); #endif // CONFIG_ESP_TASK_WDT_EN -#endif // !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 +#endif // !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H4 && !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 #ifdef __cplusplus } diff --git a/components/esp_system/ld/esp32h2/memory.ld.in b/components/esp_system/ld/esp32h4/memory.ld.in similarity index 93% rename from components/esp_system/ld/esp32h2/memory.ld.in rename to components/esp_system/ld/esp32h4/memory.ld.in index 03f45cabd9..59507965d0 100644 --- a/components/esp_system/ld/esp32h2/memory.ld.in +++ b/components/esp_system/ld/esp32h4/memory.ld.in @@ -5,7 +5,7 @@ */ /** - * ESP32-H2 Linker Script Memory Layout + * ESP32-H4 Linker Script Memory Layout * This file describes the memory layout (memory blocks) by virtual memory addresses. * This linker script is passed through the C preprocessor to include configuration options. * Please use preprocessor features sparingly! @@ -34,12 +34,12 @@ #define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG -#if CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE -ASSERT((CONFIG_ESP32H2_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.") +#if CONFIG_ESP32H4_USE_FIXED_STATIC_RAM_SIZE +ASSERT((CONFIG_ESP32H4_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.") #define DRAM0_0_SEG_LEN CONFIG_ESP3C3_FIXED_STATIC_RAM_SIZE #else #define DRAM0_0_SEG_LEN I_D_SRAM_SIZE -#endif // CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE +#endif // CONFIG_ESP32H4_USE_FIXED_STATIC_RAM_SIZE MEMORY { /** @@ -83,12 +83,12 @@ MEMORY rtc_iram_seg(RWX) : org = 0x50000000, len = 0x2000 - ESP_BOOTLOADER_RESERVE_RTC } -#if CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE +#if CONFIG_ESP32H4_USE_FIXED_STATIC_RAM_SIZE /* static data ends at defined address */ _static_data_end = 0x3FCA0000 + DRAM0_0_SEG_LEN; #else _static_data_end = _bss_end; -#endif // CONFIG_ESP32H2_USE_FIXED_STATIC_RAM_SIZE +#endif // CONFIG_ESP32H4_USE_FIXED_STATIC_RAM_SIZE /* Heap ends at top of dram0_0_seg */ _heap_end = 0x40000000; diff --git a/components/esp_system/ld/esp32h2/sections.ld.in b/components/esp_system/ld/esp32h4/sections.ld.in similarity index 98% rename from components/esp_system/ld/esp32h2/sections.ld.in rename to components/esp_system/ld/esp32h4/sections.ld.in index 93239b0dec..47412fa31d 100644 --- a/components/esp_system/ld/esp32h2/sections.ld.in +++ b/components/esp_system/ld/esp32h4/sections.ld.in @@ -53,7 +53,7 @@ SECTIONS * named rtc_wake_stub*.c and the data marked with * RTC_DATA_ATTR, RTC_RODATA_ATTR attributes. * The memory location of the data is dependent on - * CONFIG_ESP32H2_RTCDATA_IN_FAST_MEM option. + * CONFIG_ESP32H4_RTCDATA_IN_FAST_MEM option. */ .rtc.data : { @@ -82,7 +82,7 @@ SECTIONS * and will be retained during deep sleep. * User data marked with RTC_NOINIT_ATTR will be placed * into this section. See the file "esp_attr.h" for more information. - * The memory location of the data is dependent on CONFIG_ESP32H2_RTCDATA_IN_FAST_MEM option. + * The memory location of the data is dependent on CONFIG_ESP32H4_RTCDATA_IN_FAST_MEM option. */ .rtc_noinit (NOLOAD): { @@ -365,7 +365,7 @@ SECTIONS /* iram_end_test section exists for use by memprot unit tests only */ *(.iram_end_test) - /* ESP32-H2 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */ + /* ESP32-H4 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */ . += _esp_memprot_prefetch_pad_size; . = ALIGN(_esp_memprot_align_size); diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index 606a4a452d..de1dc4291c 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -51,10 +51,10 @@ #include "esp32c6/rtc.h" #include "esp32c6/rom/cache.h" #include "esp_memprot.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rtc.h" -#include "esp32h2/rom/cache.h" -#include "esp32h2/rom/secure_boot.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rtc.h" +#include "esp32h4/rom/cache.h" +#include "esp32h4/rom/secure_boot.h" #include "esp_memprot.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rtc.h" @@ -349,7 +349,7 @@ void IRAM_ATTR call_start_cpu0(void) esp_restart(); } -#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 /* Configure the Cache MMU size for instruction and rodata in flash. */ extern uint32_t Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size); extern int _rodata_reserved_start; @@ -362,7 +362,7 @@ void IRAM_ATTR call_start_cpu0(void) #endif Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size); -#endif // CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#endif // CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 #if CONFIG_ESPTOOLPY_OCT_FLASH && !CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT bool efuse_opflash_en = efuse_ll_get_flash_type(); diff --git a/components/esp_system/port/soc/esp32h2/CMakeLists.txt b/components/esp_system/port/soc/esp32h4/CMakeLists.txt similarity index 100% rename from components/esp_system/port/soc/esp32h2/CMakeLists.txt rename to components/esp_system/port/soc/esp32h4/CMakeLists.txt diff --git a/components/esp_system/port/soc/esp32h2/Kconfig.cpu b/components/esp_system/port/soc/esp32h4/Kconfig.cpu similarity index 80% rename from components/esp_system/port/soc/esp32h2/Kconfig.cpu rename to components/esp_system/port/soc/esp32h4/Kconfig.cpu index de80a78b0d..565e50ff57 100644 --- a/components/esp_system/port/soc/esp32h2/Kconfig.cpu +++ b/components/esp_system/port/soc/esp32h4/Kconfig.cpu @@ -7,13 +7,13 @@ choice ESP_DEFAULT_CPU_FREQ_MHZ config ESP_DEFAULT_CPU_FREQ_MHZ_16 bool "16 MHz" - depends on IDF_ENV_FPGA #ESP32H2-TODO: IDF-3786 + depends on IDF_ENV_FPGA #ESP32H4-TODO: IDF-3786 config ESP_DEFAULT_CPU_FREQ_MHZ_32 bool "32 MHz" - depends on IDF_ENV_FPGA #ESP32H2-TODO: IDF-3786 + depends on IDF_ENV_FPGA #ESP32H4-TODO: IDF-3786 config ESP_DEFAULT_CPU_FREQ_MHZ_64 bool "64 MHz" - depends on IDF_ENV_FPGA #ESP32H2-TODO: IDF-3786 + depends on IDF_ENV_FPGA #ESP32H4-TODO: IDF-3786 config ESP_DEFAULT_CPU_FREQ_MHZ_96 bool "96 MHz" depends on !IDF_ENV_FPGA diff --git a/components/esp_system/port/soc/esp32h2/Kconfig.system b/components/esp_system/port/soc/esp32h4/Kconfig.system similarity index 96% rename from components/esp_system/port/soc/esp32h2/Kconfig.system rename to components/esp_system/port/soc/esp32h4/Kconfig.system index 9523dcd171..95ec81ea7e 100644 --- a/components/esp_system/port/soc/esp32h2/Kconfig.system +++ b/components/esp_system/port/soc/esp32h4/Kconfig.system @@ -4,7 +4,7 @@ menu "Brownout Detector" bool "Hardware brownout detect & reset" default y help - The ESP32-H2 has a built-in brownout detector which can detect if the voltage is lower than + The ESP32-H4 has a built-in brownout detector which can detect if the voltage is lower than a specific value. If this happens, it will reset the chip in order to prevent unintended behaviour. diff --git a/components/esp_system/port/soc/esp32h2/apb_backup_dma.c b/components/esp_system/port/soc/esp32h4/apb_backup_dma.c similarity index 53% rename from components/esp_system/port/soc/esp32h2/apb_backup_dma.c rename to components/esp_system/port/soc/esp32h4/apb_backup_dma.c index f41b32decf..5f14c456d7 100644 --- a/components/esp_system/port/soc/esp32h2/apb_backup_dma.c +++ b/components/esp_system/port/soc/esp32h4/apb_backup_dma.c @@ -1,17 +1,9 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "soc/soc_caps.h" @@ -19,7 +11,7 @@ #include "esp_attr.h" #include "freertos/FreeRTOS.h" #include "freertos/portmacro.h" -#include "esp32h2/rom/apb_backup_dma.h" +#include "esp32h4/rom/apb_backup_dma.h" static portMUX_TYPE s_apb_backup_dma_mutex = portMUX_INITIALIZER_UNLOCKED; diff --git a/components/esp_system/port/soc/esp32h2/cache_err_int.c b/components/esp_system/port/soc/esp32h4/cache_err_int.c similarity index 97% rename from components/esp_system/port/soc/esp32h2/cache_err_int.c rename to components/esp_system/port/soc/esp32h4/cache_err_int.c index d10c742014..7a63521eb9 100644 --- a/components/esp_system/port/soc/esp32h2/cache_err_int.c +++ b/components/esp_system/port/soc/esp32h4/cache_err_int.c @@ -44,7 +44,7 @@ void esp_cache_err_int_init(void) * 4. icache preload configurations fault * 5. icache sync configuration fault * - * [1]: On ESP32H2 boards, the caches are shared but buses are still + * [1]: On ESP32H4 boards, the caches are shared but buses are still * distinct. So, we have an ibus and a dbus sharing the same cache. * This error can occur if the dbus performs a request but the icache * (or simply cache) is disabled. diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h4/clk.c similarity index 99% rename from components/esp_system/port/soc/esp32h2/clk.c rename to components/esp_system/port/soc/esp32h4/clk.c index de5612b7c2..4ae0f6f560 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h4/clk.c @@ -13,9 +13,9 @@ #include "esp_log.h" #include "esp_cpu.h" #include "esp_clk_internal.h" -#include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/uart.h" -#include "esp32h2/rom/rtc.h" +#include "esp32h4/rom/ets_sys.h" +#include "esp32h4/rom/uart.h" +#include "esp32h4/rom/rtc.h" #include "soc/system_reg.h" #include "soc/soc.h" #include "soc/rtc.h" diff --git a/components/esp_system/port/soc/esp32h2/reset_reason.c b/components/esp_system/port/soc/esp32h4/reset_reason.c similarity index 83% rename from components/esp_system/port/soc/esp32h2/reset_reason.c rename to components/esp_system/port/soc/esp32h4/reset_reason.c index 4f5ed918d0..580c52bcb1 100644 --- a/components/esp_system/port/soc/esp32h2/reset_reason.c +++ b/components/esp_system/port/soc/esp32h4/reset_reason.c @@ -1,22 +1,14 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "esp_system.h" #include "esp_rom_sys.h" #include "esp_private/system_internal.h" #include "soc/rtc_periph.h" -#include "esp32h2/rom/rtc.h" +#include "esp32h4/rom/rtc.h" static void esp_reset_reason_clear_hint(void); diff --git a/components/esp_system/port/soc/esp32h2/system_internal.c b/components/esp_system/port/soc/esp32h4/system_internal.c similarity index 98% rename from components/esp_system/port/soc/esp32h2/system_internal.c rename to components/esp_system/port/soc/esp32h4/system_internal.c index a7dd7548f3..cd69a2ff2b 100644 --- a/components/esp_system/port/soc/esp32h2/system_internal.c +++ b/components/esp_system/port/soc/esp32h4/system_internal.c @@ -24,8 +24,8 @@ #include "hal/wdt_hal.h" #include "esp_private/cache_err_int.h" -#include "esp32h2/rom/cache.h" -#include "esp32h2/rom/rtc.h" +#include "esp32h4/rom/cache.h" +#include "esp32h4/rom/rtc.h" /* "inner" restart function for after RTOS, interrupts & anything else on this * core are already stopped. Stalls other core, resets hardware, diff --git a/components/esp_system/sdkconfig.rename.esp32h2 b/components/esp_system/sdkconfig.rename.esp32h2 deleted file mode 100644 index 7109e5be7b..0000000000 --- a/components/esp_system/sdkconfig.rename.esp32h2 +++ /dev/null @@ -1,11 +0,0 @@ -# sdkconfig replacement configurations for deprecated options formatted as -# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION - -CONFIG_ESP32H2_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE -CONFIG_ESP32H2_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK - -CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ -CONFIG_ESP32H2_DEFAULT_CPU_FREQ_16 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_16 -CONFIG_ESP32H2_DEFAULT_CPU_FREQ_32 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_32 -CONFIG_ESP32H2_DEFAULT_CPU_FREQ_64 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_64 -CONFIG_ESP32H2_DEFAULT_CPU_FREQ_96 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_96 diff --git a/components/esp_system/system_time.c b/components/esp_system/system_time.c index f6b9839089..1229730995 100644 --- a/components/esp_system/system_time.c +++ b/components/esp_system/system_time.c @@ -21,8 +21,8 @@ #include "esp32s3/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_system/test/test_reset_reason.c b/components/esp_system/test/test_reset_reason.c index 984d790059..b5dd7c0524 100644 --- a/components/esp_system/test/test_reset_reason.c +++ b/components/esp_system/test/test_reset_reason.c @@ -38,7 +38,7 @@ #define BROWNOUT "BROWN_OUT_RST" #define STORE_ERROR "StoreProhibited" -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 #define DEEPSLEEP "DSLEEP" #define LOAD_STORE_ERROR "Store access fault" #define RESET "RTC_SW_CPU_RST" diff --git a/components/esp_timer/src/esp_timer.c b/components/esp_timer/src/esp_timer.c index 8d4d17db66..b2227975a1 100644 --- a/components/esp_timer/src/esp_timer.c +++ b/components/esp_timer/src/esp_timer.c @@ -30,8 +30,8 @@ #include "esp32s3/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_timer/src/ets_timer_legacy.c b/components/esp_timer/src/ets_timer_legacy.c index d03aa7cbcd..941289cb43 100644 --- a/components/esp_timer/src/ets_timer_legacy.c +++ b/components/esp_timer/src/ets_timer_legacy.c @@ -32,8 +32,8 @@ #include "esp32c3/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/ets_sys.h" #endif diff --git a/components/esp_timer/src/system_time.c b/components/esp_timer/src/system_time.c index ddc5949a0e..029d89b723 100644 --- a/components/esp_timer/src/system_time.c +++ b/components/esp_timer/src/system_time.c @@ -25,8 +25,8 @@ #include "esp32s3/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_timer/test_apps/main/test_ets_timer.c b/components/esp_timer/test_apps/main/test_ets_timer.c index b47d84d799..7585b4f2ef 100644 --- a/components/esp_timer/test_apps/main/test_ets_timer.c +++ b/components/esp_timer/test_apps/main/test_ets_timer.c @@ -23,8 +23,8 @@ #include "esp32s3/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/esp_wifi/Kconfig b/components/esp_wifi/Kconfig index ff4ab64d58..f93301f024 100644 --- a/components/esp_wifi/Kconfig +++ b/components/esp_wifi/Kconfig @@ -1,6 +1,6 @@ menu "Wi-Fi" - visible if !IDF_TARGET_ESP32H2 + visible if !IDF_TARGET_ESP32H4 config ESP32_WIFI_ENABLED bool diff --git a/components/esptool_py/Kconfig.projbuild b/components/esptool_py/Kconfig.projbuild index 7fee8e2bc9..49a8656679 100644 --- a/components/esptool_py/Kconfig.projbuild +++ b/components/esptool_py/Kconfig.projbuild @@ -90,7 +90,7 @@ menu "Serial flasher config" default ESPTOOLPY_FLASHFREQ_40M if IDF_TARGET_ESP32 default ESPTOOLPY_FLASHFREQ_80M if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3 default ESPTOOLPY_FLASHFREQ_60M if IDF_TARGET_ESP32C2 - default ESPTOOLPY_FLASHFREQ_48M if IDF_TARGET_ESP32H2 + default ESPTOOLPY_FLASHFREQ_48M if IDF_TARGET_ESP32H4 config ESPTOOLPY_FLASHFREQ_120M bool "120 MHz" select SPI_FLASH_HPM_ENABLE diff --git a/components/esptool_py/project_include.cmake b/components/esptool_py/project_include.cmake index bb698db863..a6506aa9e4 100644 --- a/components/esptool_py/project_include.cmake +++ b/components/esptool_py/project_include.cmake @@ -6,11 +6,11 @@ idf_build_get_property(python PYTHON) idf_build_get_property(idf_path IDF_PATH) set(chip_model ${target}) -# TODO: remove this if block when esp32h2 beta1 is no longer supported -if(target STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) +# TODO: remove this if block when esp32h4 beta1 is no longer supported and we have h4 target in esptool +if(target STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) set(chip_model esp32h2beta1) - elseif(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + elseif(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) set(chip_model esp32h2beta2) endif() endif() diff --git a/components/freertos/Kconfig b/components/freertos/Kconfig index 0f3f2d7fa6..3cf3644456 100644 --- a/components/freertos/Kconfig +++ b/components/freertos/Kconfig @@ -356,7 +356,7 @@ menu "FreeRTOS" config FREERTOS_TICK_SUPPORT_SYSTIMER bool default y if !FREERTOS_TICK_SUPPORT_CORETIMER - # ESP32-S3, ESP32-C3 and ESP32-H2 can use Systimer for FreeRTOS SysTick + # ESP32-S3, ESP32-C3 and ESP32-H4 can use Systimer for FreeRTOS SysTick # ESP32S2 also has SYSTIMER but it can not be used for the FreeRTOS SysTick because: # - It has only one counter, which already in use esp_timer. # A counter for SysTick should be stall in debug mode but work esp_timer. diff --git a/components/hal/CMakeLists.txt b/components/hal/CMakeLists.txt index 927ebb03d9..87bd8d0a5b 100644 --- a/components/hal/CMakeLists.txt +++ b/components/hal/CMakeLists.txt @@ -15,10 +15,10 @@ if(NOT ${target} STREQUAL "esp32") list(APPEND srcs "cache_hal.c") endif() -if(${target} STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) +if(${target} STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) list(APPEND includes "${target}/include/rev1") - elseif(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + elseif(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) list(APPEND includes "${target}/include/rev2") endif() endif() @@ -155,15 +155,15 @@ if(NOT BOOTLOADER_BUILD) "esp32c3/rtc_cntl_hal.c") endif() - if(${target} STREQUAL "esp32h2") + if(${target} STREQUAL "esp32h4") list(APPEND srcs "ds_hal.c" "spi_flash_hal_gpspi.c" "spi_slave_hd_hal.c" "aes_hal.c" - "esp32h2/brownout_hal.c" - "esp32h2/hmac_hal.c" - "esp32h2/rtc_cntl_hal.c") + "esp32h4/brownout_hal.c" + "esp32h4/hmac_hal.c" + "esp32h4/rtc_cntl_hal.c") endif() if(${target} STREQUAL "esp32c2") diff --git a/components/hal/cache_hal.c b/components/hal/cache_hal.c index f0fb9cd5ee..04a5a006af 100644 --- a/components/hal/cache_hal.c +++ b/components/hal/cache_hal.c @@ -22,8 +22,8 @@ #include "esp32c3/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/cache.h" #endif diff --git a/components/hal/esp32h2/include/hal/mpu_ll.h b/components/hal/esp32h2/include/hal/mpu_ll.h deleted file mode 100644 index e38408b49e..0000000000 --- a/components/hal/esp32h2/include/hal/mpu_ll.h +++ /dev/null @@ -1,53 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include - -#include "soc/soc_caps.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* This LL is currently unused for ESP32-H2 - IDF-2375 */ - -static inline uint32_t mpu_ll_id_to_addr(unsigned id) -{ - abort(); -} - -static inline void mpu_ll_set_region_rw(uint32_t addr) -{ - abort(); -} - -static inline void mpu_ll_set_region_rwx(uint32_t addr) -{ - abort(); -} - -static inline void mpu_ll_set_region_x(uint32_t addr) -{ - abort(); -} - - -static inline void mpu_ll_set_region_illegal(uint32_t addr) -{ - abort(); -} - -#ifdef __cplusplus -} -#endif diff --git a/components/hal/esp32h2/brownout_hal.c b/components/hal/esp32h4/brownout_hal.c similarity index 100% rename from components/hal/esp32h2/brownout_hal.c rename to components/hal/esp32h4/brownout_hal.c diff --git a/components/hal/esp32h2/efuse_hal.c b/components/hal/esp32h4/efuse_hal.c similarity index 100% rename from components/hal/esp32h2/efuse_hal.c rename to components/hal/esp32h4/efuse_hal.c diff --git a/components/hal/esp32h2/hmac_hal.c b/components/hal/esp32h4/hmac_hal.c similarity index 69% rename from components/hal/esp32h2/hmac_hal.c rename to components/hal/esp32h4/hmac_hal.c index 795c3e4247..59dcc1f945 100644 --- a/components/hal/esp32h2/hmac_hal.c +++ b/components/hal/esp32h4/hmac_hal.c @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "stdio.h" #include "hal/hmac_hal.h" diff --git a/components/hal/esp32h2/include/hal/adc_hal_conf.h b/components/hal/esp32h4/include/hal/adc_hal_conf.h similarity index 100% rename from components/hal/esp32h2/include/hal/adc_hal_conf.h rename to components/hal/esp32h4/include/hal/adc_hal_conf.h diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h4/include/hal/adc_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/adc_ll.h rename to components/hal/esp32h4/include/hal/adc_ll.h index bdc13d9f13..6db694fc37 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h4/include/hal/adc_ll.h @@ -57,7 +57,7 @@ typedef enum { * @brief ADC digital controller (DMA mode) work mode. * * @note The conversion mode affects the sampling frequency: - * ESP32H2 only support ALTER_UNIT mode + * ESP32H4 only support ALTER_UNIT mode * ALTER_UNIT : When the measurement is triggered, ADC1 or ADC2 samples alternately. */ typedef enum { @@ -159,13 +159,13 @@ static inline void adc_ll_digi_convert_limit_enable(bool enable) /** * Set adc conversion mode for digital controller. * - * @note ESP32H2 only support ADC1 single mode. + * @note ESP32H4 only support ADC1 single mode. * * @param mode Conversion mode select. */ static inline void adc_ll_digi_set_convert_mode(adc_ll_digi_convert_mode_t mode) { - //ESP32H2 only supports ADC_CONV_ALTER_UNIT mode + //ESP32H4 only supports ADC_CONV_ALTER_UNIT mode } /** @@ -524,7 +524,7 @@ static inline void adc_ll_set_power_manage(adc_ll_power_t manage) __attribute__((always_inline)) static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t ctrl) { - //Not used on ESP32H2 + //Not used on ESP32H4 } /** diff --git a/components/hal/esp32h2/include/hal/aes_ll.h b/components/hal/esp32h4/include/hal/aes_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/aes_ll.h rename to components/hal/esp32h4/include/hal/aes_ll.h diff --git a/components/hal/esp32h2/include/hal/cache_ll.h b/components/hal/esp32h4/include/hal/cache_ll.h similarity index 91% rename from components/hal/esp32h2/include/hal/cache_ll.h rename to components/hal/esp32h4/include/hal/cache_ll.h index 39c930e0a1..058fb9c895 100644 --- a/components/hal/esp32h2/include/hal/cache_ll.h +++ b/components/hal/esp32h4/include/hal/cache_ll.h @@ -76,7 +76,7 @@ __attribute__((always_inline)) static inline void cache_ll_l1_enable_bus(uint32_t cache_id, cache_bus_mask_t mask) { HAL_ASSERT(cache_id == 0); - //On esp32h2, only `CACHE_BUS_IBUS0` and `CACHE_BUS_DBUS0` are supported. Use `cache_ll_l1_get_bus()` to get your bus first + //On esp32h4, only `CACHE_BUS_IBUS0` and `CACHE_BUS_DBUS0` are supported. Use `cache_ll_l1_get_bus()` to get your bus first HAL_ASSERT((mask & (CACHE_BUS_IBUS1 | CACHE_BUS_IBUS2| CACHE_BUS_DBUS1 | CACHE_BUS_DBUS2)) == 0); uint32_t ibus_mask = 0; @@ -98,7 +98,7 @@ __attribute__((always_inline)) static inline void cache_ll_l1_disable_bus(uint32_t cache_id, cache_bus_mask_t mask) { HAL_ASSERT(cache_id == 0); - //On esp32h2, only `CACHE_BUS_IBUS0` and `CACHE_BUS_DBUS0` are supported. Use `cache_ll_l1_get_bus()` to get your bus first + //On esp32h4, only `CACHE_BUS_IBUS0` and `CACHE_BUS_DBUS0` are supported. Use `cache_ll_l1_get_bus()` to get your bus first HAL_ASSERT((mask & (CACHE_BUS_IBUS1 | CACHE_BUS_IBUS2| CACHE_BUS_DBUS1 | CACHE_BUS_DBUS2)) == 0); uint32_t ibus_mask = 0; @@ -117,7 +117,7 @@ static inline void cache_ll_l1_disable_bus(uint32_t cache_id, cache_bus_mask_t m /** * @brief Enable Cache access error interrupt * - * @param cache_id Cache ID, not used on H2. For compabitlity + * @param cache_id Cache ID, not used on H4. For compabitlity * @param mask Interrupt mask */ static inline void cache_ll_l1_enable_access_error_intr(uint32_t cache_id, uint32_t mask) @@ -128,7 +128,7 @@ static inline void cache_ll_l1_enable_access_error_intr(uint32_t cache_id, uint3 /** * @brief Clear Cache access error interrupt status * - * @param cache_id Cache ID, not used on H2. For compabitlity + * @param cache_id Cache ID, not used on H4. For compabitlity * @param mask Interrupt mask */ static inline void cache_ll_l1_clear_access_error_intr(uint32_t cache_id, uint32_t mask) @@ -139,7 +139,7 @@ static inline void cache_ll_l1_clear_access_error_intr(uint32_t cache_id, uint32 /** * @brief Get Cache access error interrupt status * - * @param cache_id Cache ID, not used on H2. For compabitlity + * @param cache_id Cache ID, not used on H4. For compabitlity * @param mask Interrupt mask * * @return Status mask @@ -152,7 +152,7 @@ static inline uint32_t cache_ll_l1_get_access_error_intr_status(uint32_t cache_i /** * @brief Enable Cache illegal error interrupt * - * @param cache_id Cache ID, not used on H2. For compabitlity + * @param cache_id Cache ID, not used on H4. For compabitlity * @param mask Interrupt mask */ static inline void cache_ll_l1_enable_illegal_error_intr(uint32_t cache_id, uint32_t mask) @@ -163,7 +163,7 @@ static inline void cache_ll_l1_enable_illegal_error_intr(uint32_t cache_id, uint /** * @brief Clear Cache illegal error interrupt status * - * @param cache_id Cache ID, not used on H2. For compabitlity + * @param cache_id Cache ID, not used on H4. For compabitlity * @param mask Interrupt mask */ static inline void cache_ll_l1_clear_illegal_error_intr(uint32_t cache_id, uint32_t mask) @@ -174,7 +174,7 @@ static inline void cache_ll_l1_clear_illegal_error_intr(uint32_t cache_id, uint3 /** * @brief Get Cache illegal error interrupt status * - * @param cache_id Cache ID, not used on H2. For compabitlity + * @param cache_id Cache ID, not used on H4. For compabitlity * @param mask Interrupt mask * * @return Status mask diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h4/include/hal/clk_gate_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/clk_gate_ll.h rename to components/hal/esp32h4/include/hal/clk_gate_ll.h diff --git a/components/hal/esp32h2/include/hal/clk_tree_ll.h b/components/hal/esp32h4/include/hal/clk_tree_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/clk_tree_ll.h rename to components/hal/esp32h4/include/hal/clk_tree_ll.h index 1ce828145e..1d74126456 100644 --- a/components/hal/esp32h2/include/hal/clk_tree_ll.h +++ b/components/hal/esp32h4/include/hal/clk_tree_ll.h @@ -16,7 +16,7 @@ #include "soc/regi2c_bbpll.h" #include "hal/assert.h" #include "hal/log.h" -#include "esp32h2/rom/rtc.h" +#include "esp32h4/rom/rtc.h" #ifdef __cplusplus extern "C" { @@ -241,7 +241,7 @@ static inline __attribute__((always_inline)) uint32_t clk_ll_bbpll_get_freq_mhz( static inline __attribute__((always_inline)) void clk_ll_bbpll_set_freq_mhz(uint32_t pll_freq_mhz) { (void)pll_freq_mhz; - // ESP32H2 bbpll frequency cannot be changed, fixed to 96MHz + // ESP32H4 bbpll frequency cannot be changed, fixed to 96MHz // Do nothing } @@ -520,7 +520,7 @@ static inline void clk_ll_xtal_store_freq_mhz(uint32_t xtal_freq_mhz) */ static inline __attribute__((always_inline)) uint32_t clk_ll_xtal_load_freq_mhz(void) { - // ESP32H2 has a fixed crystal frequency (32MHz), but we will still read from the RTC storage register + // ESP32H4 has a fixed crystal frequency (32MHz), but we will still read from the RTC storage register uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); if ((xtal_freq_reg & UINT16_MAX) != RTC_XTAL_FREQ_32M) { return 0; diff --git a/components/hal/esp32h2/include/hal/dedic_gpio_cpu_ll.h b/components/hal/esp32h4/include/hal/dedic_gpio_cpu_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/dedic_gpio_cpu_ll.h rename to components/hal/esp32h4/include/hal/dedic_gpio_cpu_ll.h diff --git a/components/hal/esp32h2/include/hal/ds_ll.h b/components/hal/esp32h4/include/hal/ds_ll.h similarity index 88% rename from components/hal/esp32h2/include/hal/ds_ll.h rename to components/hal/esp32h4/include/hal/ds_ll.h index fd98de367f..9f3e201808 100644 --- a/components/hal/esp32h2/include/hal/ds_ll.h +++ b/components/hal/esp32h4/include/hal/ds_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /******************************************************************************* * NOTICE diff --git a/components/hal/esp32h2/include/hal/ecc_ll.h b/components/hal/esp32h4/include/hal/ecc_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/ecc_ll.h rename to components/hal/esp32h4/include/hal/ecc_ll.h diff --git a/components/hal/esp32h2/include/hal/efuse_hal.h b/components/hal/esp32h4/include/hal/efuse_hal.h similarity index 100% rename from components/hal/esp32h2/include/hal/efuse_hal.h rename to components/hal/esp32h4/include/hal/efuse_hal.h diff --git a/components/hal/esp32h2/include/hal/efuse_ll.h b/components/hal/esp32h4/include/hal/efuse_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/efuse_ll.h rename to components/hal/esp32h4/include/hal/efuse_ll.h index 2870c28787..15dcaaa6ac 100644 --- a/components/hal/esp32h2/include/hal/efuse_ll.h +++ b/components/hal/esp32h4/include/hal/efuse_ll.h @@ -10,7 +10,7 @@ #include #include "soc/efuse_periph.h" #include "hal/assert.h" -#include "esp32h2/rom/efuse.h" +#include "esp32h4/rom/efuse.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32h2/include/hal/gdma_ll.h b/components/hal/esp32h4/include/hal/gdma_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/gdma_ll.h rename to components/hal/esp32h4/include/hal/gdma_ll.h diff --git a/components/hal/esp32h2/include/hal/gpspi_flash_ll.h b/components/hal/esp32h4/include/hal/gpspi_flash_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/gpspi_flash_ll.h rename to components/hal/esp32h4/include/hal/gpspi_flash_ll.h index d6178eb6ce..217b699a89 100644 --- a/components/hal/esp32h2/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32h4/include/hal/gpspi_flash_ll.h @@ -28,7 +28,7 @@ extern "C" { #endif -//NOTE: These macros are changed on h2 for build. MODIFY these when bringup flash. +//NOTE: These macros are changed on h4 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32h2/include/hal/hmac_hal.h b/components/hal/esp32h4/include/hal/hmac_hal.h similarity index 82% rename from components/hal/esp32h2/include/hal/hmac_hal.h rename to components/hal/esp32h4/include/hal/hmac_hal.h index 7a03814544..b507caf3a0 100644 --- a/components/hal/esp32h2/include/hal/hmac_hal.h +++ b/components/hal/esp32h4/include/hal/hmac_hal.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /******************************************************************************* * NOTICE @@ -51,7 +43,7 @@ void hmac_hal_start(void); * @note Writing out-of-range values is undefined behavior. The user has to ensure that the parameters are in range. * * @param config The target of the HMAC. Possible targets are described in \c hmac_hal_output_t. - * See the ESP32H2 TRM for more details. + * See the ESP32H4 TRM for more details. * @param key_id The ID of the hardware key slot to be used. * * @return 0 if the configuration was successful, non-zero if not. @@ -65,7 +57,7 @@ uint32_t hmac_hal_configure(hmac_hal_output_t config, uint32_t key_id); * * The message must not be longer than one block (512 bits) and the padding has to be applied by software before * writing. The padding has to be able to fit into the block after the message. - * For more information on HMAC padding, see the ESP32H2 TRM. + * For more information on HMAC padding, see the ESP32H4 TRM. */ void hmac_hal_write_one_block_512(const void *block); @@ -80,7 +72,7 @@ void hmac_hal_write_one_block_512(const void *block); * Before writing the last block which contains the padding, a call to \c hmac_hal_next_block_padding() is necessary * to indicate to the hardware that a block with padding will be written. * - * For more information on HMAC padding, see the ESP32h2 TRM. + * For more information on HMAC padding, see the ESP32H4 TRM. */ void hmac_hal_write_block_512(const void *block); diff --git a/components/hal/esp32h2/include/hal/hmac_ll.h b/components/hal/esp32h4/include/hal/hmac_ll.h similarity index 87% rename from components/hal/esp32h2/include/hal/hmac_ll.h rename to components/hal/esp32h4/include/hal/hmac_ll.h index 0ddaf1db97..7cbdf63275 100644 --- a/components/hal/esp32h2/include/hal/hmac_ll.h +++ b/components/hal/esp32h4/include/hal/hmac_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /******************************************************************************* * NOTICE @@ -159,7 +151,7 @@ static inline void hmac_ll_msg_padding(void) * @brief Signals that all blocks have been written and a padding block will automatically be applied by hardware. * * Only applies if the message length is a multiple of 512 bits. - * See ESP32H2 TRM HMAC chapter for more details. + * See ESP32H4 TRM HMAC chapter for more details. */ static inline void hmac_ll_msg_end(void) { diff --git a/components/hal/esp32h2/include/hal/i2c_ll.h b/components/hal/esp32h4/include/hal/i2c_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/i2c_ll.h rename to components/hal/esp32h4/include/hal/i2c_ll.h diff --git a/components/hal/esp32h2/include/hal/i2s_ll.h b/components/hal/esp32h4/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/i2s_ll.h rename to components/hal/esp32h4/include/hal/i2s_ll.h index 5a508057b4..a15fe826b3 100644 --- a/components/hal/esp32h2/include/hal/i2s_ll.h +++ b/components/hal/esp32h4/include/hal/i2s_ll.h @@ -10,7 +10,7 @@ * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The LL layer for ESP32-H2 I2S register operations +// The LL layer for ESP32-H4 I2S register operations #pragma once #include @@ -1057,7 +1057,7 @@ static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool ena) */ static inline void i2s_ll_set_pdm2pcm_conv_en(i2s_dev_t *hw, bool val) { - abort(); // TODO ESP32-H2 IDF-2098 + abort(); // TODO ESP32-H4 IDF-2098 } diff --git a/components/hal/esp32h2/include/hal/ledc_ll.h b/components/hal/esp32h4/include/hal/ledc_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/ledc_ll.h rename to components/hal/esp32h4/include/hal/ledc_ll.h diff --git a/components/hal/esp32h2/include/hal/memprot_ll.h b/components/hal/esp32h4/include/hal/memprot_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/memprot_ll.h rename to components/hal/esp32h4/include/hal/memprot_ll.h index dac408d14c..244d6f2213 100644 --- a/components/hal/esp32h2/include/hal/memprot_ll.h +++ b/components/hal/esp32h4/include/hal/memprot_ll.h @@ -22,7 +22,7 @@ extern "C" { #define IRAM_SRAM_START 0x4037C000 #define DRAM_SRAM_START 0x3FC7C000 -/* ICache size is fixed to 16KB on ESP32-H2 */ +/* ICache size is fixed to 16KB on ESP32-H4 */ #ifndef ICACHE_SIZE #define ICACHE_SIZE 0x4000 #endif diff --git a/components/hal/esp32h2/include/hal/mmu_ll.h b/components/hal/esp32h4/include/hal/mmu_ll.h similarity index 97% rename from components/hal/esp32h2/include/hal/mmu_ll.h rename to components/hal/esp32h4/include/hal/mmu_ll.h index 05a9ace74d..799863b3ed 100644 --- a/components/hal/esp32h2/include/hal/mmu_ll.h +++ b/components/hal/esp32h4/include/hal/mmu_ll.h @@ -29,7 +29,7 @@ __attribute__((always_inline)) static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id) { (void)mmu_id; - //On esp32h2, MMU page size is always 64KB + //On esp32h4, MMU page size is always 64KB return MMU_PAGE_64KB; } @@ -38,7 +38,7 @@ static inline mmu_page_size_t mmu_ll_get_page_size(uint32_t mmu_id) * * @param size MMU page size * - * @note On esp32h2, only supports `MMU_PAGE_64KB` + * @note On esp32h4, only supports `MMU_PAGE_64KB` */ __attribute__((always_inline)) static inline void mmu_ll_set_page_size(uint32_t mmu_id, uint32_t size) diff --git a/components/hal/esp32h4/include/hal/mpu_ll.h b/components/hal/esp32h4/include/hal/mpu_ll.h new file mode 100644 index 0000000000..c1131ef593 --- /dev/null +++ b/components/hal/esp32h4/include/hal/mpu_ll.h @@ -0,0 +1,45 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include "soc/soc_caps.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* This LL is currently unused for ESP32-H4 - IDF-2375 */ + +static inline uint32_t mpu_ll_id_to_addr(unsigned id) +{ + abort(); +} + +static inline void mpu_ll_set_region_rw(uint32_t addr) +{ + abort(); +} + +static inline void mpu_ll_set_region_rwx(uint32_t addr) +{ + abort(); +} + +static inline void mpu_ll_set_region_x(uint32_t addr) +{ + abort(); +} + + +static inline void mpu_ll_set_region_illegal(uint32_t addr) +{ + abort(); +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32h2/include/hal/mwdt_ll.h b/components/hal/esp32h4/include/hal/mwdt_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/mwdt_ll.h rename to components/hal/esp32h4/include/hal/mwdt_ll.h diff --git a/components/hal/esp32h2/include/hal/regi2c_ctrl_ll.h b/components/hal/esp32h4/include/hal/regi2c_ctrl_ll.h similarity index 94% rename from components/hal/esp32h2/include/hal/regi2c_ctrl_ll.h rename to components/hal/esp32h4/include/hal/regi2c_ctrl_ll.h index c389577144..77e88bf781 100644 --- a/components/hal/esp32h2/include/hal/regi2c_ctrl_ll.h +++ b/components/hal/esp32h4/include/hal/regi2c_ctrl_ll.h @@ -19,7 +19,7 @@ extern "C" { */ static inline void regi2c_ctrl_ll_i2c_reset(void) { - // On ESP32-H2, don't need to do anything (indeed do need? not fully supported yet?) + // On ESP32-H4, don't need to do anything (indeed do need? not fully supported yet?) // SET_PERI_REG_BITS(ANA_CONFIG_REG, ANA_CONFIG_M, ANA_CONFIG_M, ANA_CONFIG_S); } @@ -29,7 +29,7 @@ static inline void regi2c_ctrl_ll_i2c_reset(void) */ static inline void regi2c_ctrl_ll_i2c_bbpll_enable(void) { - // On ESP32-H2, don't need to do anything (indeed do need? not fully supported yet?) + // On ESP32-H4, don't need to do anything (indeed do need? not fully supported yet?) // CLEAR_PERI_REG_MASK(ANA_CONFIG_REG, ANA_I2C_BBPLL_M); } @@ -46,7 +46,7 @@ static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibrati /** * @brief Stop BBPLL self-calibration * - * This helps to prevent BBPLL jitter (phenomenon is significant on ESP32H2) + * This helps to prevent BBPLL jitter (phenomenon is significant on ESP32H4) */ static inline __attribute__((always_inline)) void regi2c_ctrl_ll_bbpll_calibration_stop(void) { diff --git a/components/hal/esp32h2/include/hal/rmt_ll.h b/components/hal/esp32h4/include/hal/rmt_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/rmt_ll.h rename to components/hal/esp32h4/include/hal/rmt_ll.h diff --git a/components/hal/esp32h2/include/hal/rtc_cntl_ll.h b/components/hal/esp32h4/include/hal/rtc_cntl_ll.h similarity index 96% rename from components/hal/esp32h2/include/hal/rtc_cntl_ll.h rename to components/hal/esp32h4/include/hal/rtc_cntl_ll.h index 750bc13333..75346c1891 100644 --- a/components/hal/esp32h2/include/hal/rtc_cntl_ll.h +++ b/components/hal/esp32h4/include/hal/rtc_cntl_ll.h @@ -41,12 +41,12 @@ static inline void rtc_cntl_ll_gpio_clear_wakeup_pins(void) static inline void rtc_cntl_ll_enable_cpu_retention(uint32_t addr) { - // ESP32H2-TODO: IDF-3383 + // ESP32H4-TODO: IDF-3383 } static inline void rtc_cntl_ll_disable_cpu_retention(void) { - // ESP32H2-TODO: IDF-3383 + // ESP32H4-TODO: IDF-3383 } static inline void rtc_cntl_ll_reset_system(void) diff --git a/components/hal/esp32h2/include/hal/rwdt_ll.h b/components/hal/esp32h4/include/hal/rwdt_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/rwdt_ll.h rename to components/hal/esp32h4/include/hal/rwdt_ll.h diff --git a/components/hal/esp32h2/include/hal/sar_ctrl_ll.h b/components/hal/esp32h4/include/hal/sar_ctrl_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/sar_ctrl_ll.h rename to components/hal/esp32h4/include/hal/sar_ctrl_ll.h diff --git a/components/hal/esp32h2/include/hal/sdm_ll.h b/components/hal/esp32h4/include/hal/sdm_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/sdm_ll.h rename to components/hal/esp32h4/include/hal/sdm_ll.h diff --git a/components/hal/esp32h2/include/hal/sha_ll.h b/components/hal/esp32h4/include/hal/sha_ll.h similarity index 85% rename from components/hal/esp32h2/include/hal/sha_ll.h rename to components/hal/esp32h4/include/hal/sha_ll.h index a7bc493252..5bb746732a 100644 --- a/components/hal/esp32h2/include/hal/sha_ll.h +++ b/components/hal/esp32h4/include/hal/sha_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include diff --git a/components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h b/components/hal/esp32h4/include/hal/spi_flash_encrypted_ll.h similarity index 85% rename from components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h rename to components/hal/esp32h4/include/hal/spi_flash_encrypted_ll.h index 58cb186458..f66584369c 100644 --- a/components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h +++ b/components/hal/esp32h4/include/hal/spi_flash_encrypted_ll.h @@ -1,16 +1,8 @@ -// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /******************************************************************************* * NOTICE diff --git a/components/hal/esp32h2/include/hal/spi_flash_ll.h b/components/hal/esp32h4/include/hal/spi_flash_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/spi_flash_ll.h rename to components/hal/esp32h4/include/hal/spi_flash_ll.h diff --git a/components/hal/esp32h2/include/hal/spi_ll.h b/components/hal/esp32h4/include/hal/spi_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/spi_ll.h rename to components/hal/esp32h4/include/hal/spi_ll.h index 2881407dd9..22e5eb5562 100644 --- a/components/hal/esp32h2/include/hal/spi_ll.h +++ b/components/hal/esp32h4/include/hal/spi_ll.h @@ -74,7 +74,7 @@ typedef enum { } spi_ll_trans_len_cond_t; FLAG_ATTR(spi_ll_trans_len_cond_t) -// SPI base command in esp32h2 +// SPI base command in esp32h4 typedef enum { /* Slave HD Only */ SPI_LL_BASE_CMD_HD_WRBUF = 0x01, @@ -226,7 +226,7 @@ static inline void spi_ll_slave_reset(spi_dev_t *hw) /** * Reset SPI CPU TX FIFO * - * On ESP32H2, this function is not seperated + * On ESP32H4, this function is not seperated * * @param hw Beginning address of the peripheral registers. */ @@ -239,7 +239,7 @@ static inline void spi_ll_cpu_tx_fifo_reset(spi_dev_t *hw) /** * Reset SPI CPU RX FIFO * - * On ESP32H2, this function is not seperated + * On ESP32H4, this function is not seperated * * @param hw Beginning address of the peripheral registers. */ @@ -1090,7 +1090,7 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw) #undef SPI_LL_UNUSED_INT_MASK /** - * Get the base spi command in esp32h2 + * Get the base spi command in esp32h4 * * @param cmd_t Command value */ diff --git a/components/hal/esp32h2/include/hal/spimem_flash_ll.h b/components/hal/esp32h4/include/hal/spimem_flash_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/spimem_flash_ll.h rename to components/hal/esp32h4/include/hal/spimem_flash_ll.h index 484d2344cc..a1b425db09 100644 --- a/components/hal/esp32h2/include/hal/spimem_flash_ll.h +++ b/components/hal/esp32h4/include/hal/spimem_flash_ll.h @@ -112,7 +112,7 @@ static inline void spimem_flash_ll_resume(spi_mem_dev_t *dev) } /** - * Initialize auto suspend mode, and esp32h2 doesn't support disable auto-suspend. + * Initialize auto suspend mode, and esp32h4 doesn't support disable auto-suspend. * * @param dev Beginning address of the peripheral registers. * @param auto_sus Enable/disable Flash Auto-Suspend. diff --git a/components/hal/esp32h2/include/hal/systimer_ll.h b/components/hal/esp32h4/include/hal/systimer_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/systimer_ll.h rename to components/hal/esp32h4/include/hal/systimer_ll.h diff --git a/components/hal/esp32h2/include/hal/temperature_sensor_ll.h b/components/hal/esp32h4/include/hal/temperature_sensor_ll.h similarity index 97% rename from components/hal/esp32h2/include/hal/temperature_sensor_ll.h rename to components/hal/esp32h4/include/hal/temperature_sensor_ll.h index 003db3c114..974c37b808 100644 --- a/components/hal/esp32h2/include/hal/temperature_sensor_ll.h +++ b/components/hal/esp32h4/include/hal/temperature_sensor_ll.h @@ -47,11 +47,11 @@ static inline void temperature_sensor_ll_enable(bool enable) */ static inline void temperature_sensor_ll_clk_enable(bool enable) { - // No need to enable the temperature clock on esp32h2 + // No need to enable the temperature clock on esp32h4 } /** - * @brief Select the clock source for temperature sensor. On ESP32-H2, temperature sensor + * @brief Select the clock source for temperature sensor. On ESP32-H4, temperature sensor * can use XTAL or FOSC. To make it convenience, suggest using XTAL all the time. * * @param clk_src refer to ``temperature_sensor_clk_src_t`` diff --git a/components/hal/esp32h2/include/hal/timer_ll.h b/components/hal/esp32h4/include/hal/timer_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/timer_ll.h rename to components/hal/esp32h4/include/hal/timer_ll.h diff --git a/components/hal/esp32h2/include/hal/twai_ll.h b/components/hal/esp32h4/include/hal/twai_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/twai_ll.h rename to components/hal/esp32h4/include/hal/twai_ll.h index 29486f9662..5123c816aa 100644 --- a/components/hal/esp32h2/include/hal/twai_ll.h +++ b/components/hal/esp32h4/include/hal/twai_ll.h @@ -404,7 +404,7 @@ static inline bool twai_ll_check_brp_validation(uint32_t brp) * @param triple_sampling Triple Sampling enable/disable * * @note Must be called in reset mode - * @note ESP32H2 brp can be any even number between 2 to 32768 + * @note ESP32H4 brp can be any even number between 2 to 32768 */ __attribute__((always_inline)) static inline void twai_ll_set_bus_timing(twai_dev_t *hw, uint32_t brp, uint32_t sjw, uint32_t tseg1, uint32_t tseg2, bool triple_sampling) diff --git a/components/hal/esp32h2/include/hal/uart_ll.h b/components/hal/esp32h4/include/hal/uart_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/uart_ll.h rename to components/hal/esp32h4/include/hal/uart_ll.h diff --git a/components/hal/esp32h2/include/hal/uhci_ll.h b/components/hal/esp32h4/include/hal/uhci_ll.h similarity index 85% rename from components/hal/esp32h2/include/hal/uhci_ll.h rename to components/hal/esp32h4/include/hal/uhci_ll.h index a766797ea0..8a31a42647 100644 --- a/components/hal/esp32h2/include/hal/uhci_ll.h +++ b/components/hal/esp32h4/include/hal/uhci_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ // The LL layer for UHCI register operations. // Note that most of the register operations in this layer are non-atomic operations. diff --git a/components/hal/esp32h2/include/hal/uhci_types.h b/components/hal/esp32h4/include/hal/uhci_types.h similarity index 64% rename from components/hal/esp32h2/include/hal/uhci_types.h rename to components/hal/esp32h4/include/hal/uhci_types.h index 9cfff67fbb..767ff66d27 100644 --- a/components/hal/esp32h2/include/hal/uhci_types.h +++ b/components/hal/esp32h4/include/hal/uhci_types.h @@ -1,21 +1,13 @@ -// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ // Though the UHCI driver hasn't been published, some types are defined here -// for users to develop over the HAL. See example: controller_hci_uart_esp32h2 +// for users to develop over the HAL. See example: controller_hci_uart_esp32h4 #pragma once diff --git a/components/hal/esp32h2/include/hal/usb_phy_ll.h b/components/hal/esp32h4/include/hal/usb_phy_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/usb_phy_ll.h rename to components/hal/esp32h4/include/hal/usb_phy_ll.h diff --git a/components/hal/esp32h2/include/hal/usb_serial_jtag_ll.h b/components/hal/esp32h4/include/hal/usb_serial_jtag_ll.h similarity index 87% rename from components/hal/esp32h2/include/hal/usb_serial_jtag_ll.h rename to components/hal/esp32h4/include/hal/usb_serial_jtag_ll.h index 0241436ec4..81b7b3c736 100644 --- a/components/hal/esp32h2/include/hal/usb_serial_jtag_ll.h +++ b/components/hal/esp32h4/include/hal/usb_serial_jtag_ll.h @@ -1,16 +1,8 @@ -// Copyright 2021 Espressif Systems (Shanghai) -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ // The LL layer of the USB-serial-jtag controller diff --git a/components/hal/esp32h2/include/rev1/hal/gpio_ll.h b/components/hal/esp32h4/include/rev1/hal/gpio_ll.h similarity index 99% rename from components/hal/esp32h2/include/rev1/hal/gpio_ll.h rename to components/hal/esp32h4/include/rev1/hal/gpio_ll.h index 207d9f6d15..e8d2d90eb7 100644 --- a/components/hal/esp32h2/include/rev1/hal/gpio_ll.h +++ b/components/hal/esp32h4/include/rev1/hal/gpio_ll.h @@ -10,7 +10,7 @@ * See readme.md in hal/include/hal/readme.md ******************************************************************************/ -// The LL layer for ESP32-H2 GPIO register operations +// The LL layer for ESP32-H4 GPIO register operations #pragma once diff --git a/components/hal/esp32h2/include/rev2/hal/gpio_ll.h b/components/hal/esp32h4/include/rev2/hal/gpio_ll.h similarity index 99% rename from components/hal/esp32h2/include/rev2/hal/gpio_ll.h rename to components/hal/esp32h4/include/rev2/hal/gpio_ll.h index 687c894eba..4364c0c2b7 100644 --- a/components/hal/esp32h2/include/rev2/hal/gpio_ll.h +++ b/components/hal/esp32h4/include/rev2/hal/gpio_ll.h @@ -10,7 +10,7 @@ * See readme.md in hal/include/hal/readme.md ******************************************************************************/ -// The LL layer for ESP32-H2 GPIO register operations +// The LL layer for ESP32-H4 GPIO register operations #pragma once @@ -117,7 +117,7 @@ static inline void gpio_ll_get_intr_status(gpio_dev_t *hw, uint32_t core_id, uin __attribute__((always_inline)) static inline void gpio_ll_get_intr_status_high(gpio_dev_t *hw, uint32_t core_id, uint32_t *status) { - *status = 0; // Less than 32 GPIOs in ESP32-H2Beta2 + *status = 0; // Less than 32 GPIOs in ESP32-H4Beta2 } /** @@ -141,7 +141,7 @@ static inline void gpio_ll_clear_intr_status(gpio_dev_t *hw, uint32_t mask) __attribute__((always_inline)) static inline void gpio_ll_clear_intr_status_high(gpio_dev_t *hw, uint32_t mask) { - // Less than 32 GPIOs in ESP32-H2Beta2. Do nothing. + // Less than 32 GPIOs in ESP32-H4Beta2. Do nothing. } /** diff --git a/components/hal/esp32h2/rtc_cntl_hal.c b/components/hal/esp32h4/rtc_cntl_hal.c similarity index 100% rename from components/hal/esp32h2/rtc_cntl_hal.c rename to components/hal/esp32h4/rtc_cntl_hal.c diff --git a/components/hal/include/hal/adc_types.h b/components/hal/include/hal/adc_types.h index 785ea76c97..9f06cb236f 100644 --- a/components/hal/include/hal/adc_types.h +++ b/components/hal/include/hal/adc_types.h @@ -116,7 +116,7 @@ typedef struct { }; } adc_digi_output_data_t; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 /** * @brief ADC digital controller (DMA mode) output data format. * Used to analyze the acquired ADC (DMA) data. diff --git a/components/hal/include/hal/adc_types_private.h b/components/hal/include/hal/adc_types_private.h index a347b20ac4..be5b83af58 100644 --- a/components/hal/include/hal/adc_types_private.h +++ b/components/hal/include/hal/adc_types_private.h @@ -70,7 +70,7 @@ typedef enum { * Expression: filter_data = (k-1)/k * last_data + new_data / k. */ typedef enum { -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 ADC_DIGI_FILTER_DIS = -1, /*!< Disable filter */ #endif ADC_DIGI_FILTER_IIR_2 = 0, /*! threshold, Generates monitor interrupt. */ @@ -142,7 +142,7 @@ typedef struct { adc_channel_t channel; /*! $ libphy.a libbtbb.a) else() - if(IDF_TARGET STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) + if(IDF_TARGET STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) + # TODO: rename esp32h2 to esp32h4 [IDF-6097] target_link_libraries(${COMPONENT_LIB} INTERFACE - "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev1") + "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/rev1") endif() - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) + # TODO: rename esp32h2 to esp32h4 [IDF-6097] target_link_libraries(${COMPONENT_LIB} INTERFACE - "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev2") + "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/rev2") endif() else() target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}") diff --git a/components/ieee802154/Kconfig b/components/ieee802154/Kconfig index 7fa431f4b3..7112d2aa98 100644 --- a/components/ieee802154/Kconfig +++ b/components/ieee802154/Kconfig @@ -1,8 +1,8 @@ menu "IEEE 802.15.4" - visible if IDF_TARGET_ESP32H2 + visible if IDF_TARGET_ESP32H4 config IEEE802154_ENABLED bool - default "y" if IDF_TARGET_ESP32H2 + default "y" if IDF_TARGET_ESP32H4 endmenu # IEEE 802.15.4 diff --git a/components/ieee802154/test_apps/test_ieee802154/README.md b/components/ieee802154/test_apps/test_ieee802154/README.md index 5fc553bde4..de34fd44fd 100644 --- a/components/ieee802154/test_apps/test_ieee802154/README.md +++ b/components/ieee802154/test_apps/test_ieee802154/README.md @@ -1,3 +1,3 @@ -| Supported Targets | ESP32-H2 | +| Supported Targets | ESP32-H4 | | ----------------- | -------- | diff --git a/components/ieee802154/test_apps/test_ieee802154/pytest_test_ieee802154.py b/components/ieee802154/test_apps/test_ieee802154/pytest_test_ieee802154.py index 5953fb18b7..7a93c434dc 100644 --- a/components/ieee802154/test_apps/test_ieee802154/pytest_test_ieee802154.py +++ b/components/ieee802154/test_apps/test_ieee802154/pytest_test_ieee802154.py @@ -7,11 +7,11 @@ import pytest from pytest_embedded_idf.dut import IdfDut -@pytest.mark.esp32h2 +@pytest.mark.esp32h4 @pytest.mark.ieee802154 @pytest.mark.parametrize( 'count, config, beta_target', [ - (2, 'release', 'esp32h2beta2'), + (2, 'release', 'esp32h2beta2'), # No need to rename beta_target as it is still called h2 in esptool ], indirect=True ) def test_based_txrx(dut: Tuple[IdfDut, IdfDut]) -> None: diff --git a/components/ieee802154/test_apps/test_ieee802154/sdkconfig.defaults b/components/ieee802154/test_apps/test_ieee802154/sdkconfig.defaults index 44d488b4de..eec7cfd0a2 100644 --- a/components/ieee802154/test_apps/test_ieee802154/sdkconfig.defaults +++ b/components/ieee802154/test_apps/test_ieee802154/sdkconfig.defaults @@ -1,5 +1,4 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" -CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2=y +CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2=y diff --git a/components/mbedtls/port/esp32h2/bignum.c b/components/mbedtls/port/esp32h4/bignum.c similarity index 99% rename from components/mbedtls/port/esp32h2/bignum.c rename to components/mbedtls/port/esp32h4/bignum.c index 98401da855..4a674ee8b0 100644 --- a/components/mbedtls/port/esp32h2/bignum.c +++ b/components/mbedtls/port/esp32h4/bignum.c @@ -1,6 +1,6 @@ /* * Multi-precision integer library - * ESP32 H2 hardware accelerated parts based on mbedTLS implementation + * ESP32 H4 hardware accelerated parts based on mbedTLS implementation * * SPDX-FileCopyrightText: The Mbed TLS Contributors * diff --git a/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c b/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c index 86e15b6950..d0ae6a57e9 100644 --- a/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c +++ b/components/mbedtls/port/esp_ds/esp_rsa_sign_alt.c @@ -12,8 +12,8 @@ #include "esp32s2/rom/digital_signature.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/digital_signature.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/digital_signature.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/digital_signature.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/digital_signature.h" #else diff --git a/components/mbedtls/port/sha/dma/sha.c b/components/mbedtls/port/sha/dma/sha.c index cfb09603d1..6ee8477f92 100644 --- a/components/mbedtls/port/sha/dma/sha.c +++ b/components/mbedtls/port/sha/dma/sha.c @@ -54,8 +54,8 @@ #include "esp32s3/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32s3/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" #endif diff --git a/components/newlib/newlib_init.c b/components/newlib/newlib_init.c index c59c6d3572..04ae29a01e 100644 --- a/components/newlib/newlib_init.c +++ b/components/newlib/newlib_init.c @@ -29,8 +29,8 @@ #include "esp32s3/rom/libc_stubs.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/libc_stubs.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/libc_stubs.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/libc_stubs.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/libc_stubs.h" #elif CONFIG_IDF_TARGET_ESP32C6 @@ -111,7 +111,7 @@ static struct syscall_stub_table s_stub_table = { ._printf_float = NULL, ._scanf_float = NULL, #endif -#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 \ +#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 \ || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 /* TODO IDF-2570 : mark that this assert failed in ROM, to avoid confusion between IDF & ROM assertion failures (as function names & source file names will be similar) @@ -135,7 +135,7 @@ void esp_newlib_init(void) syscall_table_ptr_pro = syscall_table_ptr_app = &s_stub_table; #elif CONFIG_IDF_TARGET_ESP32S2 syscall_table_ptr_pro = &s_stub_table; -#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 \ +#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 \ || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 syscall_table_ptr = &s_stub_table; #endif diff --git a/components/newlib/port/esp_time_impl.c b/components/newlib/port/esp_time_impl.c index ec8f8c0b41..6e986685e9 100644 --- a/components/newlib/port/esp_time_impl.c +++ b/components/newlib/port/esp_time_impl.c @@ -33,9 +33,9 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/rtc.h" #include "esp32c3/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/rtc.h" -#include "esp32h2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/rtc.h" +#include "esp32h4/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" #include "esp32c2/rtc.h" diff --git a/components/newlib/sdkconfig.rename.esp32h2 b/components/newlib/sdkconfig.rename.esp32h2 deleted file mode 100644 index f906110d8e..0000000000 --- a/components/newlib/sdkconfig.rename.esp32h2 +++ /dev/null @@ -1,7 +0,0 @@ -# sdkconfig replacement configurations for deprecated options formatted as -# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION - -CONFIG_ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT -CONFIG_ESP32H2_TIME_SYSCALL_USE_RTC CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC -CONFIG_ESP32H2_TIME_SYSCALL_USE_SYSTIMER CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT -CONFIG_ESP32H2_TIME_SYSCALL_USE_NONE CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE diff --git a/components/newlib/test/test_newlib.c b/components/newlib/test/test_newlib.c index 3bf451dec6..4651e41a42 100644 --- a/components/newlib/test/test_newlib.c +++ b/components/newlib/test/test_newlib.c @@ -137,7 +137,7 @@ TEST_CASE("check if ROM or Flash is used for functions", "[newlib]") TEST_ASSERT_FALSE(fn_in_rom(vfprintf)); #endif // CONFIG_NEWLIB_NANO_FORMAT -#if CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2) +#if CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4) TEST_ASSERT(fn_in_rom(sscanf)); #else TEST_ASSERT_FALSE(fn_in_rom(sscanf)); @@ -146,7 +146,7 @@ TEST_CASE("check if ROM or Flash is used for functions", "[newlib]") #if defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_SPIRAM) TEST_ASSERT(fn_in_rom(atoi)); TEST_ASSERT(fn_in_rom(strtol)); -#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32H2)\ +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32H4)\ || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6) /* S3 and C3 always use these from ROM */ TEST_ASSERT(fn_in_rom(atoi)); diff --git a/components/newlib/test/test_time.c b/components/newlib/test/test_time.c index e43944523d..8454b53546 100644 --- a/components/newlib/test/test_time.c +++ b/components/newlib/test/test_time.c @@ -36,8 +36,8 @@ #include "esp32s3/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/openthread/CMakeLists.txt b/components/openthread/CMakeLists.txt index 0b91fd9b3b..7579be9872 100644 --- a/components/openthread/CMakeLists.txt +++ b/components/openthread/CMakeLists.txt @@ -192,15 +192,17 @@ if(CONFIG_OPENTHREAD_ENABLED) endif() else() - if(IDF_TARGET STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) + if(IDF_TARGET STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) + # TODO: rename esp32h2 to esp32h4 [IDF-6097] add_prebuilt_library(openthread_port - "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev1/libopenthread_port.a" + "${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/rev1/libopenthread_port.a" REQUIRES openthread) endif() - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) + # TODO: rename esp32h2 to esp32h4 [IDF-6097] add_prebuilt_library(openthread_port - "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev2/libopenthread_port.a" + "${CMAKE_CURRENT_SOURCE_DIR}/lib/esp32h2/rev2/libopenthread_port.a" REQUIRES openthread) endif() else() diff --git a/components/openthread/Kconfig b/components/openthread/Kconfig index b5e86b104a..811df85792 100644 --- a/components/openthread/Kconfig +++ b/components/openthread/Kconfig @@ -47,7 +47,7 @@ menu "OpenThread" choice OPENTHREAD_RADIO_TYPE prompt "Config the Thread radio type" depends on OPENTHREAD_ENABLED - default OPENTHREAD_RADIO_NATIVE if IDF_TARGET_ESP32H2 + default OPENTHREAD_RADIO_NATIVE if IDF_TARGET_ESP32H4 default OPENTHREAD_RADIO_SPINEL_UART help Configure how OpenThread connects to the 15.4 radio diff --git a/components/soc/esp32h2/i2c_periph.c b/components/soc/esp32h2/i2c_periph.c deleted file mode 100644 index 67dfbc56e0..0000000000 --- a/components/soc/esp32h2/i2c_periph.c +++ /dev/null @@ -1,30 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "soc/i2c_periph.h" -#include "soc/gpio_sig_map.h" - -/* - Bunch of constants for every I2C peripheral: GPIO signals, irqs, hw addr of registers etc -*/ -const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = { - { - .sda_out_sig = I2CEXT0_SDA_OUT_IDX, - .sda_in_sig = I2CEXT0_SDA_IN_IDX, - .scl_out_sig = I2CEXT0_SCL_OUT_IDX, - .scl_in_sig = I2CEXT0_SCL_IN_IDX, - .irq = ETS_I2C_EXT0_INTR_SOURCE, - .module = PERIPH_I2C0_MODULE, - }, -}; diff --git a/components/soc/esp32h2/include/soc/interrupt_reg.h b/components/soc/esp32h2/include/soc/interrupt_reg.h deleted file mode 100644 index c97c4e5a4b..0000000000 --- a/components/soc/esp32h2/include/soc/interrupt_reg.h +++ /dev/null @@ -1 +0,0 @@ -#include "soc/interrupt_core0_reg.h" diff --git a/components/soc/esp32h2/include/soc/soc_pins.h b/components/soc/esp32h2/include/soc/soc_pins.h deleted file mode 100644 index fccf303153..0000000000 --- a/components/soc/esp32h2/include/soc/soc_pins.h +++ /dev/null @@ -1,24 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -/* - * Pin definition header file. The long term plan is to have a single soc_pins.h for all - * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each - * peripheral and include them here to avoid developing conflicts in those header files. - */ - -#pragma once - -#include "soc/gpio_pins.h" -#include "soc/spi_pins.h" diff --git a/components/soc/esp32h2/include/soc/spi_pins.h b/components/soc/esp32h2/include/soc/spi_pins.h deleted file mode 100644 index 665dfabde3..0000000000 --- a/components/soc/esp32h2/include/soc/spi_pins.h +++ /dev/null @@ -1,34 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef _SOC_SPI_PINS_H_ -#define _SOC_SPI_PINS_H_ - -#define SPI_FUNC_NUM 0 -#define SPI_IOMUX_PIN_NUM_HD 12 -#define SPI_IOMUX_PIN_NUM_CS 14 -#define SPI_IOMUX_PIN_NUM_MOSI 16 -#define SPI_IOMUX_PIN_NUM_CLK 15 -#define SPI_IOMUX_PIN_NUM_MISO 17 -#define SPI_IOMUX_PIN_NUM_WP 13 - -#define SPI2_FUNC_NUM 2 -#define SPI2_IOMUX_PIN_NUM_MISO 2 -#define SPI2_IOMUX_PIN_NUM_HD 4 -#define SPI2_IOMUX_PIN_NUM_WP 5 -#define SPI2_IOMUX_PIN_NUM_CLK 6 -#define SPI2_IOMUX_PIN_NUM_MOSI 7 -#define SPI2_IOMUX_PIN_NUM_CS 10 - -#endif diff --git a/components/soc/esp32h2/include/soc/wdev_reg.h b/components/soc/esp32h2/include/soc/wdev_reg.h deleted file mode 100644 index 6992254b26..0000000000 --- a/components/soc/esp32h2/include/soc/wdev_reg.h +++ /dev/null @@ -1,20 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include "soc.h" - -/* Hardware random number generator register */ -#define WDEV_RND_REG 0x600260b0 diff --git a/components/soc/esp32h2/ledc_periph.c b/components/soc/esp32h2/ledc_periph.c deleted file mode 100644 index 13f87e5c86..0000000000 --- a/components/soc/esp32h2/ledc_periph.c +++ /dev/null @@ -1,25 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "soc/ledc_periph.h" -#include "soc/gpio_sig_map.h" - -/* - Bunch of constants for every LEDC peripheral: GPIO signals -*/ -const ledc_signal_conn_t ledc_periph_signal[1] = { - { - .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, - } -}; diff --git a/components/soc/esp32h2/CMakeLists.txt b/components/soc/esp32h4/CMakeLists.txt similarity index 82% rename from components/soc/esp32h2/CMakeLists.txt rename to components/soc/esp32h4/CMakeLists.txt index 898ed176fc..482141bb80 100644 --- a/components/soc/esp32h2/CMakeLists.txt +++ b/components/soc/esp32h4/CMakeLists.txt @@ -20,10 +20,10 @@ target_sources(${COMPONENT_LIB} PRIVATE "${srcs}") set(inc_path "." "include") -if(target STREQUAL "esp32h2") - if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1) +if(target STREQUAL "esp32h4") + if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) list(APPEND inc_path "include/rev1") - elseif(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2) + elseif(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) list(APPEND inc_path "include/rev2") endif() endif() diff --git a/components/soc/esp32h2/adc_periph.c b/components/soc/esp32h4/adc_periph.c similarity index 100% rename from components/soc/esp32h2/adc_periph.c rename to components/soc/esp32h4/adc_periph.c diff --git a/components/soc/esp32h2/dedic_gpio_periph.c b/components/soc/esp32h4/dedic_gpio_periph.c similarity index 100% rename from components/soc/esp32h2/dedic_gpio_periph.c rename to components/soc/esp32h4/dedic_gpio_periph.c diff --git a/components/soc/esp32h2/gdma_periph.c b/components/soc/esp32h4/gdma_periph.c similarity index 100% rename from components/soc/esp32h2/gdma_periph.c rename to components/soc/esp32h4/gdma_periph.c diff --git a/components/soc/esp32h2/gpio_periph.c b/components/soc/esp32h4/gpio_periph.c similarity index 96% rename from components/soc/esp32h2/gpio_periph.c rename to components/soc/esp32h4/gpio_periph.c index f1807dd6e7..d9bff84970 100644 --- a/components/soc/esp32h2/gpio_periph.c +++ b/components/soc/esp32h4/gpio_periph.c @@ -33,7 +33,7 @@ const uint32_t GPIO_PIN_MUX_REG[] = { IO_MUX_GPIO23_REG, IO_MUX_GPIO24_REG, IO_MUX_GPIO25_REG, -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 IO_MUX_GPIO26_REG, IO_MUX_GPIO27_REG, IO_MUX_GPIO28_REG, @@ -55,7 +55,7 @@ const uint32_t GPIO_PIN_MUX_REG[] = { _Static_assert(sizeof(GPIO_PIN_MUX_REG) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_PIN_MUX_REG"); const uint32_t GPIO_HOLD_MASK[] = { -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 BIT(0), //GPIO0 BIT(1), //GPIO1 BIT(2), //GPIO2 @@ -97,7 +97,7 @@ const uint32_t GPIO_HOLD_MASK[] = { BIT(6), //GPIO38 BIT(7), //GPIO39 BIT(8), //GPIO40 -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 BIT(0), //GPIO0 BIT(1), //GPIO1 BIT(2), //GPIO2 diff --git a/components/soc/esp32h2/i2c_bias.h b/components/soc/esp32h4/i2c_bias.h similarity index 100% rename from components/soc/esp32h2/i2c_bias.h rename to components/soc/esp32h4/i2c_bias.h diff --git a/components/soc/esp32h4/i2c_periph.c b/components/soc/esp32h4/i2c_periph.c new file mode 100644 index 0000000000..cb8e7fa246 --- /dev/null +++ b/components/soc/esp32h4/i2c_periph.c @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "soc/i2c_periph.h" +#include "soc/gpio_sig_map.h" + +/* + Bunch of constants for every I2C peripheral: GPIO signals, irqs, hw addr of registers etc +*/ +const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = { + { + .sda_out_sig = I2CEXT0_SDA_OUT_IDX, + .sda_in_sig = I2CEXT0_SDA_IN_IDX, + .scl_out_sig = I2CEXT0_SCL_OUT_IDX, + .scl_in_sig = I2CEXT0_SCL_IN_IDX, + .irq = ETS_I2C_EXT0_INTR_SOURCE, + .module = PERIPH_I2C0_MODULE, + }, +}; diff --git a/components/soc/esp32h2/i2c_pmu.h b/components/soc/esp32h4/i2c_pmu.h similarity index 100% rename from components/soc/esp32h2/i2c_pmu.h rename to components/soc/esp32h4/i2c_pmu.h diff --git a/components/soc/esp32h2/i2c_ulp.h b/components/soc/esp32h4/i2c_ulp.h similarity index 100% rename from components/soc/esp32h2/i2c_ulp.h rename to components/soc/esp32h4/i2c_ulp.h diff --git a/components/soc/esp32h2/i2s_periph.c b/components/soc/esp32h4/i2s_periph.c similarity index 100% rename from components/soc/esp32h2/i2s_periph.c rename to components/soc/esp32h4/i2s_periph.c diff --git a/components/soc/esp32h2/include/rev1/soc/assist_debug_reg.h b/components/soc/esp32h4/include/rev1/soc/assist_debug_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/assist_debug_reg.h rename to components/soc/esp32h4/include/rev1/soc/assist_debug_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/clkrst_reg.h b/components/soc/esp32h4/include/rev1/soc/clkrst_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/clkrst_reg.h rename to components/soc/esp32h4/include/rev1/soc/clkrst_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/efuse_reg.h b/components/soc/esp32h4/include/rev1/soc/efuse_reg.h similarity index 99% rename from components/soc/esp32h2/include/rev1/soc/efuse_reg.h rename to components/soc/esp32h4/include/rev1/soc/efuse_reg.h index 93f9924a38..48ee3ac856 100644 --- a/components/soc/esp32h2/include/rev1/soc/efuse_reg.h +++ b/components/soc/esp32h4/include/rev1/soc/efuse_reg.h @@ -722,7 +722,7 @@ extern "C" { #define EFUSE_SYS_DATA_PART0_0_V 0xFF #define EFUSE_SYS_DATA_PART0_0_S 25 /* EFUSE_PKG_VERSION : RO ;bitpos:[23:21] ;default: 3'h0 ; */ -/*description: Package version 0:ESP32-H2 */ +/*description: Package version 0:ESP32-H4 */ #define EFUSE_PKG_VERSION 0x00000007 #define EFUSE_PKG_VERSION_M ((EFUSE_PKG_VERSION_V)<<(EFUSE_PKG_VERSION_S)) #define EFUSE_PKG_VERSION_V 0x7 diff --git a/components/soc/esp32h2/include/rev1/soc/efuse_struct.h b/components/soc/esp32h4/include/rev1/soc/efuse_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/efuse_struct.h rename to components/soc/esp32h4/include/rev1/soc/efuse_struct.h diff --git a/components/soc/esp32h2/include/rev1/soc/gpio_reg.h b/components/soc/esp32h4/include/rev1/soc/gpio_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/gpio_reg.h rename to components/soc/esp32h4/include/rev1/soc/gpio_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/gpio_sd_reg.h b/components/soc/esp32h4/include/rev1/soc/gpio_sd_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/gpio_sd_reg.h rename to components/soc/esp32h4/include/rev1/soc/gpio_sd_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/gpio_sig_map.h b/components/soc/esp32h4/include/rev1/soc/gpio_sig_map.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/gpio_sig_map.h rename to components/soc/esp32h4/include/rev1/soc/gpio_sig_map.h diff --git a/components/soc/esp32h2/include/rev1/soc/gpio_struct.h b/components/soc/esp32h4/include/rev1/soc/gpio_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/gpio_struct.h rename to components/soc/esp32h4/include/rev1/soc/gpio_struct.h diff --git a/components/soc/esp32h2/include/rev1/soc/interrupt_core0_reg.h b/components/soc/esp32h4/include/rev1/soc/interrupt_core0_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/interrupt_core0_reg.h rename to components/soc/esp32h4/include/rev1/soc/interrupt_core0_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/io_mux_reg.h b/components/soc/esp32h4/include/rev1/soc/io_mux_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/io_mux_reg.h rename to components/soc/esp32h4/include/rev1/soc/io_mux_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/rtc_cntl_reg.h b/components/soc/esp32h4/include/rev1/soc/rtc_cntl_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/rtc_cntl_reg.h rename to components/soc/esp32h4/include/rev1/soc/rtc_cntl_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/rtc_cntl_struct.h b/components/soc/esp32h4/include/rev1/soc/rtc_cntl_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/rtc_cntl_struct.h rename to components/soc/esp32h4/include/rev1/soc/rtc_cntl_struct.h diff --git a/components/soc/esp32h2/include/rev1/soc/sensitive_reg.h b/components/soc/esp32h4/include/rev1/soc/sensitive_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/sensitive_reg.h rename to components/soc/esp32h4/include/rev1/soc/sensitive_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/sensitive_struct.h b/components/soc/esp32h4/include/rev1/soc/sensitive_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/sensitive_struct.h rename to components/soc/esp32h4/include/rev1/soc/sensitive_struct.h diff --git a/components/soc/esp32h2/include/rev1/soc/syscon_reg.h b/components/soc/esp32h4/include/rev1/soc/syscon_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/syscon_reg.h rename to components/soc/esp32h4/include/rev1/soc/syscon_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/syscon_struct.h b/components/soc/esp32h4/include/rev1/soc/syscon_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/syscon_struct.h rename to components/soc/esp32h4/include/rev1/soc/syscon_struct.h diff --git a/components/soc/esp32h2/include/rev1/soc/system_reg.h b/components/soc/esp32h4/include/rev1/soc/system_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/system_reg.h rename to components/soc/esp32h4/include/rev1/soc/system_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/system_struct.h b/components/soc/esp32h4/include/rev1/soc/system_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/system_struct.h rename to components/soc/esp32h4/include/rev1/soc/system_struct.h diff --git a/components/soc/esp32h2/include/rev1/soc/usb_serial_jtag_reg.h b/components/soc/esp32h4/include/rev1/soc/usb_serial_jtag_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev1/soc/usb_serial_jtag_reg.h rename to components/soc/esp32h4/include/rev1/soc/usb_serial_jtag_reg.h diff --git a/components/soc/esp32h2/include/rev1/soc/usb_serial_jtag_struct.h b/components/soc/esp32h4/include/rev1/soc/usb_serial_jtag_struct.h similarity index 99% rename from components/soc/esp32h2/include/rev1/soc/usb_serial_jtag_struct.h rename to components/soc/esp32h4/include/rev1/soc/usb_serial_jtag_struct.h index 0580d78471..141e5e2a69 100644 --- a/components/soc/esp32h2/include/rev1/soc/usb_serial_jtag_struct.h +++ b/components/soc/esp32h4/include/rev1/soc/usb_serial_jtag_struct.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/assist_debug_reg.h b/components/soc/esp32h4/include/rev2/soc/assist_debug_reg.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/assist_debug_reg.h rename to components/soc/esp32h4/include/rev2/soc/assist_debug_reg.h index b1ea0f7286..10b8e335cb 100644 --- a/components/soc/esp32h2/include/rev2/soc/assist_debug_reg.h +++ b/components/soc/esp32h4/include/rev2/soc/assist_debug_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/clkrst_reg.h b/components/soc/esp32h4/include/rev2/soc/clkrst_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/clkrst_reg.h rename to components/soc/esp32h4/include/rev2/soc/clkrst_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/ecc_mult_reg.h b/components/soc/esp32h4/include/rev2/soc/ecc_mult_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/ecc_mult_reg.h rename to components/soc/esp32h4/include/rev2/soc/ecc_mult_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/ecc_mult_struct.h b/components/soc/esp32h4/include/rev2/soc/ecc_mult_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/ecc_mult_struct.h rename to components/soc/esp32h4/include/rev2/soc/ecc_mult_struct.h diff --git a/components/soc/esp32h2/include/rev2/soc/efuse_reg.h b/components/soc/esp32h4/include/rev2/soc/efuse_reg.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/efuse_reg.h rename to components/soc/esp32h4/include/rev2/soc/efuse_reg.h index 2ed1aa48d1..9be65687c0 100644 --- a/components/soc/esp32h2/include/rev2/soc/efuse_reg.h +++ b/components/soc/esp32h4/include/rev2/soc/efuse_reg.h @@ -577,7 +577,7 @@ extern "C" { #define EFUSE_SYS_DATA_PART0_0_V 0xFF #define EFUSE_SYS_DATA_PART0_0_S 25 /* EFUSE_PKG_VERSION : RO ;bitpos:[23:21] ;default: 3'h0 ; */ -/*description: Package version 0:ESP32-H2 */ +/*description: Package version 0:ESP32-H4 */ #define EFUSE_PKG_VERSION 0x00000007 #define EFUSE_PKG_VERSION_M ((EFUSE_PKG_VERSION_V)<<(EFUSE_PKG_VERSION_S)) #define EFUSE_PKG_VERSION_V 0x7 diff --git a/components/soc/esp32h2/include/rev2/soc/efuse_struct.h b/components/soc/esp32h4/include/rev2/soc/efuse_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/efuse_struct.h rename to components/soc/esp32h4/include/rev2/soc/efuse_struct.h diff --git a/components/soc/esp32h2/include/rev2/soc/gpio_reg.h b/components/soc/esp32h4/include/rev2/soc/gpio_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/gpio_reg.h rename to components/soc/esp32h4/include/rev2/soc/gpio_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/gpio_sd_reg.h b/components/soc/esp32h4/include/rev2/soc/gpio_sd_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/gpio_sd_reg.h rename to components/soc/esp32h4/include/rev2/soc/gpio_sd_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/gpio_sig_map.h b/components/soc/esp32h4/include/rev2/soc/gpio_sig_map.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/gpio_sig_map.h rename to components/soc/esp32h4/include/rev2/soc/gpio_sig_map.h diff --git a/components/soc/esp32h2/include/rev2/soc/gpio_struct.h b/components/soc/esp32h4/include/rev2/soc/gpio_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/gpio_struct.h rename to components/soc/esp32h4/include/rev2/soc/gpio_struct.h diff --git a/components/soc/esp32h2/include/rev2/soc/interrupt_core0_reg.h b/components/soc/esp32h4/include/rev2/soc/interrupt_core0_reg.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/interrupt_core0_reg.h rename to components/soc/esp32h4/include/rev2/soc/interrupt_core0_reg.h index 809ff3b224..13386df3c8 100644 --- a/components/soc/esp32h2/include/rev2/soc/interrupt_core0_reg.h +++ b/components/soc/esp32h4/include/rev2/soc/interrupt_core0_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/io_mux_reg.h b/components/soc/esp32h4/include/rev2/soc/io_mux_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/io_mux_reg.h rename to components/soc/esp32h4/include/rev2/soc/io_mux_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/rtc_cntl_reg.h b/components/soc/esp32h4/include/rev2/soc/rtc_cntl_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/rtc_cntl_reg.h rename to components/soc/esp32h4/include/rev2/soc/rtc_cntl_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/rtc_cntl_struct.h b/components/soc/esp32h4/include/rev2/soc/rtc_cntl_struct.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/rtc_cntl_struct.h rename to components/soc/esp32h4/include/rev2/soc/rtc_cntl_struct.h diff --git a/components/soc/esp32h2/include/rev2/soc/sensitive_reg.h b/components/soc/esp32h4/include/rev2/soc/sensitive_reg.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/sensitive_reg.h rename to components/soc/esp32h4/include/rev2/soc/sensitive_reg.h index 08f53d48bd..fe3e3eaa33 100644 --- a/components/soc/esp32h2/include/rev2/soc/sensitive_reg.h +++ b/components/soc/esp32h4/include/rev2/soc/sensitive_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/sensitive_struct.h b/components/soc/esp32h4/include/rev2/soc/sensitive_struct.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/sensitive_struct.h rename to components/soc/esp32h4/include/rev2/soc/sensitive_struct.h index d98d750c29..45bc6faa82 100644 --- a/components/soc/esp32h2/include/rev2/soc/sensitive_struct.h +++ b/components/soc/esp32h4/include/rev2/soc/sensitive_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/syscon_reg.h b/components/soc/esp32h4/include/rev2/soc/syscon_reg.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/syscon_reg.h rename to components/soc/esp32h4/include/rev2/soc/syscon_reg.h index 3110fbff60..c49615526a 100644 --- a/components/soc/esp32h2/include/rev2/soc/syscon_reg.h +++ b/components/soc/esp32h4/include/rev2/soc/syscon_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/syscon_struct.h b/components/soc/esp32h4/include/rev2/soc/syscon_struct.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/syscon_struct.h rename to components/soc/esp32h4/include/rev2/soc/syscon_struct.h index 13f7b8051d..6e50a408f8 100644 --- a/components/soc/esp32h2/include/rev2/soc/syscon_struct.h +++ b/components/soc/esp32h4/include/rev2/soc/syscon_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/system_reg.h b/components/soc/esp32h4/include/rev2/soc/system_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/system_reg.h rename to components/soc/esp32h4/include/rev2/soc/system_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/system_struct.h b/components/soc/esp32h4/include/rev2/soc/system_struct.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/system_struct.h rename to components/soc/esp32h4/include/rev2/soc/system_struct.h index a245a24aa9..d893cb6a15 100644 --- a/components/soc/esp32h2/include/rev2/soc/system_struct.h +++ b/components/soc/esp32h4/include/rev2/soc/system_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/rev2/soc/usb_serial_jtag_reg.h b/components/soc/esp32h4/include/rev2/soc/usb_serial_jtag_reg.h similarity index 100% rename from components/soc/esp32h2/include/rev2/soc/usb_serial_jtag_reg.h rename to components/soc/esp32h4/include/rev2/soc/usb_serial_jtag_reg.h diff --git a/components/soc/esp32h2/include/rev2/soc/usb_serial_jtag_struct.h b/components/soc/esp32h4/include/rev2/soc/usb_serial_jtag_struct.h similarity index 99% rename from components/soc/esp32h2/include/rev2/soc/usb_serial_jtag_struct.h rename to components/soc/esp32h4/include/rev2/soc/usb_serial_jtag_struct.h index 413dd666d6..44ff6b3ee5 100644 --- a/components/soc/esp32h2/include/rev2/soc/usb_serial_jtag_struct.h +++ b/components/soc/esp32h4/include/rev2/soc/usb_serial_jtag_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in similarity index 100% rename from components/soc/esp32h2/include/soc/Kconfig.soc_caps.in rename to components/soc/esp32h4/include/soc/Kconfig.soc_caps.in diff --git a/components/soc/esp32h2/include/soc/adc_channel.h b/components/soc/esp32h4/include/soc/adc_channel.h similarity index 100% rename from components/soc/esp32h2/include/soc/adc_channel.h rename to components/soc/esp32h4/include/soc/adc_channel.h diff --git a/components/soc/esp32h2/include/soc/apb_saradc_reg.h b/components/soc/esp32h4/include/soc/apb_saradc_reg.h similarity index 97% rename from components/soc/esp32h2/include/soc/apb_saradc_reg.h rename to components/soc/esp32h4/include/soc/apb_saradc_reg.h index 526738f7e8..13b87a95ce 100644 --- a/components/soc/esp32h2/include/soc/apb_saradc_reg.h +++ b/components/soc/esp32h4/include/soc/apb_saradc_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_APB_SARADC_REG_H_ #define _SOC_APB_SARADC_REG_H_ diff --git a/components/soc/esp32h2/include/soc/apb_saradc_struct.h b/components/soc/esp32h4/include/soc/apb_saradc_struct.h similarity index 96% rename from components/soc/esp32h2/include/soc/apb_saradc_struct.h rename to components/soc/esp32h4/include/soc/apb_saradc_struct.h index a286c3c557..d1aef9be56 100644 --- a/components/soc/esp32h2/include/soc/apb_saradc_struct.h +++ b/components/soc/esp32h4/include/soc/apb_saradc_struct.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_APB_SARADC_STRUCT_H_ #define _SOC_APB_SARADC_STRUCT_H_ #ifdef __cplusplus diff --git a/components/soc/esp32h2/include/soc/bb_reg.h b/components/soc/esp32h4/include/soc/bb_reg.h similarity index 52% rename from components/soc/esp32h2/include/soc/bb_reg.h rename to components/soc/esp32h4/include/soc/bb_reg.h index 186b6f0d2e..cd950c4da9 100644 --- a/components/soc/esp32h2/include/soc/bb_reg.h +++ b/components/soc/esp32h4/include/soc/bb_reg.h @@ -1,16 +1,8 @@ -// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once diff --git a/components/soc/esp32h2/include/soc/boot_mode.h b/components/soc/esp32h4/include/soc/boot_mode.h similarity index 82% rename from components/soc/esp32h2/include/soc/boot_mode.h rename to components/soc/esp32h4/include/soc/boot_mode.h index 648d0a4386..f782959272 100644 --- a/components/soc/esp32h2/include/soc/boot_mode.h +++ b/components/soc/esp32h4/include/soc/boot_mode.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_BOOT_MODE_H_ #define _SOC_BOOT_MODE_H_ diff --git a/components/soc/esp32h2/include/soc/clk_tree_defs.h b/components/soc/esp32h4/include/soc/clk_tree_defs.h similarity index 99% rename from components/soc/esp32h2/include/soc/clk_tree_defs.h rename to components/soc/esp32h4/include/soc/clk_tree_defs.h index bb57d01faa..5650952068 100644 --- a/components/soc/esp32h2/include/soc/clk_tree_defs.h +++ b/components/soc/esp32h4/include/soc/clk_tree_defs.h @@ -10,7 +10,7 @@ extern "C" { #endif /* - ************************ ESP32H2 Root Clock Source *************************** + ************************ ESP32H4 Root Clock Source *************************** * 1) Internal 8MHz RC Oscillator: RC_FAST (usually referred as FOSC or CK8M/CLK8M in TRM and reg. description) * * This RC oscillator generates a ~8.5MHz clock signal output as the RC_FAST_CLK. diff --git a/components/soc/esp32h2/include/soc/clkout_channel.h b/components/soc/esp32h4/include/soc/clkout_channel.h similarity index 76% rename from components/soc/esp32h2/include/soc/clkout_channel.h rename to components/soc/esp32h4/include/soc/clkout_channel.h index 8adfbf56d6..e86e92c09d 100644 --- a/components/soc/esp32h2/include/soc/clkout_channel.h +++ b/components/soc/esp32h4/include/soc/clkout_channel.h @@ -7,6 +7,6 @@ #ifndef _SOC_CLKOUT_CHANNEL_H #define _SOC_CLKOUT_CHANNEL_H -// ESP32H2 CLKOUT signals has no corresponding iomux pins +// ESP32H4 CLKOUT signals has no corresponding iomux pins #endif diff --git a/components/soc/esp32h2/include/soc/dport_access.h b/components/soc/esp32h4/include/soc/dport_access.h similarity index 100% rename from components/soc/esp32h2/include/soc/dport_access.h rename to components/soc/esp32h4/include/soc/dport_access.h diff --git a/components/soc/esp32h2/include/soc/dport_reg.h b/components/soc/esp32h4/include/soc/dport_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/dport_reg.h rename to components/soc/esp32h4/include/soc/dport_reg.h diff --git a/components/soc/esp32h2/include/soc/ext_mem_defs.h b/components/soc/esp32h4/include/soc/ext_mem_defs.h similarity index 100% rename from components/soc/esp32h2/include/soc/ext_mem_defs.h rename to components/soc/esp32h4/include/soc/ext_mem_defs.h diff --git a/components/soc/esp32h2/include/soc/extmem_reg.h b/components/soc/esp32h4/include/soc/extmem_reg.h similarity index 98% rename from components/soc/esp32h2/include/soc/extmem_reg.h rename to components/soc/esp32h4/include/soc/extmem_reg.h index 71ab60f640..a830b14ad3 100644 --- a/components/soc/esp32h2/include/soc/extmem_reg.h +++ b/components/soc/esp32h4/include/soc/extmem_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_EXTMEM_REG_H_ #define _SOC_EXTMEM_REG_H_ diff --git a/components/soc/esp32h2/include/soc/fe_reg.h b/components/soc/esp32h4/include/soc/fe_reg.h similarity index 56% rename from components/soc/esp32h2/include/soc/fe_reg.h rename to components/soc/esp32h4/include/soc/fe_reg.h index 5d76651de5..52bd44bd49 100644 --- a/components/soc/esp32h2/include/soc/fe_reg.h +++ b/components/soc/esp32h4/include/soc/fe_reg.h @@ -1,16 +1,8 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once diff --git a/components/soc/esp32h2/include/soc/gdma_channel.h b/components/soc/esp32h4/include/soc/gdma_channel.h similarity index 100% rename from components/soc/esp32h2/include/soc/gdma_channel.h rename to components/soc/esp32h4/include/soc/gdma_channel.h diff --git a/components/soc/esp32h2/include/soc/gdma_reg.h b/components/soc/esp32h4/include/soc/gdma_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/gdma_reg.h rename to components/soc/esp32h4/include/soc/gdma_reg.h diff --git a/components/soc/esp32h2/include/soc/gdma_struct.h b/components/soc/esp32h4/include/soc/gdma_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/gdma_struct.h rename to components/soc/esp32h4/include/soc/gdma_struct.h diff --git a/components/soc/esp32h2/include/soc/gpio_pins.h b/components/soc/esp32h4/include/soc/gpio_pins.h similarity index 81% rename from components/soc/esp32h2/include/soc/gpio_pins.h rename to components/soc/esp32h4/include/soc/gpio_pins.h index c7b38724d0..ffb8ad836a 100644 --- a/components/soc/esp32h2/include/soc/gpio_pins.h +++ b/components/soc/esp32h4/include/soc/gpio_pins.h @@ -13,10 +13,10 @@ extern "C" { #endif -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 #define GPIO_MATRIX_CONST_ONE_INPUT (0x38) #define GPIO_MATRIX_CONST_ZERO_INPUT (0x3C) -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 #define GPIO_MATRIX_CONST_ONE_INPUT (0x1E) #define GPIO_MATRIX_CONST_ZERO_INPUT (0x1F) #endif diff --git a/components/soc/esp32h2/include/soc/gpio_sd_struct.h b/components/soc/esp32h4/include/soc/gpio_sd_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/gpio_sd_struct.h rename to components/soc/esp32h4/include/soc/gpio_sd_struct.h diff --git a/components/soc/esp32h2/include/soc/hwcrypto_reg.h b/components/soc/esp32h4/include/soc/hwcrypto_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/hwcrypto_reg.h rename to components/soc/esp32h4/include/soc/hwcrypto_reg.h diff --git a/components/soc/esp32h2/include/soc/i2c_reg.h b/components/soc/esp32h4/include/soc/i2c_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/i2c_reg.h rename to components/soc/esp32h4/include/soc/i2c_reg.h diff --git a/components/soc/esp32h2/include/soc/i2c_struct.h b/components/soc/esp32h4/include/soc/i2c_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/i2c_struct.h rename to components/soc/esp32h4/include/soc/i2c_struct.h diff --git a/components/soc/esp32h2/include/soc/i2s_reg.h b/components/soc/esp32h4/include/soc/i2s_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/i2s_reg.h rename to components/soc/esp32h4/include/soc/i2s_reg.h diff --git a/components/soc/esp32h2/include/soc/i2s_struct.h b/components/soc/esp32h4/include/soc/i2s_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/i2s_struct.h rename to components/soc/esp32h4/include/soc/i2s_struct.h diff --git a/components/soc/esp32h4/include/soc/interrupt_reg.h b/components/soc/esp32h4/include/soc/interrupt_reg.h new file mode 100644 index 0000000000..d4a6470275 --- /dev/null +++ b/components/soc/esp32h4/include/soc/interrupt_reg.h @@ -0,0 +1,7 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "soc/interrupt_core0_reg.h" diff --git a/components/soc/esp32h2/include/soc/ledc_reg.h b/components/soc/esp32h4/include/soc/ledc_reg.h similarity index 98% rename from components/soc/esp32h2/include/soc/ledc_reg.h rename to components/soc/esp32h4/include/soc/ledc_reg.h index 0cc9334130..728371f1d5 100644 --- a/components/soc/esp32h2/include/soc/ledc_reg.h +++ b/components/soc/esp32h4/include/soc/ledc_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_LEDC_REG_H_ #define _SOC_LEDC_REG_H_ diff --git a/components/soc/esp32h2/include/soc/ledc_struct.h b/components/soc/esp32h4/include/soc/ledc_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/ledc_struct.h rename to components/soc/esp32h4/include/soc/ledc_struct.h diff --git a/components/soc/esp32h2/include/soc/mmu.h b/components/soc/esp32h4/include/soc/mmu.h similarity index 100% rename from components/soc/esp32h2/include/soc/mmu.h rename to components/soc/esp32h4/include/soc/mmu.h diff --git a/components/soc/esp32h2/include/soc/nrx_reg.h b/components/soc/esp32h4/include/soc/nrx_reg.h similarity index 67% rename from components/soc/esp32h2/include/soc/nrx_reg.h rename to components/soc/esp32h4/include/soc/nrx_reg.h index d80cb2a178..2e5b56fdb8 100644 --- a/components/soc/esp32h2/include/soc/nrx_reg.h +++ b/components/soc/esp32h4/include/soc/nrx_reg.h @@ -1,16 +1,8 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once diff --git a/components/soc/esp32h2/include/soc/periph_defs.h b/components/soc/esp32h4/include/soc/periph_defs.h similarity index 100% rename from components/soc/esp32h2/include/soc/periph_defs.h rename to components/soc/esp32h4/include/soc/periph_defs.h diff --git a/components/soc/esp32h2/include/soc/reg_base.h b/components/soc/esp32h4/include/soc/reg_base.h similarity index 100% rename from components/soc/esp32h2/include/soc/reg_base.h rename to components/soc/esp32h4/include/soc/reg_base.h diff --git a/components/soc/esp32h2/include/soc/regi2c_bbpll.h b/components/soc/esp32h4/include/soc/regi2c_bbpll.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_bbpll.h rename to components/soc/esp32h4/include/soc/regi2c_bbpll.h diff --git a/components/soc/esp32h2/include/soc/regi2c_bias.h b/components/soc/esp32h4/include/soc/regi2c_bias.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_bias.h rename to components/soc/esp32h4/include/soc/regi2c_bias.h diff --git a/components/soc/esp32h2/include/soc/regi2c_brownout.h b/components/soc/esp32h4/include/soc/regi2c_brownout.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_brownout.h rename to components/soc/esp32h4/include/soc/regi2c_brownout.h diff --git a/components/soc/esp32h2/include/soc/regi2c_defs.h b/components/soc/esp32h4/include/soc/regi2c_defs.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_defs.h rename to components/soc/esp32h4/include/soc/regi2c_defs.h diff --git a/components/soc/esp32h2/include/soc/regi2c_dig_reg.h b/components/soc/esp32h4/include/soc/regi2c_dig_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_dig_reg.h rename to components/soc/esp32h4/include/soc/regi2c_dig_reg.h diff --git a/components/soc/esp32h2/include/soc/regi2c_lp_bias.h b/components/soc/esp32h4/include/soc/regi2c_lp_bias.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_lp_bias.h rename to components/soc/esp32h4/include/soc/regi2c_lp_bias.h diff --git a/components/soc/esp32h2/include/soc/regi2c_pmu.h b/components/soc/esp32h4/include/soc/regi2c_pmu.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_pmu.h rename to components/soc/esp32h4/include/soc/regi2c_pmu.h diff --git a/components/soc/esp32h2/include/soc/regi2c_saradc.h b/components/soc/esp32h4/include/soc/regi2c_saradc.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_saradc.h rename to components/soc/esp32h4/include/soc/regi2c_saradc.h diff --git a/components/soc/esp32h2/include/soc/regi2c_ulp.h b/components/soc/esp32h4/include/soc/regi2c_ulp.h similarity index 100% rename from components/soc/esp32h2/include/soc/regi2c_ulp.h rename to components/soc/esp32h4/include/soc/regi2c_ulp.h diff --git a/components/soc/esp32h2/include/soc/reset_reasons.h b/components/soc/esp32h4/include/soc/reset_reasons.h similarity index 100% rename from components/soc/esp32h2/include/soc/reset_reasons.h rename to components/soc/esp32h4/include/soc/reset_reasons.h diff --git a/components/soc/esp32h2/include/soc/rmt_reg.h b/components/soc/esp32h4/include/soc/rmt_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/rmt_reg.h rename to components/soc/esp32h4/include/soc/rmt_reg.h diff --git a/components/soc/esp32h2/include/soc/rmt_struct.h b/components/soc/esp32h4/include/soc/rmt_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/rmt_struct.h rename to components/soc/esp32h4/include/soc/rmt_struct.h diff --git a/components/soc/esp32h2/include/soc/rtc.h b/components/soc/esp32h4/include/soc/rtc.h similarity index 99% rename from components/soc/esp32h2/include/soc/rtc.h rename to components/soc/esp32h4/include/soc/rtc.h index 4d8bd70287..b21a9931e3 100644 --- a/components/soc/esp32h2/include/soc/rtc.h +++ b/components/soc/esp32h4/include/soc/rtc.h @@ -176,7 +176,7 @@ typedef struct { uint32_t clk_8m_clk_div : 3; //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency) uint32_t slow_clk_dcap : 8; //!< RTC 150k clock adjustment parameter (higher value leads to lower frequency) uint32_t clk_8m_dfreq : 10; //!< RTC 8m clock adjustment parameter (higher value leads to higher frequency) - uint32_t root_clk_slt : 2; //!< Select clock root source for esp32h2 (default 0: xtal_32M) + uint32_t root_clk_slt : 2; //!< Select clock root source for esp32h4 (default 0: xtal_32M) } rtc_clk_config_t; /** diff --git a/components/soc/esp32h2/include/soc/rtc_i2c_reg.h b/components/soc/esp32h4/include/soc/rtc_i2c_reg.h similarity index 97% rename from components/soc/esp32h2/include/soc/rtc_i2c_reg.h rename to components/soc/esp32h4/include/soc/rtc_i2c_reg.h index 52bdefc0e5..efbe904b4e 100644 --- a/components/soc/esp32h2/include/soc/rtc_i2c_reg.h +++ b/components/soc/esp32h4/include/soc/rtc_i2c_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_RTC_I2C_REG_H_ #define _SOC_RTC_I2C_REG_H_ diff --git a/components/soc/esp32h2/include/soc/rtc_i2c_struct.h b/components/soc/esp32h4/include/soc/rtc_i2c_struct.h similarity index 93% rename from components/soc/esp32h2/include/soc/rtc_i2c_struct.h rename to components/soc/esp32h4/include/soc/rtc_i2c_struct.h index 9f97a70cad..69ea0c0b00 100644 --- a/components/soc/esp32h2/include/soc/rtc_i2c_struct.h +++ b/components/soc/esp32h4/include/soc/rtc_i2c_struct.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_RTC_I2C_STRUCT_H_ #define _SOC_RTC_I2C_STRUCT_H_ #ifdef __cplusplus diff --git a/components/soc/esp32h2/include/soc/soc.h b/components/soc/esp32h4/include/soc/soc.h similarity index 99% rename from components/soc/esp32h2/include/soc/soc.h rename to components/soc/esp32h4/include/soc/soc.h index e36b6550db..0531f31d4a 100644 --- a/components/soc/esp32h2/include/soc/soc.h +++ b/components/soc/esp32h4/include/soc/soc.h @@ -140,7 +140,7 @@ #if CONFIG_IDF_ENV_FPGA #define APB_CLK_FREQ ( 32*1000000 ) #else -#define APB_CLK_FREQ ( 48*1000000 ) //ESP32H2-TODO: IDF-3786 +#define APB_CLK_FREQ ( 48*1000000 ) //ESP32H4-TODO: IDF-3786 #endif #define REF_CLK_FREQ ( 1000000 ) #define RTC_CLK_FREQ (17.5*1000000) @@ -166,7 +166,7 @@ #define SOC_IRAM_HIGH 0x403E0000 #define SOC_DRAM_LOW 0x3FC80000 #define SOC_DRAM_HIGH 0x3FCE0000 -#define SOC_RTC_IRAM_LOW 0x50000000 // ESP32-H2 only has RTC slow memory +#define SOC_RTC_IRAM_LOW 0x50000000 // ESP32-H4 only has RTC slow memory #define SOC_RTC_IRAM_HIGH 0x50002000 #define SOC_RTC_DRAM_LOW 0x50000000 #define SOC_RTC_DRAM_HIGH 0x50002000 diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h similarity index 96% rename from components/soc/esp32h2/include/soc/soc_caps.h rename to components/soc/esp32h4/include/soc/soc_caps.h index 26418b3624..2aea7537cf 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h4/include/soc/soc_caps.h @@ -15,7 +15,7 @@ * If this file is changed the script will automatically run the script * and generate the kconfig variables as part of the pre-commit hooks. * - * It can also be ran manually with `./tools/gen_soc_caps_kconfig/gen_soc_caps_kconfig.py 'components/soc/esp32h2/include/soc/'` + * It can also be ran manually with `./tools/gen_soc_caps_kconfig/gen_soc_caps_kconfig.py 'components/soc/esp32h4/include/soc/'` * * For more information see `tools/gen_soc_caps_kconfig/README.md` * @@ -27,8 +27,8 @@ # if __has_include("sdkconfig.h") # include "sdkconfig.h" # else -# warning Chip version cannot be determined. Default chip to ESP32H2_BETA_VERSION_1. -# define CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 1 +# warning Chip version cannot be determined. Default chip to ESP32H4_BETA_VERSION_1. +# define CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 1 # endif #endif @@ -136,29 +136,29 @@ #define SOC_GDMA_TX_RX_SHARE_INTERRUPT (1) // TX and RX channel in the same pair will share the same interrupt source number /*-------------------------- GPIO CAPS ---------------------------------------*/ -// ESP32-H2 has 1 GPIO peripheral +// ESP32-H4 has 1 GPIO peripheral #define SOC_GPIO_PORT (1U) -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 #define SOC_GPIO_PIN_COUNT (41) -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 #define SOC_GPIO_PIN_COUNT (26) #endif // Target has no full RTC IO subsystem, so GPIO is 100% "independent" of RTC -// On ESP32-H2, Digital IOs have their own registers to control pullup/down capability, independent of RTC registers. +// On ESP32-H4, Digital IOs have their own registers to control pullup/down capability, independent of RTC registers. #define SOC_GPIO_SUPPORTS_RTC_INDEPENDENT (1) -// Force hold is a new function of ESP32-H2 +// Force hold is a new function of ESP32-H4 #define SOC_GPIO_SUPPORT_FORCE_HOLD (1) -// GPIO0~5 on ESP32H2Beta1 / GPIO7~12 on ESP32H2Beta2 can support chip deep sleep wakeup +// GPIO0~5 on ESP32H4Beta1 / GPIO7~12 on ESP32H4Beta2 can support chip deep sleep wakeup #define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) #define SOC_GPIO_VALID_GPIO_MASK ((1ULL<> 3)) /*-------------------------- RTCIO CAPS --------------------------------------*/ -/* No dedicated RTCIO subsystem on ESP32-H2. RTC functions are still supported +/* No dedicated RTCIO subsystem on ESP32-H4. RTC functions are still supported * for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */ #define SOC_RTCIO_PIN_COUNT (0U) @@ -337,7 +337,7 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES_128 1 /*-------------------------- UART CAPS ---------------------------------------*/ -// ESP32-H2 has 2 UARTs +// ESP32-H4 has 2 UARTs #define SOC_UART_NUM (2) #define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */ #define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */ diff --git a/components/soc/esp32h4/include/soc/soc_pins.h b/components/soc/esp32h4/include/soc/soc_pins.h new file mode 100644 index 0000000000..05a7c3b416 --- /dev/null +++ b/components/soc/esp32h4/include/soc/soc_pins.h @@ -0,0 +1,16 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * Pin definition header file. The long term plan is to have a single soc_pins.h for all + * peripherals. Now we temporarily separate these information into periph_pins/channels.h for each + * peripheral and include them here to avoid developing conflicts in those header files. + */ + +#pragma once + +#include "soc/gpio_pins.h" +#include "soc/spi_pins.h" diff --git a/components/soc/esp32h2/include/soc/spi_mem_reg.h b/components/soc/esp32h4/include/soc/spi_mem_reg.h similarity index 99% rename from components/soc/esp32h2/include/soc/spi_mem_reg.h rename to components/soc/esp32h4/include/soc/spi_mem_reg.h index fcf3e29248..96fd9a4122 100644 --- a/components/soc/esp32h2/include/soc/spi_mem_reg.h +++ b/components/soc/esp32h4/include/soc/spi_mem_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_SPI_MEM_REG_H_ #define _SOC_SPI_MEM_REG_H_ diff --git a/components/soc/esp32h2/include/soc/spi_mem_struct.h b/components/soc/esp32h4/include/soc/spi_mem_struct.h similarity index 98% rename from components/soc/esp32h2/include/soc/spi_mem_struct.h rename to components/soc/esp32h4/include/soc/spi_mem_struct.h index cde08c0207..af22d115a0 100644 --- a/components/soc/esp32h2/include/soc/spi_mem_struct.h +++ b/components/soc/esp32h4/include/soc/spi_mem_struct.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_SPI_MEM_STRUCT_H_ #define _SOC_SPI_MEM_STRUCT_H_ #ifdef __cplusplus diff --git a/components/soc/esp32h4/include/soc/spi_pins.h b/components/soc/esp32h4/include/soc/spi_pins.h new file mode 100644 index 0000000000..0921353333 --- /dev/null +++ b/components/soc/esp32h4/include/soc/spi_pins.h @@ -0,0 +1,26 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef _SOC_SPI_PINS_H_ +#define _SOC_SPI_PINS_H_ + +#define SPI_FUNC_NUM 0 +#define SPI_IOMUX_PIN_NUM_HD 12 +#define SPI_IOMUX_PIN_NUM_CS 14 +#define SPI_IOMUX_PIN_NUM_MOSI 16 +#define SPI_IOMUX_PIN_NUM_CLK 15 +#define SPI_IOMUX_PIN_NUM_MISO 17 +#define SPI_IOMUX_PIN_NUM_WP 13 + +#define SPI2_FUNC_NUM 2 +#define SPI2_IOMUX_PIN_NUM_MISO 2 +#define SPI2_IOMUX_PIN_NUM_HD 4 +#define SPI2_IOMUX_PIN_NUM_WP 5 +#define SPI2_IOMUX_PIN_NUM_CLK 6 +#define SPI2_IOMUX_PIN_NUM_MOSI 7 +#define SPI2_IOMUX_PIN_NUM_CS 10 + +#endif diff --git a/components/soc/esp32h2/include/soc/spi_reg.h b/components/soc/esp32h4/include/soc/spi_reg.h similarity index 99% rename from components/soc/esp32h2/include/soc/spi_reg.h rename to components/soc/esp32h4/include/soc/spi_reg.h index f4317ffb1a..9fe21095a4 100644 --- a/components/soc/esp32h2/include/soc/spi_reg.h +++ b/components/soc/esp32h4/include/soc/spi_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_SPI_REG_H_ #define _SOC_SPI_REG_H_ diff --git a/components/soc/esp32h2/include/soc/spi_struct.h b/components/soc/esp32h4/include/soc/spi_struct.h similarity index 98% rename from components/soc/esp32h2/include/soc/spi_struct.h rename to components/soc/esp32h4/include/soc/spi_struct.h index dcdec116ad..0cf1905170 100644 --- a/components/soc/esp32h2/include/soc/spi_struct.h +++ b/components/soc/esp32h4/include/soc/spi_struct.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_SPI_STRUCT_H_ #define _SOC_SPI_STRUCT_H_ diff --git a/components/soc/esp32h2/include/soc/systimer_reg.h b/components/soc/esp32h4/include/soc/systimer_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/systimer_reg.h rename to components/soc/esp32h4/include/soc/systimer_reg.h diff --git a/components/soc/esp32h2/include/soc/systimer_struct.h b/components/soc/esp32h4/include/soc/systimer_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/systimer_struct.h rename to components/soc/esp32h4/include/soc/systimer_struct.h diff --git a/components/soc/esp32h2/include/soc/timer_group_reg.h b/components/soc/esp32h4/include/soc/timer_group_reg.h similarity index 99% rename from components/soc/esp32h2/include/soc/timer_group_reg.h rename to components/soc/esp32h4/include/soc/timer_group_reg.h index 72ec5ea1e6..f92a355c66 100644 --- a/components/soc/esp32h2/include/soc/timer_group_reg.h +++ b/components/soc/esp32h4/include/soc/timer_group_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/soc/timer_group_struct.h b/components/soc/esp32h4/include/soc/timer_group_struct.h similarity index 99% rename from components/soc/esp32h2/include/soc/timer_group_struct.h rename to components/soc/esp32h4/include/soc/timer_group_struct.h index 311d82aa22..6d460adc19 100644 --- a/components/soc/esp32h2/include/soc/timer_group_struct.h +++ b/components/soc/esp32h4/include/soc/timer_group_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/components/soc/esp32h2/include/soc/twai_struct.h b/components/soc/esp32h4/include/soc/twai_struct.h similarity index 99% rename from components/soc/esp32h2/include/soc/twai_struct.h rename to components/soc/esp32h4/include/soc/twai_struct.h index 8068055efc..8aa278a3c2 100644 --- a/components/soc/esp32h2/include/soc/twai_struct.h +++ b/components/soc/esp32h4/include/soc/twai_struct.h @@ -14,7 +14,7 @@ extern "C" { /* ---------------------------- Register Layout ------------------------------ */ -/* The TWAI peripheral's registers are 8bits, however the ESP32-H2 can only access +/* The TWAI peripheral's registers are 8bits, however the ESP32-H4 can only access * peripheral registers every 32bits. Therefore each TWAI register is mapped to * the least significant byte of every 32bits. */ diff --git a/components/soc/esp32h2/include/soc/uart_channel.h b/components/soc/esp32h4/include/soc/uart_channel.h similarity index 89% rename from components/soc/esp32h2/include/soc/uart_channel.h rename to components/soc/esp32h4/include/soc/uart_channel.h index 86f6c46c48..7de5eb88c0 100644 --- a/components/soc/esp32h2/include/soc/uart_channel.h +++ b/components/soc/esp32h4/include/soc/uart_channel.h @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32H2. +// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32H4. #ifndef _SOC_UART_CHANNEL_H #define _SOC_UART_CHANNEL_H @@ -12,7 +12,7 @@ #include "sdkconfig.h" //UART channels -#if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1 +#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1 #define UART_GPIO21_DIRECT_CHANNEL UART_NUM_0 #define UART_NUM_0_TXD_DIRECT_GPIO_NUM 21 #define UART_GPIO20_DIRECT_CHANNEL UART_NUM_0 @@ -21,7 +21,7 @@ #define UART_TXD_GPIO21_DIRECT_CHANNEL UART_GPIO21_DIRECT_CHANNEL #define UART_RXD_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL -#elif CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2 +#elif CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2 #define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0 #define UART_NUM_0_TXD_DIRECT_GPIO_NUM 22 #define UART_GPIO21_DIRECT_CHANNEL UART_NUM_0 diff --git a/components/soc/esp32h2/include/soc/uart_pins.h b/components/soc/esp32h4/include/soc/uart_pins.h similarity index 58% rename from components/soc/esp32h2/include/soc/uart_pins.h rename to components/soc/esp32h4/include/soc/uart_pins.h index 26b225a346..7e9ad2ddaa 100644 --- a/components/soc/esp32h2/include/soc/uart_pins.h +++ b/components/soc/esp32h4/include/soc/uart_pins.h @@ -1,16 +1,8 @@ -// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once diff --git a/components/soc/esp32h2/include/soc/uart_reg.h b/components/soc/esp32h4/include/soc/uart_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/uart_reg.h rename to components/soc/esp32h4/include/soc/uart_reg.h diff --git a/components/soc/esp32h2/include/soc/uart_struct.h b/components/soc/esp32h4/include/soc/uart_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/uart_struct.h rename to components/soc/esp32h4/include/soc/uart_struct.h diff --git a/components/soc/esp32h2/include/soc/uhci_reg.h b/components/soc/esp32h4/include/soc/uhci_reg.h similarity index 100% rename from components/soc/esp32h2/include/soc/uhci_reg.h rename to components/soc/esp32h4/include/soc/uhci_reg.h diff --git a/components/soc/esp32h2/include/soc/uhci_struct.h b/components/soc/esp32h4/include/soc/uhci_struct.h similarity index 100% rename from components/soc/esp32h2/include/soc/uhci_struct.h rename to components/soc/esp32h4/include/soc/uhci_struct.h diff --git a/components/soc/esp32h4/include/soc/wdev_reg.h b/components/soc/esp32h4/include/soc/wdev_reg.h new file mode 100644 index 0000000000..755fd25f74 --- /dev/null +++ b/components/soc/esp32h4/include/soc/wdev_reg.h @@ -0,0 +1,12 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include "soc.h" + +/* Hardware random number generator register */ +#define WDEV_RND_REG 0x600260b0 diff --git a/components/soc/esp32h2/interrupts.c b/components/soc/esp32h4/interrupts.c similarity index 100% rename from components/soc/esp32h2/interrupts.c rename to components/soc/esp32h4/interrupts.c diff --git a/components/soc/esp32h2/ld/esp32h2.peripherals.ld b/components/soc/esp32h4/ld/esp32h4.peripherals.ld similarity index 100% rename from components/soc/esp32h2/ld/esp32h2.peripherals.ld rename to components/soc/esp32h4/ld/esp32h4.peripherals.ld diff --git a/components/soc/esp32h4/ledc_periph.c b/components/soc/esp32h4/ledc_periph.c new file mode 100644 index 0000000000..a401e1f80a --- /dev/null +++ b/components/soc/esp32h4/ledc_periph.c @@ -0,0 +1,17 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "soc/ledc_periph.h" +#include "soc/gpio_sig_map.h" + +/* + Bunch of constants for every LEDC peripheral: GPIO signals +*/ +const ledc_signal_conn_t ledc_periph_signal[1] = { + { + .sig_out0_idx = LEDC_LS_SIG_OUT0_IDX, + } +}; diff --git a/components/soc/esp32h2/rmt_periph.c b/components/soc/esp32h4/rmt_periph.c similarity index 100% rename from components/soc/esp32h2/rmt_periph.c rename to components/soc/esp32h4/rmt_periph.c diff --git a/components/soc/esp32h2/sdm_periph.c b/components/soc/esp32h4/sdm_periph.c similarity index 100% rename from components/soc/esp32h2/sdm_periph.c rename to components/soc/esp32h4/sdm_periph.c diff --git a/components/soc/esp32h2/spi_periph.c b/components/soc/esp32h4/spi_periph.c similarity index 100% rename from components/soc/esp32h2/spi_periph.c rename to components/soc/esp32h4/spi_periph.c diff --git a/components/soc/esp32h2/temperature_sensor_periph.c b/components/soc/esp32h4/temperature_sensor_periph.c similarity index 100% rename from components/soc/esp32h2/temperature_sensor_periph.c rename to components/soc/esp32h4/temperature_sensor_periph.c diff --git a/components/soc/esp32h2/timer_periph.c b/components/soc/esp32h4/timer_periph.c similarity index 100% rename from components/soc/esp32h2/timer_periph.c rename to components/soc/esp32h4/timer_periph.c diff --git a/components/soc/esp32h2/uart_periph.c b/components/soc/esp32h4/uart_periph.c similarity index 77% rename from components/soc/esp32h2/uart_periph.c rename to components/soc/esp32h4/uart_periph.c index d4262c6776..a23ff14937 100644 --- a/components/soc/esp32h2/uart_periph.c +++ b/components/soc/esp32h4/uart_periph.c @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "soc/uart_periph.h" diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c index 3b17f5e9d5..136de25f65 100644 --- a/components/spi_flash/cache_utils.c +++ b/components/spi_flash/cache_utils.c @@ -28,8 +28,8 @@ #include "esp32c3/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/ext_mem_defs.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/ext_mem_defs.h" #elif CONFIG_IDF_TARGET_ESP32C2 @@ -380,7 +380,7 @@ static void IRAM_ATTR spi_flash_disable_cache(uint32_t cpuid, uint32_t *saved_st icache_state = Cache_Suspend_ICache() << 16; dcache_state = Cache_Suspend_DCache(); *saved_state = icache_state | dcache_state; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 uint32_t icache_state; icache_state = Cache_Suspend_ICache() << 16; *saved_state = icache_state; @@ -411,7 +411,7 @@ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_sta #elif CONFIG_IDF_TARGET_ESP32S3 Cache_Resume_DCache(saved_state & 0xffff); Cache_Resume_ICache(saved_state >> 16); -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 Cache_Resume_ICache(saved_state >> 16); #elif CONFIG_IDF_TARGET_ESP32C6 Cache_Resume_ICache(saved_state); @@ -428,7 +428,7 @@ IRAM_ATTR bool spi_flash_cache_enabled(void) #endif #elif CONFIG_IDF_TARGET_ESP32S2 bool result = (REG_GET_BIT(EXTMEM_PRO_ICACHE_CTRL_REG, EXTMEM_PRO_ICACHE_ENABLE) != 0); -#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 bool result = (REG_GET_BIT(EXTMEM_ICACHE_CTRL_REG, EXTMEM_ICACHE_ENABLE) != 0); #elif CONFIG_IDF_TARGET_ESP32C6 bool result = s_cache_enabled; @@ -545,7 +545,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable int i; bool flash_spiram_wrap_together, flash_support_wrap = true, spiram_support_wrap = true; uint32_t drom0_in_icache = 1;//always 1 in esp32s2 -#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 drom0_in_icache = 0; #endif @@ -934,7 +934,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable } #endif -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 static IRAM_ATTR void esp_enable_cache_flash_wrap(bool icache) { @@ -976,7 +976,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable) } return ESP_OK; } -#endif // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#endif // CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 void IRAM_ATTR spi_flash_enable_cache(uint32_t cpuid) { diff --git a/components/spi_flash/esp32h2/flash_ops_esp32h2.c b/components/spi_flash/esp32h4/flash_ops_esp32h4.c similarity index 98% rename from components/spi_flash/esp32h2/flash_ops_esp32h2.c rename to components/spi_flash/esp32h4/flash_ops_esp32h4.c index d4a636588c..e82552ab81 100644 --- a/components/spi_flash/esp32h2/flash_ops_esp32h2.c +++ b/components/spi_flash/esp32h4/flash_ops_esp32h4.c @@ -10,7 +10,7 @@ #include "spi_flash_mmap.h" #include "soc/system_reg.h" #include "soc/soc_memory_layout.h" -#include "esp32h2/rom/cache.h" +#include "esp32h4/rom/cache.h" #include "hal/spi_flash_hal.h" #include "esp_flash.h" #include "esp_log.h" diff --git a/components/spi_flash/esp_flash_spi_init.c b/components/spi_flash/esp_flash_spi_init.c index c9558a1634..22596cd3a4 100644 --- a/components/spi_flash/esp_flash_spi_init.c +++ b/components/spi_flash/esp_flash_spi_init.c @@ -133,8 +133,8 @@ esp_flash_t *esp_flash_default_chip = NULL; .cs_setup = 1,\ } #endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/efuse.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/efuse.h" #if !CONFIG_SPI_FLASH_AUTO_SUSPEND #define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \ .host_id = SPI1_HOST,\ diff --git a/components/spi_flash/flash_mmap.c b/components/spi_flash/flash_mmap.c index daed070fa8..9a5f59b614 100644 --- a/components/spi_flash/flash_mmap.c +++ b/components/spi_flash/flash_mmap.c @@ -34,8 +34,8 @@ #include "soc/extmem_reg.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index 6544264908..5355c2b6d5 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -36,8 +36,8 @@ #include "esp32s3/opi_flash_private.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C6 diff --git a/components/spi_flash/spi_flash_os_func_noos.c b/components/spi_flash/spi_flash_os_func_noos.c index c0e15d12e8..bc3ca523b4 100644 --- a/components/spi_flash/spi_flash_os_func_noos.c +++ b/components/spi_flash/spi_flash_os_func_noos.c @@ -20,9 +20,9 @@ #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/ets_sys.h" #include "esp32c3/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/ets_sys.h" +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/ets_sys.h" #include "esp32c2/rom/cache.h" @@ -40,7 +40,7 @@ typedef struct { } spi_noos_arg_t; static DRAM_ATTR spi_noos_arg_t spi_arg = { 0 }; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 typedef struct { uint32_t icache_autoload; } spi_noos_arg_t; @@ -57,7 +57,7 @@ static IRAM_ATTR esp_err_t start(void *arg) spi_noos_arg_t *spi_arg = arg; spi_arg->icache_autoload = Cache_Suspend_ICache(); spi_arg->dcache_autoload = Cache_Suspend_DCache(); -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 spi_noos_arg_t *spi_arg = arg; spi_arg->icache_autoload = Cache_Suspend_ICache(); #endif @@ -76,7 +76,7 @@ static IRAM_ATTR esp_err_t end(void *arg) Cache_Invalidate_ICache_All(); Cache_Resume_ICache(spi_arg->icache_autoload); Cache_Resume_DCache(spi_arg->dcache_autoload); -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 spi_noos_arg_t *spi_arg = arg; Cache_Invalidate_ICache_All(); Cache_Resume_ICache(spi_arg->icache_autoload); diff --git a/components/spi_flash/test/test_cache_disabled.c b/components/spi_flash/test/test_cache_disabled.c index 5ea6c8efb6..086faa672d 100644 --- a/components/spi_flash/test/test_cache_disabled.c +++ b/components/spi_flash/test/test_cache_disabled.c @@ -82,7 +82,7 @@ static void IRAM_ATTR cache_access_test_func(void* arg) #if CONFIG_IDF_TARGET_ESP32 #define CACHE_ERROR_REASON "Cache disabled,SW_RESET" -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C6 #define CACHE_ERROR_REASON "Cache error,RTC_SW_CPU_RST" #elif CONFIG_IDF_TARGET_ESP32S3 #define CACHE_ERROR_REASON "Cache disabled,RTC_SW_CPU_RST" diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c index 6bcea9f46e..790da9bc15 100644 --- a/components/spi_flash/test/test_esp_flash.c +++ b/components/spi_flash/test/test_esp_flash.c @@ -32,8 +32,8 @@ #include "esp32s3/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" #endif diff --git a/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_drv.c b/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_drv.c index 3032c1713f..230b115e6f 100644 --- a/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_drv.c +++ b/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_drv.c @@ -36,8 +36,8 @@ #include "esp32s3/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/cache.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/cache.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/cache.h" #endif diff --git a/components/spi_flash/test_apps/flash_mmap/README.md b/components/spi_flash/test_apps/flash_mmap/README.md index 284564238d..b5be4985c5 100644 --- a/components/spi_flash/test_apps/flash_mmap/README.md +++ b/components/spi_flash/test_apps/flash_mmap/README.md @@ -1,2 +1,2 @@ | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | \ No newline at end of file +| ----------------- | ----- | -------- | -------- | -------- | -------- | diff --git a/components/wpa_supplicant/src/utils/includes.h b/components/wpa_supplicant/src/utils/includes.h index f9c4c41599..cba08b3bae 100644 --- a/components/wpa_supplicant/src/utils/includes.h +++ b/components/wpa_supplicant/src/utils/includes.h @@ -69,8 +69,8 @@ #include "esp32c3/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/ets_sys.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/ets_sys.h" +#elif CONFIG_IDF_TARGET_ESP32H4 +#include "esp32h4/rom/ets_sys.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/ets_sys.h" #endif diff --git a/conftest.py b/conftest.py index f3cabb6d5f..07fdf1333b 100644 --- a/conftest.py +++ b/conftest.py @@ -48,7 +48,7 @@ except ImportError: SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3', 'esp32c2'] -PREVIEW_TARGETS = ['esp32h2', 'esp32c6'] # this PREVIEW_TARGETS excludes 'linux' target +PREVIEW_TARGETS = ['esp32h4', 'esp32c6'] # this PREVIEW_TARGETS excludes 'linux' target DEFAULT_SDKCONFIG = 'default' diff --git a/docs/doxygen/Doxyfile_esp32h2 b/docs/doxygen/Doxyfile_esp32h4 similarity index 100% rename from docs/doxygen/Doxyfile_esp32h2 rename to docs/doxygen/Doxyfile_esp32h4 diff --git a/docs/en/api-guides/openthread.rst b/docs/en/api-guides/openthread.rst index 4b0d5b354c..85c35c8dc3 100644 --- a/docs/en/api-guides/openthread.rst +++ b/docs/en/api-guides/openthread.rst @@ -11,12 +11,12 @@ OpenThread can run under the following modes on Espressif chips: Standalone node +++++++++++++++ -The full OpenThread stack and the application layer runs on the same chip. This mode is available on chips with 15.4 radio such as ESP32-H2. +The full OpenThread stack and the application layer runs on the same chip. This mode is available on chips with 15.4 radio such as ESP32-H4. Radio Co-Processor (RCP) ++++++++++++++++++++++++ -The chip will be connected to another host running the OpenThread IP stack. It will send and received 15.4 packets on behalf of the host. This mode is available on chips with 15.4 radio such as ESP32-H2. The underlying transport between the chip and the host can be SPI or UART. For sake of latency, we recommend to use SPI as the underlying transport. +The chip will be connected to another host running the OpenThread IP stack. It will send and received 15.4 packets on behalf of the host. This mode is available on chips with 15.4 radio such as ESP32-H4. The underlying transport between the chip and the host can be SPI or UART. For sake of latency, we recommend to use SPI as the underlying transport. OpenThread host +++++++++++++++ @@ -38,8 +38,8 @@ For chips without 15.4 radio, it can be connected to an RCP and run OpenThread u # node labels HOST_NODE [label="OpenThread \nhost\n(ESP32)", fontsize=14]; - RCP [label="Radio \nCo-Processor\n(ESP32-H2)", fontsize=14]; - STANDALONE [label="Standalone \nnode\n (ESP32-H2)", fontsize=14]; + RCP [label="Radio \nCo-Processor\n(ESP32-H4)", fontsize=14]; + STANDALONE [label="Standalone \nnode\n (ESP32-H4)", fontsize=14]; # node connections + labels RCP -> STANDALONE [label="15.4 radio", dir=both, style=dashed]; diff --git a/docs/en/api-guides/tools/idf-clang-tidy.rst b/docs/en/api-guides/tools/idf-clang-tidy.rst index 009e4769e1..ef43e1a98c 100644 --- a/docs/en/api-guides/tools/idf-clang-tidy.rst +++ b/docs/en/api-guides/tools/idf-clang-tidy.rst @@ -8,10 +8,10 @@ The IDF Clang Tidy is a tool that uses `clang-tidy bit_count)* can be used to burn "soft JTAG disable" bits on {IDF_TARGET_NAME}. diff --git a/docs/en/api-reference/peripherals/i2c.rst b/docs/en/api-reference/peripherals/i2c.rst index 0729a4eee8..f46559b9ff 100644 --- a/docs/en/api-reference/peripherals/i2c.rst +++ b/docs/en/api-reference/peripherals/i2c.rst @@ -3,7 +3,7 @@ Inter-Integrated Circuit (I2C) :link_to_translation:`zh_CN:[中文]` -{IDF_TARGET_I2C_NUM:default="2", esp32c3="1", esp32h2="1", esp32c2="1"} +{IDF_TARGET_I2C_NUM:default="2", esp32c3="1", esp32h4="1", esp32c2="1"} Overview -------- diff --git a/docs/en/api-reference/peripherals/i2s.rst b/docs/en/api-reference/peripherals/i2s.rst index 3a065e3a10..25d8b88ea2 100644 --- a/docs/en/api-reference/peripherals/i2s.rst +++ b/docs/en/api-reference/peripherals/i2s.rst @@ -70,11 +70,11 @@ Clock Source - :cpp:enumerator:`i2s_clock_src_t::I2S_CLK_SRC_DEFAULT`: Default PLL clock. -.. only:: not esp32h2 +.. only:: not esp32h4 - :cpp:enumerator:`i2s_clock_src_t::I2S_CLK_SRC_PLL_160M`: 160 MHz PLL clock. -.. only:: esp32h2 +.. only:: esp32h4 - :cpp:enumerator:`i2s_clock_src_t::I2S_CLK_SRC_PLL_96M`: 96 MHz PLL clock. diff --git a/docs/en/api-reference/peripherals/ledc.rst b/docs/en/api-reference/peripherals/ledc.rst index e4ddb1ff18..f18d4ca16b 100644 --- a/docs/en/api-reference/peripherals/ledc.rst +++ b/docs/en/api-reference/peripherals/ledc.rst @@ -1,6 +1,6 @@ LED Control (LEDC) ================== -{IDF_TARGET_LEDC_CHAN_NUM:default="8", esp32="16", esp32s2="8", esp32c3="6", esp32s3="8", esp32c2="6", esp32h2="6"} +{IDF_TARGET_LEDC_CHAN_NUM:default="8", esp32="16", esp32s2="8", esp32c3="6", esp32s3="8", esp32c2="6", esp32h4="6"} :link_to_translation:`zh_CN:[中文]` @@ -146,7 +146,7 @@ The source clock can also limit the PWM frequency. The higher the source clock f - 40 MHz - Dynamic Frequency Scaling compatible -.. only:: esp32h2 +.. only:: esp32h4 .. list-table:: Characteristics of {IDF_TARGET_NAME} LEDC source clocks :widths: 15 15 30 @@ -167,11 +167,11 @@ The source clock can also limit the PWM frequency. The higher the source clock f .. note:: - .. only:: not esp32h2 + .. only:: not esp32h4 1. On {IDF_TARGET_NAME}, if RTCxM_CLK is chosen as the LEDC clock source, an internal calibration will be performed to get the exact frequency of the clock. This ensures the accuracy of output PWM signal frequency. - .. only:: esp32h2 + .. only:: esp32h4 1. On {IDF_TARGET_NAME}, if RTC8M_CLK is chosen as the LEDC clock source, you may see the frequency of output PWM signal is not very accurate. This is because no internal calibration is performed to get the exact frequency of the clock due to hardware limitation, a theoretic frequency value is used. diff --git a/docs/en/migration-guides/release-5.x/5.0/removed-components.rst b/docs/en/migration-guides/release-5.x/5.0/removed-components.rst index 7ba898ab4b..5b587a4c00 100644 --- a/docs/en/migration-guides/release-5.x/5.0/removed-components.rst +++ b/docs/en/migration-guides/release-5.x/5.0/removed-components.rst @@ -57,4 +57,4 @@ The targets components are no longer necessary after refactoring and have been r * ``esp32s3`` * ``esp32c2`` * ``esp32c3`` - * ``esp32h2`` + * ``esp32h4`` diff --git a/docs/zh_CN/api-reference/peripherals/i2c.rst b/docs/zh_CN/api-reference/peripherals/i2c.rst index f85057a459..699f1df0ec 100644 --- a/docs/zh_CN/api-reference/peripherals/i2c.rst +++ b/docs/zh_CN/api-reference/peripherals/i2c.rst @@ -3,7 +3,7 @@ I2C 驱动程序 :link_to_translation:`en:[English]` -{IDF_TARGET_I2C_NUM:default="2", esp32c3="1", esp32h2="1", esp32c2="1"} +{IDF_TARGET_I2C_NUM:default="2", esp32c3="1", esp32h4="1", esp32c2="1"} 概述 --------- diff --git a/docs/zh_CN/api-reference/peripherals/ledc.rst b/docs/zh_CN/api-reference/peripherals/ledc.rst index 6957abcfff..37dd0c7a68 100644 --- a/docs/zh_CN/api-reference/peripherals/ledc.rst +++ b/docs/zh_CN/api-reference/peripherals/ledc.rst @@ -1,6 +1,6 @@ LED PWM 控制器 ============== -{IDF_TARGET_LEDC_CHAN_NUM:default="8", esp32="16", esp32s2="8", esp32c3="6", esp32s3="8", esp32c2="6", esp32h2="6"} +{IDF_TARGET_LEDC_CHAN_NUM:default="8", esp32="16", esp32s2="8", esp32c3="6", esp32s3="8", esp32c2="6", esp32h4="6"} :link_to_translation:`en:[English]` @@ -146,7 +146,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实 - 40 MHz - 支持动态调频（DFS）功能 -.. only:: esp32h2 +.. only:: esp32h4 .. list-table:: {IDF_TARGET_NAME} LEDC 时钟源特性 :widths: 10 10 30 @@ -167,11 +167,11 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实 .. note:: - .. only:: not esp32h2 + .. only:: not esp32h4 1. 如果 {IDF_TARGET_NAME} 的定时器选用了RTCxM_CLK作为其时钟源，驱动会通过内部校准来得知这个时钟源的实际频率。这样确保了输出PWM信号频率的精准性。 - .. only:: esp32h2 + .. only:: esp32h4 1. 如果 {IDF_TARGET_NAME} 的定时器选用了RTC8M_CLK作为其时钟源，LEDC的输出PWM信号频率可能会与设定值有一定偏差。由于{IDF_TARGET_NAME} 的硬件限制，驱动无法通过内部校准得知这个时钟源的实际频率。因此驱动默认使用其理论频率进行计算。 diff --git a/docs/zh_CN/migration-guides/release-5.x/5.0/removed-components.rst b/docs/zh_CN/migration-guides/release-5.x/5.0/removed-components.rst index 12c4370fa2..9e3d103e8c 100644 --- a/docs/zh_CN/migration-guides/release-5.x/5.0/removed-components.rst +++ b/docs/zh_CN/migration-guides/release-5.x/5.0/removed-components.rst @@ -57,4 +57,4 @@ IDF v4.x 版本中已不再使用以下组件，这些组件已弃用： * ``esp32s3`` * ``esp32c2`` * ``esp32c3`` - * ``esp32h2`` + * ``esp32h4`` diff --git a/examples/bluetooth/.build-test-rules.yml b/examples/bluetooth/.build-test-rules.yml index 7cb1e0ad57..7f8efc96fe 100644 --- a/examples/bluetooth/.build-test-rules.yml +++ b/examples/bluetooth/.build-test-rules.yml @@ -2,13 +2,13 @@ examples/bluetooth/bluedroid/ble: enable: - - if: IDF_TARGET in ["esp32", "esp32c2", "esp32c3", "esp32h2", "esp32s3"] + - if: IDF_TARGET in ["esp32", "esp32c2", "esp32c3", "esp32h4", "esp32s3"] temporary: true reason: the other targets are not tested yet examples/bluetooth/bluedroid/ble_50: enable: - - if: IDF_TARGET in ["esp32c2", "esp32c3", "esp32h2", "esp32s3"] + - if: IDF_TARGET in ["esp32c2", "esp32c3", "esp32h4", "esp32s3"] temporary: true reason: the other targets are not tested yet diff --git a/examples/bluetooth/bluedroid/ble/ble_ancs/README.md b/examples/bluetooth/bluedroid/ble/ble_ancs/README.md index 051cc75707..195e8b3c13 100644 --- a/examples/bluetooth/bluedroid/ble/ble_ancs/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_ancs/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF BLE ANCS Example @@ -28,7 +28,7 @@ All these characteristics require authorization for access. ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-H2/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-H4/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32h4 similarity index 91% rename from examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32h4 index 83de2a5d14..f72ed64fd0 100644 --- a/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y # CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y diff --git a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/README.md b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/README.md index b8e1f3354f..98ac176134 100644 --- a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF BLE Compatibility Test Example @@ -23,7 +23,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32h4 similarity index 93% rename from examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32h4 index dccee93c67..54a1d267df 100644 --- a/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y # CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y diff --git a/examples/bluetooth/bluedroid/ble/ble_eddystone/README.md b/examples/bluetooth/bluedroid/ble/ble_eddystone/README.md index 8bcb3a1b02..e142dbf1e7 100644 --- a/examples/bluetooth/bluedroid/ble/ble_eddystone/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_eddystone/README.md @@ -1,11 +1,11 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Eddystone Example This example demonstrates Eddystone-compatible BLE scanning of eddystone frame, including UID and URL. -Eddystone is an open beacon protocol specification from Google aimed at improving “proximity-based experiences” +Eddystone is an open beacon protocol specification from Google aimed at improving “proximity-based experiences” with support for both Android and iOS smart device platforms. Learn more on [Beacons](https://developers.google.com/nearby/notifications/get-started) and [Eddystone](https://github.com/google/eddystone). @@ -20,7 +20,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-H2/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-H4/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -44,23 +44,23 @@ I (595) phy_init: phy_version 4670,719f9f6,Feb 18 2021,17:07:07 I (995) EDDYSTONE_DEMO: Register callback I (1005) EDDYSTONE_DEMO: Start scanning... I (18135) EDDYSTONE_DEMO: --------Eddystone Found---------- -I (18145) EDDYSTONE_DEMO: Device address:: 55 5d 3b ea 11 88 +I (18145) EDDYSTONE_DEMO: Device address:: 55 5d 3b ea 11 88 I (18145) EDDYSTONE_DEMO: RSSI of packet:-46 dbm I (18145) EDDYSTONE_DEMO: Eddystone UID inform: I (18155) EDDYSTONE_DEMO: Measured power(RSSI at 0m distance):-65 dbm I (18155) EDDYSTONE_DEMO: EDDYSTONE_DEMO: Namespace ID:0x -I (18165) EDDYSTONE_DEMO: 6e a8 0f c9 3b 13 8e 6d 91 78 +I (18165) EDDYSTONE_DEMO: 6e a8 0f c9 3b 13 8e 6d 91 78 I (18175) EDDYSTONE_DEMO: EDDYSTONE_DEMO: Instance ID:0x -I (18175) EDDYSTONE_DEMO: 01 01 01 00 00 00 +I (18175) EDDYSTONE_DEMO: 01 01 01 00 00 00 I (18275) EDDYSTONE_DEMO: --------Eddystone Found---------- -I (18275) EDDYSTONE_DEMO: Device address:: 55 5d 3b ea 11 88 +I (18275) EDDYSTONE_DEMO: Device address:: 55 5d 3b ea 11 88 I (18275) EDDYSTONE_DEMO: RSSI of packet:-46 dbm I (18285) EDDYSTONE_DEMO: Eddystone UID inform: I (18285) EDDYSTONE_DEMO: Measured power(RSSI at 0m distance):-65 dbm I (18295) EDDYSTONE_DEMO: EDDYSTONE_DEMO: Namespace ID:0x -I (18295) EDDYSTONE_DEMO: 6e a8 0f c9 3b 13 8e 6d 91 78 +I (18295) EDDYSTONE_DEMO: 6e a8 0f c9 3b 13 8e 6d 91 78 I (18305) EDDYSTONE_DEMO: EDDYSTONE_DEMO: Instance ID:0x -I (18315) EDDYSTONE_DEMO: 01 01 01 00 00 00 +I (18315) EDDYSTONE_DEMO: 01 01 01 00 00 00 ``` ## Troubleshooting diff --git a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32h4 similarity index 93% rename from examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32h4 index dccee93c67..54a1d267df 100644 --- a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y # CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y diff --git a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/README.md b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/README.md index 6fe4e83f61..3121237800 100644 --- a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF BLE HID Example @@ -11,7 +11,7 @@ This example implement a BLE HID device profile related functions, in which the 4. Vendor devices Users can choose different reports according to their own application scenarios. -BLE HID profile inheritance and USB HID class. +BLE HID profile inheritance and USB HID class. ## How to Use Example @@ -23,7 +23,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-H2/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-H4/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -31,7 +31,7 @@ See [Development Boards](https://www.espressif.com/en/products/devkits) for more ### Configure the Project * `ble_hidd_demo_main.c` -This file is the demo to show how to used the HID(you can used it to connected to the smart phone act as the consumer device then can used the button to +This file is the demo to show how to used the HID(you can used it to connected to the smart phone act as the consumer device then can used the button to volume++ or volume-- etc., or connected to the Windows 10 PC act as a keyboard or mouse) * `hidd_le_prf_int.h` @@ -45,8 +45,8 @@ When you used the HID profile, you just need to added the esp_hidd_prf_api.h inc These file define the HID spec related definitions * `hid_device_le_prf.c` -This file is the HID profile definition file, it include the main function of the HID profile. -It mainly includes how to create HID service. If you send and receive HID data and convert the data to keyboard keys, +This file is the HID profile definition file, it include the main function of the HID profile. +It mainly includes how to create HID service. If you send and receive HID data and convert the data to keyboard keys, the mouse and consumer values are forwarded to the application. ### Build and Flash diff --git a/examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32h4 similarity index 93% rename from examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32h4 index dccee93c67..54a1d267df 100644 --- a/examples/bluetooth/bluedroid/ble/ble_eddystone/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y # CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y diff --git a/examples/bluetooth/bluedroid/ble/ble_ibeacon/README.md b/examples/bluetooth/bluedroid/ble/ble_ibeacon/README.md index 1581ec1e73..5547c100ee 100644 --- a/examples/bluetooth/bluedroid/ble/ble_ibeacon/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_ibeacon/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF iBeacon demo @@ -22,16 +22,16 @@ Before building devices which use iBeacon technology, visit [Apple iBeacon](http This example demonstrates iBeacon-compatible BLE advertising, and scanning of iBeacons: - **IBEACON_SENDER**: demo to send iBeacon-compatible advertising data. - + - **IBEACON_RECEIVER**: demo to receive and resolve iBeacon advertising data. -Which demo will be run depends on the menuconfig, developers can set it in `iBeacon Example Configuration`. +Which demo will be run depends on the menuconfig, developers can set it in `iBeacon Example Configuration`. The default mode is iBeacon Sender. ### Configure the project -Open the project configuration menu: +Open the project configuration menu: ```bash idf.py menuconfig diff --git a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32h4 similarity index 93% rename from examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32h4 index dccee93c67..54a1d267df 100644 --- a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y # CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_client/README.md b/examples/bluetooth/bluedroid/ble/ble_spp_client/README.md index 808b7addf9..265d0b5037 100644 --- a/examples/bluetooth/bluedroid/ble/ble_spp_client/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_spp_client/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF SPP GATT CLIENT demo @@ -41,7 +41,7 @@ idf.py set-target Queues: - * spp_uart_queue - Uart data messages received from the Uart + * spp_uart_queue - Uart data messages received from the Uart * cmd_cmd_queue - commands received from the client * cmd_heartbeat_queue - heartbeat received, if supported @@ -55,13 +55,13 @@ idf.py set-target After the Uart received data, the data will be posted to Uart task. Then, in the UART_DATA event, the raw data may be retrieved. The max length is 120 bytes every time. If you run the ble spp demo with two ESP32 chips, the MTU size will be exchanged for 200 bytes after the ble connection is established, so every packet can be send directly. - If you only run the ble_spp_server demo, and it was connected by a phone, the MTU size may be less than 123 bytes. In such a case the data will be split into fragments and send in turn. + If you only run the ble_spp_server demo, and it was connected by a phone, the MTU size may be less than 123 bytes. In such a case the data will be split into fragments and send in turn. In every packet, we add 4 bytes to indicate that this is a fragment packet. The first two bytes contain "##" if this is a fragment packet, the third byte is the total number of the packets, the fourth byte is the current number of this packet. The phone APP need to check the structure of the packet if it want to communicate with the ble_spp_server demo. - + ### Sending Data Wirelessly - The client will be sending WriteNoRsp packets to the server. The server side sends data through notifications. When the Uart receives data, the Uart task places it in the buffer. If the size of the data is larger than (MTU size - 3), the data will be split into packets and send in turn. + The client will be sending WriteNoRsp packets to the server. The server side sends data through notifications. When the Uart receives data, the Uart task places it in the buffer. If the size of the data is larger than (MTU size - 3), the data will be split into packets and send in turn. ### Receiving Data Wirelessly @@ -77,13 +77,13 @@ idf.py set-target ### GATT Server Attribute Table - charactertistic|UUID|Permissions - :-:|:-:|:-: - SPP_DATA_RECV_CHAR|0xABF1|READ&WRITE_NR - SPP_DATA_NOTIFY_CHAR|0xABF2|READ&NOTIFY - SPP_COMMAND_CHAR|0xABF3|READ&WRITE_NR - SPP_STATUS_CHAR|0xABF4|READ & NOTIFY - SPP_HEARTBEAT_CHAR|0xABF5|READ&WRITE_NR&NOTIFY + charactertistic|UUID|Permissions + :-:|:-:|:-: + SPP_DATA_RECV_CHAR|0xABF1|READ&WRITE_NR + SPP_DATA_NOTIFY_CHAR|0xABF2|READ&NOTIFY + SPP_COMMAND_CHAR|0xABF3|READ&WRITE_NR + SPP_STATUS_CHAR|0xABF4|READ & NOTIFY + SPP_HEARTBEAT_CHAR|0xABF5|READ&WRITE_NR&NOTIFY ### Build and Flash @@ -95,14 +95,14 @@ See the [Getting Started Guide](https://idf.espressif.com/) for full steps to co ## Example Output -The spp cilent will auto connect to the spp server, do service search, exchange MTU size and register notification. +The spp cilent will auto connect to the spp server, do service search, exchange MTU size and register notification. ### Client ``` I (2894) GATTC_SPP_DEMO: ESP_GATTC_CONNECT_EVT: conn_id=0, gatt_if = 3 I (2894) GATTC_SPP_DEMO: REMOTE BDA: -I (2904) GATTC_SPP_DEMO: 00 00 00 00 00 00 +I (2904) GATTC_SPP_DEMO: 00 00 00 00 00 00 I (2904) GATTC_SPP_DEMO: EVT 2, gattc if 3 I (3414) GATTC_SPP_DEMO: EVT 7, gattc if 3 I (3414) GATTC_SPP_DEMO: ESP_GATTC_SEARCH_RES_EVT: start_handle = 40, end_handle = 65535, UUID:0xabf0 @@ -118,16 +118,16 @@ I (3494) GATTC_SPP_DEMO: attr_type = DESCRIPTOR,attribute_handle=45,start_handle I (3504) GATTC_SPP_DEMO: attr_type = CHARACTERISTIC,attribute_handle=47,start_handle=0,end_handle=0,properties=0x6,uuid=0xabf3 I (3524) GATTC_SPP_DEMO: attr_type = CHARACTERISTIC,attribute_handle=49,start_handle=0,end_handle=0,properties=0x12,uuid=0xabf4 I (3534) GATTC_SPP_DEMO: attr_type = DESCRIPTOR,attribute_handle=50,start_handle=0,end_handle=0,properties=0x0,uuid=0x2902 -I (3544) GATTC_SPP_DEMO: Index = 2,UUID = 0xabf2, handle = 44 +I (3544) GATTC_SPP_DEMO: Index = 2,UUID = 0xabf2, handle = 44 I (3554) GATTC_SPP_DEMO: EVT 38, gattc if 3 I (3554) GATTC_SPP_DEMO: Index = 2,status = 0,handle = 44 I (3594) GATTC_SPP_DEMO: EVT 9, gattc if 3 -I (3594) GATTC_SPP_DEMO: ESP_GATTC_WRITE_DESCR_EVT: status =0,handle = 45 -I (3654) GATTC_SPP_DEMO: Index = 5,UUID = 0xabf4, handle = 49 +I (3594) GATTC_SPP_DEMO: ESP_GATTC_WRITE_DESCR_EVT: status =0,handle = 45 +I (3654) GATTC_SPP_DEMO: Index = 5,UUID = 0xabf4, handle = 49 I (3654) GATTC_SPP_DEMO: EVT 38, gattc if 3 I (3654) GATTC_SPP_DEMO: Index = 5,status = 0,handle = 49 I (3684) GATTC_SPP_DEMO: EVT 9, gattc if 3 -I (3684) GATTC_SPP_DEMO: ESP_GATTC_WRITE_DESCR_EVT: status =0,handle = 50 +I (3684) GATTC_SPP_DEMO: ESP_GATTC_WRITE_DESCR_EVT: status =0,handle = 50 I (16904) GATTC_SPP_DEMO: EVT 10, gattc if 3 I (16904) GATTC_SPP_DEMO: ESP_GATTC_NOTIFY_EVT I (16904) GATTC_SPP_DEMO: +NOTIFY:handle = 44,length = 22 diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_server/README.md b/examples/bluetooth/bluedroid/ble/ble_spp_server/README.md index aacb0b0834..440406033a 100644 --- a/examples/bluetooth/bluedroid/ble/ble_spp_server/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_spp_server/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | ## ESP-IDF GATT SERVER SPP Example @@ -15,7 +15,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-S3/ESP32-C2/ESP32-H2 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-S3/ESP32-C2/ESP32-H4 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/README.md b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/README.md index 6e8bfd5cd6..07395a3af8 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/README.md @@ -1,9 +1,9 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF BLE throughput GATT CLIENT Test -This is the demo used to test the BLE throughput, this demo should used with throughput server demo together. +This is the demo used to test the BLE throughput, this demo should used with throughput server demo together. The throughput of BLE can up to 720-767 Kbps between to ESP32 board. ## How to Use Example @@ -18,7 +18,7 @@ To configure the project, you can follow these steps: 1. In order to maximize throughput, we need to set the uart print baud rate at `921600` or more: Go to: `idf.py menuconfig --> Component config --> ESP32-specific --> UART console baud rate` and set to `921600` or `1500000` and don't print too much log. -2. We can only test notify or write throughput at the same time, this demo default to test the notify throughput, if want to test the write throughput, +2. We can only test notify or write throughput at the same time, this demo default to test the notify throughput, if want to test the write throughput, please set: `idf.py menuconfig --> Component config --> Example 'GATT CLIENT THROUGHPUT' Config --->` then select the `test the gattc write throughput` option. 3. This demo only test unidirectional throughput, if you want to test the bidirectional throughput please change the demo by yourself. 4. Should change the CPU frequency to 160 MHZ or 240 MHz in the `idf.py menuconfig` and `Component config ---> ESP32-specific ---> CPU frequency (240 MHz or 160 MHz)`. @@ -27,7 +27,7 @@ please set: `idf.py menuconfig --> Component config --> Example 'GATT CLIENT THR ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -43,11 +43,11 @@ See the [Getting Started Guide](https://idf.espressif.com/) for full steps to co ## Example Output ``` -I (6061) GATTC_DEMO: fc f5 c4 3c 5e ca +I (6061) GATTC_DEMO: fc f5 c4 3c 5e ca I (6061) GATTC_DEMO: searched Adv Data Len 29, Scan Response Len 29 I (6061) GATTC_DEMO: searched Device Name Len 15 I (6061) GATTC_DEMO: THROUGHPUT_DEMO -I (6071) GATTC_DEMO: +I (6071) GATTC_DEMO: I (6071) GATTC_DEMO: searched device THROUGHPUT_DEMO @@ -57,7 +57,7 @@ E (6081) BT_BTM: BTM_BleConfigConnParams I (6091) GATTC_DEMO: stop scan successfully I (6361) GATTC_DEMO: ESP_GATTC_CONNECT_EVT conn_id 0, if 1 I (6361) GATTC_DEMO: REMOTE BDA: -I (6361) GATTC_DEMO: fc f5 c4 3c 5e ca +I (6361) GATTC_DEMO: fc f5 c4 3c 5e ca I (6361) GATTC_DEMO: open success I (6921) GATTC_DEMO: Notify Bit rate = 0 Byte/s, = 0 bit/s I (7671) GATTC_DEMO: ESP_GATTC_CFG_MTU_EVT, Status 0, MTU 517, conn_id 0 @@ -66,7 +66,7 @@ I (7671) GATTC_DEMO: service found I (7681) GATTC_DEMO: UUID16: ff I (7681) GATTC_DEMO: ESP_GATTC_SEARCH_CMPL_EVT I (7691) GATTC_DEMO: ESP_GATTC_REG_FOR_NOTIFY_EVT -I (7831) GATTC_DEMO: write descr success +I (7831) GATTC_DEMO: write descr success I (8921) GATTC_DEMO: Notify Bit rate = 87534 Byte/s, = 700272 bit/s, time = 1s I (10921) GATTC_DEMO: Notify Bit rate = 82174 Byte/s, = 657392 bit/s, time = 3s I (12921) GATTC_DEMO: Notify Bit rate = 81480 Byte/s, = 651840 bit/s, time = 5s diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32h4 similarity index 93% rename from examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32h4 index 49f1e3137b..7d8140e76d 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_GATTC_WRITE_THROUGHPUT=y CONFIG_BT_ENABLED=y # CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md index bf4dd1c025..296ec1c2ee 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md @@ -1,9 +1,9 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF BLE throughput GATT SERVER Test -This is the demo used to test the BLE throughput, this demo should used with throughput client demo together. +This is the demo used to test the BLE throughput, this demo should used with throughput client demo together. The throughput of BLE can up to 720-767 Kbps between to ESP32 board. ## How to Use Example @@ -17,7 +17,7 @@ To configure the project, you can follow these steps: 1. In order to maximize throughput, we need to set the uart print baud rate at `921600` or more: Go to: `idf.py menuconfig --> Component config --> ESP32-specific --> UART console baud rate` and set to `921600` or `1500000` and don't print too much log. -2. We can only test notify or write throughput at the same time, this demo default to test the notify throughput, if want to test the write throughput, +2. We can only test notify or write throughput at the same time, this demo default to test the notify throughput, if want to test the write throughput, please set: `idf.py menuconfig --> Component config --> Example 'GATT CLIENT THROUGHPUT' Config --->` then select the `test the gattc write throughput` option. 3. This demo only test unidirectional throughput, if you want to test the bidirectional throughput please change the demo by yourself. 4. Should change the CPU frequency to 160 MHz or 240 MHz in the `idf.py menuconfig` and `Component config ---> ESP32-specific ---> CPU frequency (240 MHz or 160 MHz)`. @@ -26,7 +26,7 @@ please set: `idf.py menuconfig --> Component config --> Example 'GATT CLIENT THR ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -71,7 +71,7 @@ I (6258) GATTS_DEMO: ESP_GATTS_CONNECT_EVT, conn_id 0, remote ac:67:b2:6d:4e:22: I (7538) GATTS_DEMO: ESP_GATTS_MTU_EVT, MTU 517 I (7698) GATTS_DEMO: GATT_WRITE_EVT, conn_id 0, trans_id 2, handle 43 I (7698) GATTS_DEMO: GATT_WRITE_EVT, value len 2, value : -I (7698) GATTS_DEMO: 01 00 +I (7698) GATTS_DEMO: 01 00 I (7698) GATTS_DEMO: notify enable I (7708) GATTS_DEMO: ESP_GATTS_CONF_EVT, status 0 I (7718) GATTS_DEMO: ESP_GATTS_CONF_EVT, status 0 diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32h4 similarity index 94% rename from examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32h4 index 9fbce16d1a..2a6f2cfb0a 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y CONFIG_EXAMPLE_SET_RAW_ADV_DATA=y CONFIG_EXAMPLE_GATTS_NOTIFY_THROUGHPUT=y diff --git a/examples/bluetooth/bluedroid/ble/gatt_client/README.md b/examples/bluetooth/bluedroid/ble/gatt_client/README.md index 098d32bb03..0b41ac7250 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_client/README.md +++ b/examples/bluetooth/bluedroid/ble/gatt_client/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Client Example @@ -21,7 +21,7 @@ Please, check this [tutorial](tutorial/Gatt_Client_Example_Walkthrough.md) for m ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-H2/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-H4/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -91,24 +91,24 @@ I (525) system_api: read default base MAC address from EFUSE I (535) phy_init: phy_version 4670,719f9f6,Feb 18 2021,17:07:07 I (945) GATTC_DEMO: REG_EVT I (955) GATTC_DEMO: scan start success -I (1115) GATTC_DEMO: 08 ef 3b a7 04 41 +I (1115) GATTC_DEMO: 08 ef 3b a7 04 41 I (1115) GATTC_DEMO: searched Adv Data Len 9, Scan Response Len 15 I (1115) GATTC_DEMO: searched Device Name Len 13 I (1125) GATTC_DEMO: LG CM2760(41) -I (1125) GATTC_DEMO: +I (1125) GATTC_DEMO: -I (1425) GATTC_DEMO: 08 ef 3b a7 04 41 +I (1425) GATTC_DEMO: 08 ef 3b a7 04 41 I (1425) GATTC_DEMO: searched Adv Data Len 9, Scan Response Len 15 I (1425) GATTC_DEMO: searched Device Name Len 13 I (1435) GATTC_DEMO: LG CM2760(41) -I (1435) GATTC_DEMO: +I (1435) GATTC_DEMO: -I (1865) GATTC_DEMO: 38 68 a4 69 bb 7c +I (1865) GATTC_DEMO: 38 68 a4 69 bb 7c I (1865) GATTC_DEMO: searched Adv Data Len 31, Scan Response Len 14 I (1865) GATTC_DEMO: searched Device Name Len 0 -I (1875) GATTC_DEMO: +I (1875) GATTC_DEMO: -I (2185) GATTC_DEMO: 38 68 a4 69 bb 7c +I (2185) GATTC_DEMO: 38 68 a4 69 bb 7c I (2185) GATTC_DEMO: searched Adv Data Len 31, Scan Response Len 14 I (2185) GATTC_DEMO: searched Device Name Len 0 I (2185) GATTC_DEMO: diff --git a/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_client/README.md b/examples/bluetooth/bluedroid/ble/gatt_security_client/README.md index a65f2466fb..f20b78582a 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_security_client/README.md +++ b/examples/bluetooth/bluedroid/ble/gatt_security_client/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Security Client Example @@ -15,16 +15,16 @@ idf.py set-target To test this demo, you can run the [gatt_security_server_demo](../gatt_security_server), which starts advertising and can be connected to this demo automatically. -There are some important points for this demo: -1. `esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; -2. `esp_ble_set_encryption` should be used to start encryption with peer device. If the peer device initiates the encryption, `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. -3. The `gatt_security_client_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. +There are some important points for this demo: +1. `esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; +2. `esp_ble_set_encryption` should be used to start encryption with peer device. If the peer device initiates the encryption, `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. +3. The `gatt_security_client_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. Please, check this [tutorial](tutorial/Gatt_Security_Client_Example_Walkthrough.md) for more information about this example. ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -48,25 +48,25 @@ I (582) phy_init: phy_version 4670,719f9f6,Feb 18 2021,17:07:07 I (1002) SEC_GATTC_DEMO: EVT 0, gattc if 1 I (1002) SEC_GATTC_DEMO: REG_EVT I (1032) SEC_GATTC_DEMO: Scan start success -I (1242) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c +I (1242) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c I (1242) SEC_GATTC_DEMO: Searched Adv Data Len 31, Scan Response Len 14 I (1242) SEC_GATTC_DEMO: Searched Device Name Len 0 -I (1242) SEC_GATTC_DEMO: +I (1242) SEC_GATTC_DEMO: -I (1262) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c +I (1262) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c I (1262) SEC_GATTC_DEMO: Searched Adv Data Len 31, Scan Response Len 14 I (1262) SEC_GATTC_DEMO: Searched Device Name Len 0 -I (1272) SEC_GATTC_DEMO: +I (1272) SEC_GATTC_DEMO: -I (1592) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c +I (1592) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c I (1592) SEC_GATTC_DEMO: Searched Adv Data Len 31, Scan Response Len 14 I (1592) SEC_GATTC_DEMO: Searched Device Name Len 0 -I (1602) SEC_GATTC_DEMO: +I (1602) SEC_GATTC_DEMO: -I (1912) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c +I (1912) SEC_GATTC_DEMO: 38 68 a4 69 bb 7c I (1912) SEC_GATTC_DEMO: Searched Adv Data Len 31, Scan Response Len 14 I (1912) SEC_GATTC_DEMO: Searched Device Name Len 0 -I (1922) SEC_GATTC_DEMO: +I (1922) SEC_GATTC_DEMO: ``` diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_server/README.md b/examples/bluetooth/bluedroid/ble/gatt_security_server/README.md index 7a33ed10a1..3e328e7596 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_security_server/README.md +++ b/examples/bluetooth/bluedroid/ble/gatt_security_server/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Security Server Example @@ -16,14 +16,14 @@ Before project configuration and build, be sure to set the correct chip target u ```bash idf.py set-target ``` -There are some important points for this demo: -1.`esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; -2.`esp_ble_set_encryption` should be used to start encryption with peer device. If the peer device initiates the encryption, `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. -3.The `gatt_security_client_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. +There are some important points for this demo: +1.`esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; +2.`esp_ble_set_encryption` should be used to start encryption with peer device. If the peer device initiates the encryption, `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. +3.The `gatt_security_client_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 Soc (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP32-S3 Soc (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_server/README.md b/examples/bluetooth/bluedroid/ble/gatt_server/README.md index 45ce216b84..b78bb3f7a8 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_server/README.md +++ b/examples/bluetooth/bluedroid/ble/gatt_server/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Server Example @@ -7,7 +7,7 @@ This example shows how create a GATT service by adding attributes one by one. Ho Hence, we also allow users to create a GATT service with an attribute table, which releases the user from adding attributes one by one. And it is recommended for users to use. For more information about this method, please refer to [gatt_server_service_table_demo](../gatt_server_service_table). -This demo creates GATT a service and then starts advertising, waiting to be connected to a GATT client. +This demo creates GATT a service and then starts advertising, waiting to be connected to a GATT client. To test this demo, we can run the [gatt_client_demo](../gatt_client), which can scan for and connect to this demo automatically. They will start exchanging data once the GATT client has enabled the notification function of the GATT server. @@ -23,7 +23,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/README.md b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/README.md index 4e0f93e375..a409bf21f2 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/README.md +++ b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Server Service Table Example @@ -17,7 +17,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-H2/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-H4/ESP32-C2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/README.md b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/README.md index 4a012b472b..f4ef64abbc 100644 --- a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/README.md +++ b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/README.md @@ -1,9 +1,9 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Client Multi Connection Example -This example shows the usage of APIs to create a GATT multi-connection client. It can be used to connect to three GATT servers at the same time. +This example shows the usage of APIs to create a GATT multi-connection client. It can be used to connect to three GATT servers at the same time. To test this example, please run [gatt_server_demo](../gatt_server) to create three GATT server devices, namely ESP_GATTS_DEMO_a, ESP_GATTS_DEMO_b and ESP_GATTS_DEMO_c, `Gatt_client_multi_connection_demo` will connect to these three gatt server demos, and then exchange data. @@ -21,7 +21,7 @@ The code can be modified to connect to more devices (up to 4 devices by default) ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H4/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -46,34 +46,34 @@ I (932) GATTC_MULTIPLE_DEMO: REG_EVT I (932) GATTC_MULTIPLE_DEMO: REG_EVT I (932) GATTC_MULTIPLE_DEMO: REG_EVT I (942) GATTC_MULTIPLE_DEMO: Scan start success -I (1072) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c +I (1072) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c I (1072) GATTC_MULTIPLE_DEMO: Searched Adv Data Len 28, Scan Response Len 0 I (1072) GATTC_MULTIPLE_DEMO: Searched Device Name Len 0 -I (1082) GATTC_MULTIPLE_DEMO: +I (1082) GATTC_MULTIPLE_DEMO: -I (1102) GATTC_MULTIPLE_DEMO: 08 ef 3b a7 04 41 +I (1102) GATTC_MULTIPLE_DEMO: 08 ef 3b a7 04 41 I (1102) GATTC_MULTIPLE_DEMO: Searched Adv Data Len 9, Scan Response Len 15 I (1102) GATTC_MULTIPLE_DEMO: Searched Device Name Len 13 I (1112) GATTC_MULTIPLE_DEMO: LG CM2760(41) -I (1112) GATTC_MULTIPLE_DEMO: +I (1112) GATTC_MULTIPLE_DEMO: -I (1222) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c +I (1222) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c I (1222) GATTC_MULTIPLE_DEMO: Searched Adv Data Len 28, Scan Response Len 0 I (1222) GATTC_MULTIPLE_DEMO: Searched Device Name Len 0 -I (1232) GATTC_MULTIPLE_DEMO: +I (1232) GATTC_MULTIPLE_DEMO: -I (1372) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c +I (1372) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c I (1372) GATTC_MULTIPLE_DEMO: Searched Adv Data Len 28, Scan Response Len 0 I (1372) GATTC_MULTIPLE_DEMO: Searched Device Name Len 0 -I (1382) GATTC_MULTIPLE_DEMO: +I (1382) GATTC_MULTIPLE_DEMO: -I (1412) GATTC_MULTIPLE_DEMO: 08 ef 3b a7 04 41 +I (1412) GATTC_MULTIPLE_DEMO: 08 ef 3b a7 04 41 I (1412) GATTC_MULTIPLE_DEMO: Searched Adv Data Len 9, Scan Response Len 15 I (1422) GATTC_MULTIPLE_DEMO: Searched Device Name Len 13 I (1422) GATTC_MULTIPLE_DEMO: LG CM2760(41) -I (1432) GATTC_MULTIPLE_DEMO: +I (1432) GATTC_MULTIPLE_DEMO: -I (1522) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c +I (1522) GATTC_MULTIPLE_DEMO: 38 68 a4 69 bb 7c I (1522) GATTC_MULTIPLE_DEMO: Searched Adv Data Len 28, Scan Response Len 0 I (1522) GATTC_MULTIPLE_DEMO: Searched Device Name Len 0 I (1532) GATTC_MULTIPLE_DEMO: diff --git a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h2 deleted file mode 100644 index dccee93c67..0000000000 --- a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,10 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set -CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y -# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..54a1d267df --- /dev/null +++ b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32h4 @@ -0,0 +1,10 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +# CONFIG_BT_BLE_50_FEATURES_SUPPORTED is not set +CONFIG_BT_BLE_42_FEATURES_SUPPORTED=y +# CONFIG_BT_LE_50_FEATURE_SUPPORT is not set +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble_50/ble50_security_client/README.md b/examples/bluetooth/bluedroid/ble_50/ble50_security_client/README.md index 836015586e..ab783839c6 100644 --- a/examples/bluetooth/bluedroid/ble_50/ble50_security_client/README.md +++ b/examples/bluetooth/bluedroid/ble_50/ble50_security_client/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | -------- | -------- | -------- | -------- | # ESP-IDF Gatt Security Client Example @@ -16,17 +16,17 @@ idf.py set-target To test this demo, you can run the [ble50_security_server_demo](../ble50_security_server), which starts advertising and can be connected to this demo automatically. -There are some important points for this demo: -1. `esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; +There are some important points for this demo: +1. `esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; 2. `esp_ble_set_encryption` should be used to start encryption with peer device. If the peer device initiates the encryption, - `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. -3. The `gatt_security_client_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. + `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. +3. The `gatt_security_client_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. Please, check this [tutorial](tutorial/ble50_security_client_Example_Walkthrough.md) for more information about this example. ### Hardware Required -* A development board with ESP32-C3 SoC, ESP32-S3 SoC, ESP32-C2/ESP32-H2 SoC and BT5.0 supported chip (e.g., ESP32-C3-DevKitC-1 etc.) +* A development board with ESP32-C3 SoC, ESP32-S3 SoC, ESP32-C2/ESP32-H4 SoC and BT5.0 supported chip (e.g., ESP32-C3-DevKitC-1 etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32h4 similarity index 89% rename from examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32h4 index a0d8cb5924..7567c5ab84 100644 --- a/examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble_50/ble50_security_client/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y CONFIG_RTC_CLK_SRC_EXT_CRYS=y CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble_50/ble50_security_server/README.md b/examples/bluetooth/bluedroid/ble_50/ble50_security_server/README.md index a9a2b55cfb..20b106ef55 100644 --- a/examples/bluetooth/bluedroid/ble_50/ble50_security_server/README.md +++ b/examples/bluetooth/bluedroid/ble_50/ble50_security_server/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | -------- | -------- | -------- | -------- | # ESP-IDF BLE50 Security Server Example @@ -16,15 +16,15 @@ Before project configuration and build, be sure to set the correct chip target u ```bash idf.py set-target ``` -There are some important points for this demo: -1.`esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; +There are some important points for this demo: +1.`esp_ble_gap_set_security_param` should be used to set the security parameters in the initial stage; 2.`esp_ble_set_encryption` should be used to start encryption with peer device. If the peer device initiates the encryption, - `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. -3.The `ble50_sec_gattc_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. + `esp_ble_gap_security_rsp` should be used to send security response to the peer device when `ESP_GAP_BLE_SEC_REQ_EVT` is received. +3.The `ble50_sec_gattc_demo` will receive a `ESP_GAP_BLE_AUTH_CMPL_EVT` once the encryption procedure has completed. ### Hardware Required -* A development board with ESP32-C3 SoC, ESP32-S3, ESP32-C2/ESP32-H2 SoC and BLE5.0 supoorted chips. (e.g., ESP32-C3-DevKitC-1, etc.) +* A development board with ESP32-C3 SoC, ESP32-S3, ESP32-C2/ESP32-H4 SoC and BLE5.0 supoorted chips. (e.g., ESP32-C3-DevKitC-1, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32h4 similarity index 89% rename from examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32h4 index a0d8cb5924..7567c5ab84 100644 --- a/examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble_50/ble50_security_server/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y CONFIG_RTC_CLK_SRC_EXT_CRYS=y CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble_50/multi-adv/README.md b/examples/bluetooth/bluedroid/ble_50/multi-adv/README.md index a8f0ea6d3d..94946b4b62 100644 --- a/examples/bluetooth/bluedroid/ble_50/multi-adv/README.md +++ b/examples/bluetooth/bluedroid/ble_50/multi-adv/README.md @@ -17,7 +17,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32-C3 SoC,ESP32-S3/ESP32-H2/ESP32-C2 SoC and BLE5.0 supported chips (e.g., ESP32-C3-DevKitC, etc.) +* A development board with ESP32-C3 SoC,ESP32-S3/ESP32-H4/ESP32-C2 SoC and BLE5.0 supported chips (e.g., ESP32-C3-DevKitC, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32h4 similarity index 89% rename from examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32h4 index a0d8cb5924..7567c5ab84 100644 --- a/examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble_50/multi-adv/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y CONFIG_RTC_CLK_SRC_EXT_CRYS=y CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble_50/peroidic_adv/README.md b/examples/bluetooth/bluedroid/ble_50/peroidic_adv/README.md index 0edf32e398..04139559ea 100644 --- a/examples/bluetooth/bluedroid/ble_50/peroidic_adv/README.md +++ b/examples/bluetooth/bluedroid/ble_50/peroidic_adv/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | -------- | -------- | -------- | -------- | # ESP_IDF Periodic Adv Example @@ -21,7 +21,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32-C3 SoC, ESP32-S3, ESP32-C2, ESP32-H2 and BLE5.0 supported chips (e.g., ESP32-C3-DevKitC-1, etc.) +* A development board with ESP32-C3 SoC, ESP32-S3, ESP32-C2, ESP32-H4 and BLE5.0 supported chips (e.g., ESP32-C3-DevKitC-1, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32h4 similarity index 89% rename from examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32h4 index a0d8cb5924..7567c5ab84 100644 --- a/examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/bluedroid/ble_50/peroidic_adv/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y CONFIG_RTC_CLK_SRC_EXT_CRYS=y CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble_50/peroidic_sync/README.md b/examples/bluetooth/bluedroid/ble_50/peroidic_sync/README.md index 2c74efc6ed..cc6fe7d13f 100644 --- a/examples/bluetooth/bluedroid/ble_50/peroidic_sync/README.md +++ b/examples/bluetooth/bluedroid/ble_50/peroidic_sync/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S3 | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S3 | | ----------------- | -------- | -------- | -------- | -------- | # ESP-IDF Periodic Sync Example @@ -19,7 +19,7 @@ idf.py set-target ### Hardware Required -* A development board with ESP32-C3 SoC, ESP32-S3, ESP32-C2, ESP32-H2 and BLE5.0 supported chips (e.g., ESP32-C3-DevKitC-1, etc.) +* A development board with ESP32-C3 SoC, ESP32-S3, ESP32-C2, ESP32-H4 and BLE5.0 supported chips (e.g., ESP32-C3-DevKitC-1, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. @@ -55,7 +55,7 @@ I (712) PERIODIC_SYNC: ESP_GAP_BLE_EXT_SCAN_START_COMPLETE_EVT, status 0 I (712) PERIODIC_SYNC: Start create sync with the peer device ESP_MULTI_ADV_80MS I (722) PERIODIC_SYNC: ESP_GAP_BLE_PERIODIC_ADV_CREATE_SYNC_COMPLETE_EVT, status 0 I (812) PERIODIC_SYNC: ESP_GAP_BLE_PERIODIC_ADV_SYNC_ESTAB_EVT, status 0 -I (812) sync addr: c0 de 52 00 00 02 +I (812) sync addr: c0 de 52 00 00 02 I (812) PERIODIC_SYNC: sync handle 1 sid 0 perioic adv interval 64 adv phy 2 I (812) PERIODIC_SYNC: periodic adv report, sync handle 1 data status 0 data len 28 rssi -48 I (892) PERIODIC_SYNC: periodic adv report, sync handle 1 data status 0 data len 28 rssi -47 diff --git a/examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h2 b/examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h2 deleted file mode 100644 index a0d8cb5924..0000000000 --- a/examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h2 +++ /dev/null @@ -1,7 +0,0 @@ -# This file was generated using idf.py save-defconfig. It can be edited manually. -# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration -# -CONFIG_IDF_TARGET="esp32h2" -CONFIG_BT_ENABLED=y -CONFIG_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h4 b/examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h4 new file mode 100644 index 0000000000..7567c5ab84 --- /dev/null +++ b/examples/bluetooth/bluedroid/ble_50/peroidic_sync/sdkconfig.defaults.esp32h4 @@ -0,0 +1,7 @@ +# This file was generated using idf.py save-defconfig. It can be edited manually. +# Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration +# +CONFIG_IDF_TARGET="esp32h4" +CONFIG_BT_ENABLED=y +CONFIG_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/esp_ble_mesh/ble_mesh_console/main/ble_mesh_console_main.c b/examples/bluetooth/esp_ble_mesh/ble_mesh_console/main/ble_mesh_console_main.c index bd99b2f4e9..d9a00d8492 100644 --- a/examples/bluetooth/esp_ble_mesh/ble_mesh_console/main/ble_mesh_console_main.c +++ b/examples/bluetooth/esp_ble_mesh/ble_mesh_console/main/ble_mesh_console_main.c @@ -62,8 +62,8 @@ void app_main(void) repl_config.prompt = "esp32c3>"; #elif CONFIG_IDF_TARGET_ESP32S3 repl_config.prompt = "esp32s3>"; -#elif CONFIG_IDF_TARGET_ESP32H2 - repl_config.prompt = "esp32h2>"; +#elif CONFIG_IDF_TARGET_ESP32H4 + repl_config.prompt = "esp32h4>"; #else repl_config.prompt = "esp32>"; #endif diff --git a/examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h2 b/examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h4 similarity index 72% rename from examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h4 index 2ce273ef32..1587bd33f2 100644 --- a/examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/nimble/blecent/sdkconfig.defaults.esp32h4 @@ -1,10 +1,10 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_ESPTOOLPY_FLASHMODE_QIO=y CONFIG_BT_ENABLED=y CONFIG_BT_NIMBLE_ENABLED=y CONFIG_BT_NIMBLE_EXT_ADV=y -CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES=576 +CONFIG_ESP32H4_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_ESP32H4_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/nimble/bleprph/sdkconfig.defaults.esp32h2 b/examples/bluetooth/nimble/bleprph/sdkconfig.defaults.esp32h4 similarity index 90% rename from examples/bluetooth/nimble/bleprph/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/nimble/bleprph/sdkconfig.defaults.esp32h4 index 808f00a80e..3e24e0e3cf 100644 --- a/examples/bluetooth/nimble/bleprph/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/nimble/bleprph/sdkconfig.defaults.esp32h4 @@ -1,7 +1,7 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_BT_ENABLED=y CONFIG_BT_NIMBLE_ENABLED=y CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE=70 diff --git a/examples/bluetooth/nimble/throughput_app/blecent_throughput/sdkconfig.defaults.esp32h2 b/examples/bluetooth/nimble/throughput_app/blecent_throughput/sdkconfig.defaults.esp32h4 similarity index 72% rename from examples/bluetooth/nimble/throughput_app/blecent_throughput/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/nimble/throughput_app/blecent_throughput/sdkconfig.defaults.esp32h4 index ffef8c983a..a6723d3f65 100644 --- a/examples/bluetooth/nimble/throughput_app/blecent_throughput/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/nimble/throughput_app/blecent_throughput/sdkconfig.defaults.esp32h4 @@ -1,10 +1,10 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_ESPTOOLPY_FLASHMODE_QIO=y CONFIG_BT_ENABLED=y CONFIG_BT_NIMBLE_ENABLED=y CONFIG_BT_NIMBLE_USE_ESP_TIMER=n -CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES=576 +CONFIG_ESP32H4_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_ESP32H4_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/bluetooth/nimble/throughput_app/bleprph_throughput/sdkconfig.defaults.esp32h2 b/examples/bluetooth/nimble/throughput_app/bleprph_throughput/sdkconfig.defaults.esp32h4 similarity index 72% rename from examples/bluetooth/nimble/throughput_app/bleprph_throughput/sdkconfig.defaults.esp32h2 rename to examples/bluetooth/nimble/throughput_app/bleprph_throughput/sdkconfig.defaults.esp32h4 index ffef8c983a..a6723d3f65 100644 --- a/examples/bluetooth/nimble/throughput_app/bleprph_throughput/sdkconfig.defaults.esp32h2 +++ b/examples/bluetooth/nimble/throughput_app/bleprph_throughput/sdkconfig.defaults.esp32h4 @@ -1,10 +1,10 @@ # This file was generated using idf.py save-defconfig. It can be edited manually. # Espressif IoT Development Framework (ESP-IDF) Project Minimal Configuration # -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" CONFIG_ESPTOOLPY_FLASHMODE_QIO=y CONFIG_BT_ENABLED=y CONFIG_BT_NIMBLE_ENABLED=y CONFIG_BT_NIMBLE_USE_ESP_TIMER=n -CONFIG_ESP32H2_RTC_CLK_SRC_EXT_CRYS=y -CONFIG_ESP32H2_RTC_CLK_CAL_CYCLES=576 +CONFIG_ESP32H4_RTC_CLK_SRC_EXT_CRYS=y +CONFIG_ESP32H4_RTC_CLK_CAL_CYCLES=576 diff --git a/examples/build_system/cmake/idf_as_lib/CMakeLists.txt b/examples/build_system/cmake/idf_as_lib/CMakeLists.txt index 5772df0e80..6914c4aee5 100644 --- a/examples/build_system/cmake/idf_as_lib/CMakeLists.txt +++ b/examples/build_system/cmake/idf_as_lib/CMakeLists.txt @@ -2,7 +2,7 @@ cmake_minimum_required(VERSION 3.16) project(idf_as_lib C) -set(targets "esp32" "esp32s2" "esp32s3" "esp32c3" "esp32h2" "esp32c2" "esp32c6") +set(targets "esp32" "esp32s2" "esp32s3" "esp32c3" "esp32h4" "esp32c2" "esp32c6") if("${TARGET}" IN_LIST targets) # Include for ESP-IDF build system functions diff --git a/examples/build_system/cmake/idf_as_lib/README.md b/examples/build_system/cmake/idf_as_lib/README.md index 0cc5619a9f..55283956eb 100644 --- a/examples/build_system/cmake/idf_as_lib/README.md +++ b/examples/build_system/cmake/idf_as_lib/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | # Using ESP-IDF in Custom CMake Projects diff --git a/examples/build_system/cmake/idf_as_lib/build-esp32h2.sh b/examples/build_system/cmake/idf_as_lib/build-esp32h4.sh similarity index 100% rename from examples/build_system/cmake/idf_as_lib/build-esp32h2.sh rename to examples/build_system/cmake/idf_as_lib/build-esp32h4.sh diff --git a/examples/build_system/cmake/idf_as_lib/run-esp32h2.sh b/examples/build_system/cmake/idf_as_lib/run-esp32h4.sh similarity index 100% rename from examples/build_system/cmake/idf_as_lib/run-esp32h2.sh rename to examples/build_system/cmake/idf_as_lib/run-esp32h4.sh diff --git a/examples/common_components/env_caps/esp32h2/Kconfig.env_caps b/examples/common_components/env_caps/esp32h4/Kconfig.env_caps similarity index 100% rename from examples/common_components/env_caps/esp32h2/Kconfig.env_caps rename to examples/common_components/env_caps/esp32h4/Kconfig.env_caps diff --git a/examples/get-started/.build-test-rules.yml b/examples/get-started/.build-test-rules.yml index 67e62c5001..fd8b4dcb38 100644 --- a/examples/get-started/.build-test-rules.yml +++ b/examples/get-started/.build-test-rules.yml @@ -2,4 +2,4 @@ examples/get-started/hello_world: enable: - - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h2", "esp32c6"] # preview targets + - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h4", "esp32c6"] # preview targets diff --git a/examples/get-started/blink/main/Kconfig.projbuild b/examples/get-started/blink/main/Kconfig.projbuild index 43be4f448b..a44262d117 100644 --- a/examples/get-started/blink/main/Kconfig.projbuild +++ b/examples/get-started/blink/main/Kconfig.projbuild @@ -18,7 +18,7 @@ menu "Example Configuration" config BLINK_GPIO int "Blink GPIO number" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX - default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H2 || IDF_TARGET_ESP32C2 + default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H4 || IDF_TARGET_ESP32C2 default 18 if IDF_TARGET_ESP32S2 default 48 if IDF_TARGET_ESP32S3 default 5 diff --git a/examples/get-started/hello_world/README.md b/examples/get-started/hello_world/README.md index b186a4e3d6..32e0f25eb0 100644 --- a/examples/get-started/hello_world/README.md +++ b/examples/get-started/hello_world/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | # Hello World Example @@ -9,7 +9,7 @@ Starts a FreeRTOS task to print "Hello World". ## How to use example -Follow detailed instructions provided specifically for this example. +Follow detailed instructions provided specifically for this example. Select the instructions depending on Espressif chip installed on your development board: @@ -21,7 +21,7 @@ Select the instructions depending on Espressif chip installed on your developmen The project **hello_world** contains one source file in C language [hello_world_main.c](main/hello_world_main.c). The file is located in folder [main](main). -ESP-IDF projects are built using CMake. The project build configuration is contained in `CMakeLists.txt` files that provide set of directives and instructions describing the project's source files and targets (executable, library, or both). +ESP-IDF projects are built using CMake. The project build configuration is contained in `CMakeLists.txt` files that provide set of directives and instructions describing the project's source files and targets (executable, library, or both). Below is short explanation of remaining files in the project folder. diff --git a/examples/openthread/.build-test-rules.yml b/examples/openthread/.build-test-rules.yml index 5c7d62ea9c..4d12dad671 100644 --- a/examples/openthread/.build-test-rules.yml +++ b/examples/openthread/.build-test-rules.yml @@ -12,10 +12,10 @@ examples/openthread/ot_br: examples/openthread/ot_cli: enable: - - if: IDF_TARGET == "esp32h2" - reason: only test on esp32h2 + - if: IDF_TARGET == "esp32h4" + reason: only test on esp32h4 examples/openthread/ot_rcp: enable: - - if: IDF_TARGET == "esp32h2" - reason: only test on esp32h2 + - if: IDF_TARGET == "esp32h4" + reason: only test on esp32h4 diff --git a/examples/openthread/README.md b/examples/openthread/README.md index 1c7728835e..ae0709fca7 100644 --- a/examples/openthread/README.md +++ b/examples/openthread/README.md @@ -6,8 +6,8 @@ See the [README.md](../README.md) file in the upper level [examples](../) direct In this folder, it contains following OpenThread examples: -* [ot_cli](ot_cli) is an OpenThread Command Line example, in addition to the features listed in [OpenThread CLI](https://github.com/openthread/openthread/blob/master/src/cli/README.md), it supports some additional features such as TCP, UDP and Iperf over lwIP. It runs on an 802.15.4 SoC like ESP32-H2. +* [ot_cli](ot_cli) is an OpenThread Command Line example, in addition to the features listed in [OpenThread CLI](https://github.com/openthread/openthread/blob/master/src/cli/README.md), it supports some additional features such as TCP, UDP and Iperf over lwIP. It runs on an 802.15.4 SoC like ESP32-H4. -* [ot_rcp](ot_rcp) is an [OpenThread RCP](https://openthread.io/platforms/co-processor) example. It runs on an 802.15.4 SoC like ESP32-H2, to extend 802.15.4 radio. +* [ot_rcp](ot_rcp) is an [OpenThread RCP](https://openthread.io/platforms/co-processor) example. It runs on an 802.15.4 SoC like ESP32-H4, to extend 802.15.4 radio. -* [ot_br](ot_br) is an [OpenThread Border Router](https://openthread.io/guides/border-router) example. It runs on a Wi-Fi SoC such as ESP32, ESP32-C3 and ESP32-S3. It needs an 802.15.4 SoC like ESP32-H2 running [ot_rcp](ot_rcp) example to provide 802.15.4 radio. +* [ot_br](ot_br) is an [OpenThread Border Router](https://openthread.io/guides/border-router) example. It runs on a Wi-Fi SoC such as ESP32, ESP32-C3 and ESP32-S3. It needs an 802.15.4 SoC like ESP32-H4 running [ot_rcp](ot_rcp) example to provide 802.15.4 radio. diff --git a/examples/openthread/ot_br/README.md b/examples/openthread/ot_br/README.md index 60b9e25605..7e07ddd856 100644 --- a/examples/openthread/ot_br/README.md +++ b/examples/openthread/ot_br/README.md @@ -13,13 +13,13 @@ This example demonstrates an [OpenThread border router](https://openthread.io/gu #### **Wi-Fi based Thread Border Router** The following SoCs are required to run this example: * An ESP32 series Wi-Fi SoC (ESP32, ESP32-C, ESP32-S, etc) loaded with this ot_br example. -* An ESP32-H2 802.15.4 SoC loaded with [ot_rcp](../ot_rcp) example. -* Another ESP32-H2 SoC loaded with [ot_cli](../ot_cli) example. +* An ESP32-H4 802.15.4 SoC loaded with [ot_rcp](../ot_rcp) example. +* Another ESP32-H4 SoC loaded with [ot_cli](../ot_cli) example. -Connect the two SoCs via UART, below is an example setup with ESP32 DevKitC and ESP32-H2 DevKitC: -![thread_br](image/thread-border-router-esp32-esp32h2.jpg) +Connect the two SoCs via UART, below is an example setup with ESP32 DevKitC and ESP32-H4 DevKitC: +![thread_br](image/thread-border-router-esp32-esp32h4.jpg) -ESP32 pin | ESP32-H2 pin +ESP32 pin | ESP32-H4 pin ----------|------------- GND | G GPIO4 | TX diff --git a/examples/openthread/ot_br/image/thread-border-router-esp32-esp32h2.jpg b/examples/openthread/ot_br/image/thread-border-router-esp32-esp32h4.jpg similarity index 100% rename from examples/openthread/ot_br/image/thread-border-router-esp32-esp32h2.jpg rename to examples/openthread/ot_br/image/thread-border-router-esp32-esp32h4.jpg diff --git a/examples/openthread/ot_cli/README.md b/examples/openthread/ot_cli/README.md index 3b2a8ce7f8..99a90e451c 100644 --- a/examples/openthread/ot_cli/README.md +++ b/examples/openthread/ot_cli/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32-H2 | +| Supported Targets | ESP32-H4 | | ----------------- | -------- | # OpenThread Command Line Example @@ -9,7 +9,7 @@ This example demonstrates an [OpenThread CLI](https://github.com/openthread/open ### Hardware Required -To run this example, an ESP32-H2 board is required. +To run this example, an ESP32-H4 board is required. ### Configure the project @@ -63,7 +63,7 @@ factoryreset ## Set Up Network -To run this example, at least two ESP32-H2 boards flashed with this ot_cli example are required. +To run this example, at least two ESP32-H4 boards flashed with this ot_cli example are required. On the first device, run the following commands: ```bash diff --git a/examples/openthread/ot_cli/main/esp_ot_config.h b/examples/openthread/ot_cli/main/esp_ot_config.h index 446344314c..036cb37c5f 100644 --- a/examples/openthread/ot_cli/main/esp_ot_config.h +++ b/examples/openthread/ot_cli/main/esp_ot_config.h @@ -16,7 +16,7 @@ #include "esp_openthread_types.h" -#if CONFIG_IDF_TARGET_ESP32H2 +#if CONFIG_IDF_TARGET_ESP32H4 #define ESP_OPENTHREAD_DEFAULT_RADIO_CONFIG() \ { \ .radio_mode = RADIO_MODE_NATIVE, \ diff --git a/examples/openthread/ot_cli/sdkconfig.ci.cli b/examples/openthread/ot_cli/sdkconfig.ci.cli index 3151ae4eaf..126f1384a7 100644 --- a/examples/openthread/ot_cli/sdkconfig.ci.cli +++ b/examples/openthread/ot_cli/sdkconfig.ci.cli @@ -1,3 +1,3 @@ -CONFIG_IDF_TARGET="esp32h2" -CONFIG_IDF_TARGET_ESP32H2=y -CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2=y +CONFIG_IDF_TARGET="esp32h4" +CONFIG_IDF_TARGET_ESP32H4=y +CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2=y diff --git a/examples/openthread/ot_cli/sdkconfig.defaults b/examples/openthread/ot_cli/sdkconfig.defaults index 98d7110895..817e75dafe 100644 --- a/examples/openthread/ot_cli/sdkconfig.defaults +++ b/examples/openthread/ot_cli/sdkconfig.defaults @@ -1,4 +1,4 @@ -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" # # libsodium # @@ -20,7 +20,7 @@ CONFIG_PARTITION_TABLE_MD5=y # # mbedTLS # -# ESP32H2-TODO: enable HW acceleration +# ESP32H4-TODO: enable HW acceleration CONFIG_MBEDTLS_HARDWARE_AES=n CONFIG_MBEDTLS_HARDWARE_MPI=n CONFIG_MBEDTLS_HARDWARE_SHA=n diff --git a/examples/openthread/ot_rcp/README.md b/examples/openthread/ot_rcp/README.md index e3f3cc6fc2..446555c8de 100644 --- a/examples/openthread/ot_rcp/README.md +++ b/examples/openthread/ot_rcp/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32-H2 | +| Supported Targets | ESP32-H4 | | ----------------- | -------- | # OpenThread Radio Co-Processor (RCP) Example @@ -13,11 +13,11 @@ OpenThread RCP doesn't function alone, it needs to work together with a Host and ### Hardware Required -To run this example, an ESP32-H2 board is required. +To run this example, an ESP32-H4 board is required. ### Configure the project -The default communication interface is port 0 of ESP32-H2 UART running at 115200 baud, change the configuration in [esp_ot_config.h](main/esp_ot_config.h) if you want to use another interface or need different communication parameters. +The default communication interface is port 0 of ESP32-H4 UART running at 115200 baud, change the configuration in [esp_ot_config.h](main/esp_ot_config.h) if you want to use another interface or need different communication parameters. ### Build and Flash diff --git a/examples/openthread/ot_rcp/main/esp_ot_rcp.c b/examples/openthread/ot_rcp/main/esp_ot_rcp.c index 5e62d439d4..96eaee39df 100644 --- a/examples/openthread/ot_rcp/main/esp_ot_rcp.c +++ b/examples/openthread/ot_rcp/main/esp_ot_rcp.c @@ -1,11 +1,11 @@ /* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * - * SPDX-License-Identifier: CC0 + * SPDX-License-Identifier: CC0-1.0 * * OpenThread Radio Co-Processor (RCP) Example * - * This example code is in the Public Domain (or CC0 licensed, at your option.) + * This example code is in the Public Domain (or CC0-1.0 licensed, at your option.) * * Unless required by applicable law or agreed to in writing, this * software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR @@ -21,8 +21,8 @@ #include "esp_vfs_eventfd.h" #include "driver/uart.h" -#if !CONFIG_IDF_TARGET_ESP32H2 -#error "RCP is only supported for esp32h2" +#if !CONFIG_IDF_TARGET_ESP32H4 +#error "RCP is only supported for esp32h4" #endif #define TAG "ot_esp_rcp" diff --git a/examples/openthread/ot_rcp/sdkconfig.defaults b/examples/openthread/ot_rcp/sdkconfig.defaults index 80db98a9ea..991cd96db2 100644 --- a/examples/openthread/ot_rcp/sdkconfig.defaults +++ b/examples/openthread/ot_rcp/sdkconfig.defaults @@ -1,4 +1,4 @@ -CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET="esp32h4" # # libsodium # diff --git a/examples/openthread/pytest_otbr.py b/examples/openthread/pytest_otbr.py index 6689dcf52a..ea012241d3 100644 --- a/examples/openthread/pytest_otbr.py +++ b/examples/openthread/pytest_otbr.py @@ -44,7 +44,7 @@ wifi_psk = 'otcitest888' # Case 1: Thread network formation and attaching @pytest.mark.esp32s3 -@pytest.mark.esp32h2 +@pytest.mark.esp32h4 @pytest.mark.timeout(40 * 60) @pytest.mark.i154_multi_dut @pytest.mark.parametrize( @@ -53,7 +53,7 @@ wifi_psk = 'otcitest888' f'{os.path.join(os.path.dirname(__file__), "ot_rcp")}' f'|{os.path.join(os.path.dirname(__file__), "ot_cli")}' f'|{os.path.join(os.path.dirname(__file__), "ot_br")}', - 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h2|esp32h2|esp32s3'), + 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h4|esp32h4|esp32s3'), # No need to rename beta_target as it is still called h2 in esptool ], indirect=True, ) @@ -82,7 +82,7 @@ def test_thread_connect(dut:Tuple[IdfDut, IdfDut, IdfDut]) -> None: # Case 2: Bidirectional IPv6 connectivity @pytest.mark.esp32s3 -@pytest.mark.esp32h2 +@pytest.mark.esp32h4 @pytest.mark.timeout(40 * 60) @pytest.mark.i154_multi_dut @pytest.mark.parametrize( @@ -91,7 +91,7 @@ def test_thread_connect(dut:Tuple[IdfDut, IdfDut, IdfDut]) -> None: f'{os.path.join(os.path.dirname(__file__), "ot_rcp")}' f'|{os.path.join(os.path.dirname(__file__), "ot_cli")}' f'|{os.path.join(os.path.dirname(__file__), "ot_br")}', - 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h2|esp32h2|esp32s3'), + 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h4|esp32h4|esp32s3'), ], indirect=True, ) @@ -133,7 +133,7 @@ def test_Bidirectional_IPv6_connectivity(Init_interface:bool, dut: Tuple[IdfDut, # Case 3: Multicast forwarding from Wi-Fi to Thread network @pytest.mark.esp32s3 -@pytest.mark.esp32h2 +@pytest.mark.esp32h4 @pytest.mark.timeout(40 * 60) @pytest.mark.i154_multi_dut @pytest.mark.parametrize( @@ -142,7 +142,7 @@ def test_Bidirectional_IPv6_connectivity(Init_interface:bool, dut: Tuple[IdfDut, f'{os.path.join(os.path.dirname(__file__), "ot_rcp")}' f'|{os.path.join(os.path.dirname(__file__), "ot_cli")}' f'|{os.path.join(os.path.dirname(__file__), "ot_br")}', - 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h2|esp32h2|esp32s3'), + 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h4|esp32h4|esp32s3'), ], indirect=True, ) @@ -176,7 +176,7 @@ def test_multicast_forwarding_A(Init_interface:bool, dut: Tuple[IdfDut, IdfDut, # Case 4: Multicast forwarding from Thread to Wi-Fi network @pytest.mark.esp32s3 -@pytest.mark.esp32h2 +@pytest.mark.esp32h4 @pytest.mark.timeout(40 * 60) @pytest.mark.i154_multi_dut @pytest.mark.parametrize( @@ -185,7 +185,7 @@ def test_multicast_forwarding_A(Init_interface:bool, dut: Tuple[IdfDut, IdfDut, f'{os.path.join(os.path.dirname(__file__), "ot_rcp")}' f'|{os.path.join(os.path.dirname(__file__), "ot_cli")}' f'|{os.path.join(os.path.dirname(__file__), "ot_br")}', - 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h2|esp32h2|esp32s3'), + 'esp32h2beta2|esp32h2beta2|esp32s3', 'esp32h4|esp32h4|esp32s3'), ], indirect=True, ) diff --git a/examples/peripherals/.build-test-rules.yml b/examples/peripherals/.build-test-rules.yml index 035a9d3355..7e771b5a4a 100644 --- a/examples/peripherals/.build-test-rules.yml +++ b/examples/peripherals/.build-test-rules.yml @@ -277,7 +277,7 @@ examples/peripherals/uart/uart_echo: examples/peripherals/uart/uart_echo_rs485: enable: - - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "esp32h2" + - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "esp32h4" disable: - if: IDF_TARGET == "esp32c6" temporary: true diff --git a/examples/peripherals/adc/continuous_read/main/continuous_read_main.c b/examples/peripherals/adc/continuous_read/main/continuous_read_main.c index bdfbf8965d..27b94216a3 100644 --- a/examples/peripherals/adc/continuous_read/main/continuous_read_main.c +++ b/examples/peripherals/adc/continuous_read/main/continuous_read_main.c @@ -22,7 +22,7 @@ #elif CONFIG_IDF_TARGET_ESP32S2 #define ADC_CONV_MODE ADC_CONV_BOTH_UNIT #define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2 -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 #define ADC_CONV_MODE ADC_CONV_ALTER_UNIT //ESP32C3 only supports alter mode #define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2 #elif CONFIG_IDF_TARGET_ESP32S3 @@ -30,7 +30,7 @@ #define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2 #endif -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 static adc_channel_t channel[3] = {ADC_CHANNEL_2, ADC_CHANNEL_3, (ADC_CHANNEL_0 | 1 << 3)}; #endif #if CONFIG_IDF_TARGET_ESP32S2 diff --git a/examples/peripherals/gpio/generic_gpio/README.md b/examples/peripherals/gpio/generic_gpio/README.md index 26ab9c934c..468eea45c9 100644 --- a/examples/peripherals/gpio/generic_gpio/README.md +++ b/examples/peripherals/gpio/generic_gpio/README.md @@ -25,7 +25,7 @@ This test code shows how to configure GPIO and how to use it with interruption. | | CONFIG_GPIO_OUTPUT_0 | CONFIG_GPIO_OUTPUT_1 | CONFIG_GPIO_INPUT_0 | CONFIG_GPIO_INPUT_1 | | --------------- | -------------------- | -------------------- | ------------------- | ------------------- | -| ESP32-C2/ESP32H2| 8 | 9 | 4 | 5 | +| ESP32-C2/ESP32H4| 8 | 9 | 4 | 5 | | All other chips | 18 | 19 | 4 | 5 | ## How to use example diff --git a/examples/peripherals/gpio/generic_gpio/main/Kconfig.projbuild b/examples/peripherals/gpio/generic_gpio/main/Kconfig.projbuild index 511b47633b..5cfdd949a6 100644 --- a/examples/peripherals/gpio/generic_gpio/main/Kconfig.projbuild +++ b/examples/peripherals/gpio/generic_gpio/main/Kconfig.projbuild @@ -5,7 +5,7 @@ menu "Example Configuration" config GPIO_OUTPUT_0 int "GPIO output pin 0" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX - default 8 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 + default 8 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4 default 18 help GPIO pin number to be used as GPIO_OUTPUT_IO_0. @@ -13,7 +13,7 @@ menu "Example Configuration" config GPIO_OUTPUT_1 int "GPIO output pin 1" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX - default 9 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 + default 9 if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4 default 19 help GPIO pin number to be used as GPIO_OUTPUT_IO_1. diff --git a/examples/peripherals/gpio/generic_gpio/main/gpio_example_main.c b/examples/peripherals/gpio/generic_gpio/main/gpio_example_main.c index baa4bcef27..56f2d27652 100644 --- a/examples/peripherals/gpio/generic_gpio/main/gpio_example_main.c +++ b/examples/peripherals/gpio/generic_gpio/main/gpio_example_main.c @@ -20,8 +20,8 @@ * This test code shows how to configure gpio and how to use gpio interrupt. * * GPIO status: - * GPIO18: output (ESP32C2/ESP32H2 uses GPIO8 as the second output pin) - * GPIO19: output (ESP32C2/ESP32H2 uses GPIO9 as the second output pin) + * GPIO18: output (ESP32C2/ESP32H4 uses GPIO8 as the second output pin) + * GPIO19: output (ESP32C2/ESP32H4 uses GPIO9 as the second output pin) * GPIO4: input, pulled up, interrupt from rising edge and falling edge * GPIO5: input, pulled up, interrupt from rising edge. * diff --git a/examples/peripherals/i2c/i2c_self_test/README.md b/examples/peripherals/i2c/i2c_self_test/README.md index edb09f7bda..b068b0af7e 100644 --- a/examples/peripherals/i2c/i2c_self_test/README.md +++ b/examples/peripherals/i2c/i2c_self_test/README.md @@ -68,13 +68,13 @@ To run this example, you should have one ESP development board (e.g. ESP32-WROVE **Note:** It is recommended to add external pull-up resistors for SDA/SCL pins to make the communication more stable, though the driver will enable internal pull-up resistors. -#### Pin Assignment(esp32c3, esp32c2, esp32h2): +#### Pin Assignment(esp32c3, esp32c2, esp32h4): **Note:** The following pin assignments are used by default, you can change these in the `menuconfig` . | | SDA | SCL | | ------------------------------------------- | ------ | ------ | -| ESP32-C3/ESP32-C2/ESP32-H2 I2C Master(Slave)| GPIO5 | GPIO6 | +| ESP32-C3/ESP32-C2/ESP32-H4 I2C Master(Slave)| GPIO5 | GPIO6 | | BH1750 Sensor | SDA | SCL | - master: @@ -84,7 +84,7 @@ To run this example, you should have one ESP development board (e.g. ESP32-WROVE - Connection: - connect SDA/SCL of BH1750 sensor to GPIO5/GPIO6 -**Note:** There is only one i2c device on ESP32-C3/ESP32-C2/ESP32-H2, so it is not possible to perform any ESP32/ESP32-S2 self-test example from this repo. However it is possible to test I2C with external devices. If you find anything wrong with your device, please try connecting external pull-up resistors. +**Note:** There is only one i2c device on ESP32-C3/ESP32-C2/ESP32-H4, so it is not possible to perform any ESP32/ESP32-S2 self-test example from this repo. However it is possible to test I2C with external devices. If you find anything wrong with your device, please try connecting external pull-up resistors. ### Configure the project diff --git a/examples/peripherals/i2c/i2c_tools/README.md b/examples/peripherals/i2c/i2c_tools/README.md index 4b2be6cd50..effb1382f3 100644 --- a/examples/peripherals/i2c/i2c_tools/README.md +++ b/examples/peripherals/i2c/i2c_tools/README.md @@ -34,7 +34,7 @@ To run this example, you should have any ESP32, ESP32-S and ESP32-C based develo | ESP32-S3 I2C Master | GPIO1 | GPIO2 | GND | GND | 3.3V | | ESP32-C3 I2C Master | GPIO5 | GPIO6 | GND | GND | 3.3V | | ESP32-C2 I2C Master | GPIO5 | GPIO6 | GND | GND | 3.3V | -| ESP32-H2 I2C Master | GPIO5 | GPIO6 | GND | GND | 3.3V | +| ESP32-H4 I2C Master | GPIO5 | GPIO6 | GND | GND | 3.3V | | Sensor | SDA | SCL | GND | WAK | VCC | **Note: ** There’s no need to add an external pull-up resistors for SDA/SCL pin, because the driver will enable the internal pull-up resistors itself. diff --git a/examples/peripherals/i2c/i2c_tools/main/cmd_i2ctools.c b/examples/peripherals/i2c/i2c_tools/main/cmd_i2ctools.c index 8d30ede7b8..b96fc81ead 100644 --- a/examples/peripherals/i2c/i2c_tools/main/cmd_i2ctools.c +++ b/examples/peripherals/i2c/i2c_tools/main/cmd_i2ctools.c @@ -31,7 +31,7 @@ static const char *TAG = "cmd_i2ctools"; #if CONFIG_IDF_TARGET_ESP32S3 static gpio_num_t i2c_gpio_sda = 1; static gpio_num_t i2c_gpio_scl = 2; -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32C2 static gpio_num_t i2c_gpio_sda = 5; static gpio_num_t i2c_gpio_scl = 6; #else diff --git a/examples/peripherals/i2s/i2s_basic/i2s_std/main/i2s_std_example_main.c b/examples/peripherals/i2s/i2s_basic/i2s_std/main/i2s_std_example_main.c index 84a20b5d01..903248d8b3 100644 --- a/examples/peripherals/i2s/i2s_basic/i2s_std/main/i2s_std_example_main.c +++ b/examples/peripherals/i2s/i2s_basic/i2s_std/main/i2s_std_example_main.c @@ -144,7 +144,7 @@ static void i2s_example_init_std_simplex(void) * The default configuration can be generated by the helper macro, * it only requires the I2S controller id and I2S role * The tx and rx channels here are registered on different I2S controller, - * only ESP32-C3, ESP32-S3 and ESP32-H2 allow to register two separate tx & rx channels on a same controller */ + * only ESP32-C3, ESP32-S3 and ESP32-H4 allow to register two separate tx & rx channels on a same controller */ i2s_chan_config_t tx_chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(I2S_NUM_AUTO, I2S_ROLE_MASTER); ESP_ERROR_CHECK(i2s_new_channel(&tx_chan_cfg, &tx_chan, NULL)); i2s_chan_config_t rx_chan_cfg = I2S_CHANNEL_DEFAULT_CONFIG(I2S_NUM_AUTO, I2S_ROLE_MASTER); diff --git a/examples/peripherals/i2s/i2s_codec/i2s_es8311/README.md b/examples/peripherals/i2s/i2s_codec/i2s_es8311/README.md index 6b14c781b0..2700d91e58 100644 --- a/examples/peripherals/i2s/i2s_codec/i2s_es8311/README.md +++ b/examples/peripherals/i2s/i2s_codec/i2s_es8311/README.md @@ -54,7 +54,7 @@ For more details, see [ES8311 datasheet](http://www.everest-semi.com/pdf/ES8311% │ GND├───────────┤GND │ └─────────────────┘ └──────────────────────────┘ ``` -Note: Since ESP32-C3 & ESP32-H2 board does not have GPIO 16/17, you can use other available GPIOs instead. In this example, we set GPIO 6/7 as I2C pins for ESP32-C3 & ESP32-H2 and GPIO 16/17 for other chips, same as GPIO 18/19, we use GPIO 2/3 instead. +Note: Since ESP32-C3 & ESP32-H4 board does not have GPIO 16/17, you can use other available GPIOs instead. In this example, we set GPIO 6/7 as I2C pins for ESP32-C3 & ESP32-H4 and GPIO 16/17 for other chips, same as GPIO 18/19, we use GPIO 2/3 instead. ### Dependency diff --git a/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/i2s_es8311_example.c b/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/i2s_es8311_example.c index 541efcf9c8..6967df3b35 100644 --- a/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/i2s_es8311_example.c +++ b/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/i2s_es8311_example.c @@ -15,7 +15,7 @@ /* I2C port and GPIOs */ #define I2C_NUM (0) -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 #define I2C_SCL_IO (GPIO_NUM_6) #define I2C_SDA_IO (GPIO_NUM_7) #else @@ -28,7 +28,7 @@ #define I2S_MCK_IO (GPIO_NUM_0) #define I2S_BCK_IO (GPIO_NUM_4) #define I2S_WS_IO (GPIO_NUM_5) -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H4 #define I2S_DO_IO (GPIO_NUM_2) #define I2S_DI_IO (GPIO_NUM_3) #else diff --git a/examples/peripherals/rmt/musical_buzzer/pytest_musical_buzzer.py b/examples/peripherals/rmt/musical_buzzer/pytest_musical_buzzer.py index 0e03953bc3..8386110c34 100644 --- a/examples/peripherals/rmt/musical_buzzer/pytest_musical_buzzer.py +++ b/examples/peripherals/rmt/musical_buzzer/pytest_musical_buzzer.py @@ -8,7 +8,7 @@ from pytest_embedded import Dut @pytest.mark.esp32s2 @pytest.mark.esp32s3 @pytest.mark.esp32c3 -# @pytest.mark.esp32h2 TODO: uncomment this when remove --preview for h2 +# @pytest.mark.esp32h4 TODO: uncomment this when remove --preview for h4 @pytest.mark.generic def test_musical_buzzer_example(dut: Dut) -> None: dut.expect_exact('example: Create RMT TX channel') diff --git a/examples/peripherals/spi_slave/receiver/main/app_main.c b/examples/peripherals/spi_slave/receiver/main/app_main.c index ca254d9551..5e00ba0f9c 100644 --- a/examples/peripherals/spi_slave/receiver/main/app_main.c +++ b/examples/peripherals/spi_slave/receiver/main/app_main.c @@ -41,7 +41,7 @@ Pins in use. The SPI Master can use the GPIO mux, so feel free to change these i #define GPIO_SCLK 15 #define GPIO_CS 14 -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 #define GPIO_HANDSHAKE 3 #define GPIO_MOSI 7 #define GPIO_MISO 2 diff --git a/examples/peripherals/spi_slave/sender/main/app_main.c b/examples/peripherals/spi_slave/sender/main/app_main.c index 0937ce44b2..fdbd9ddc72 100644 --- a/examples/peripherals/spi_slave/sender/main/app_main.c +++ b/examples/peripherals/spi_slave/sender/main/app_main.c @@ -42,7 +42,7 @@ Pins in use. The SPI Master can use the GPIO mux, so feel free to change these i #define GPIO_SCLK 15 #define GPIO_CS 14 -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 #define GPIO_HANDSHAKE 3 #define GPIO_MOSI 7 #define GPIO_MISO 2 diff --git a/examples/peripherals/spi_slave_hd/segment_mode/seg_master/main/app_main.c b/examples/peripherals/spi_slave_hd/segment_mode/seg_master/main/app_main.c index 667342090a..c4aaa69525 100644 --- a/examples/peripherals/spi_slave_hd/segment_mode/seg_master/main/app_main.c +++ b/examples/peripherals/spi_slave_hd/segment_mode/seg_master/main/app_main.c @@ -20,7 +20,7 @@ #define GPIO_MISO 13 #define GPIO_SCLK 12 #define GPIO_CS 10 -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 #define GPIO_MOSI 7 #define GPIO_MISO 2 #define GPIO_SCLK 6 diff --git a/examples/peripherals/spi_slave_hd/segment_mode/seg_slave/main/app_main.c b/examples/peripherals/spi_slave_hd/segment_mode/seg_slave/main/app_main.c index 1945f2fed9..5e4855acc2 100644 --- a/examples/peripherals/spi_slave_hd/segment_mode/seg_slave/main/app_main.c +++ b/examples/peripherals/spi_slave_hd/segment_mode/seg_slave/main/app_main.c @@ -21,7 +21,7 @@ #define GPIO_MISO 13 #define GPIO_SCLK 12 #define GPIO_CS 10 -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 #define GPIO_MOSI 7 #define GPIO_MISO 2 #define GPIO_SCLK 6 diff --git a/examples/peripherals/uart/uart_echo/main/Kconfig.projbuild b/examples/peripherals/uart/uart_echo/main/Kconfig.projbuild index 23427866e4..0959ec7aba 100644 --- a/examples/peripherals/uart/uart_echo/main/Kconfig.projbuild +++ b/examples/peripherals/uart/uart_echo/main/Kconfig.projbuild @@ -6,8 +6,8 @@ menu "Echo Example Configuration" int "UART port number" range 0 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3 default 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3 - range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 - default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 + range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4 + default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4 help UART communication port number for the example. See UART documentation for available port numbers. diff --git a/examples/peripherals/uart/uart_echo_rs485/README.md b/examples/peripherals/uart/uart_echo_rs485/README.md index a2203062c7..e41602d749 100644 --- a/examples/peripherals/uart/uart_echo_rs485/README.md +++ b/examples/peripherals/uart/uart_echo_rs485/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-H4 | ESP32-S2 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | # UART RS485 Echo Example @@ -37,7 +37,7 @@ Connect a USB-to-RS485 adapter to a computer, then connect the adapter's A/B out ``` ------------------------------------------------------------------------------------------------------------------------------ | UART Interface | #define | Default ESP32 Pin | Default pins for | External RS485 Driver Pin | - | | | | ESP32-S2(S3, C3, C2, H2) | | + | | | | ESP32-S2(S3, C3, C2, H4) | | | ----------------------|--------------------|-----------------------|---------------------------|---------------------------| | Transmit Data (TxD) | CONFIG_MB_UART_TXD | GPIO23 | GPIO9 | DI | | Receive Data (RxD) | CONFIG_MB_UART_RXD | GPIO22 | GPIO8 | RO | diff --git a/examples/peripherals/uart/uart_echo_rs485/main/Kconfig.projbuild b/examples/peripherals/uart/uart_echo_rs485/main/Kconfig.projbuild index 32f5148857..d9e7f85e82 100644 --- a/examples/peripherals/uart/uart_echo_rs485/main/Kconfig.projbuild +++ b/examples/peripherals/uart/uart_echo_rs485/main/Kconfig.projbuild @@ -6,8 +6,8 @@ menu "Echo RS485 Example Configuration" int "UART port number" range 0 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3 default 2 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S3 - range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 - default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 + range 0 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4 + default 1 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H4 help UART communication port number for the example. See UART documentation for available port numbers. diff --git a/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c b/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c index ea5667e0b5..dab15b180e 100644 --- a/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c +++ b/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c @@ -22,7 +22,7 @@ #include "esp_system.h" #include "soc/spi_pins.h" -// h2 and c2 will not support external flash +// h4 and c2 will not support external flash #define EXAMPLE_FLASH_FREQ_MHZ 40 static const char *TAG = "example"; diff --git a/examples/storage/semihost_vfs/README.md b/examples/storage/semihost_vfs/README.md index 75f2db8b9a..f156922a54 100644 --- a/examples/storage/semihost_vfs/README.md +++ b/examples/storage/semihost_vfs/README.md @@ -73,7 +73,7 @@ openocd -c "set ESP_SEMIHOST_BASEDIR %IDF_PATH%/examples/storage/semihost_vfs/da The above command will set `ESP_SEMIHOST_BASEDIR` variable to `examples/storage/semihost_vfs/data` subdirectory of ESP-IDF. With that, it is not necessary to run OpenOCD from that specific directory. -> Note: This feature is not available for RISC-V based SoCs (ESP32-C3, ESP32-H2). To set the semihosting base directory, change into the required directory before running `openocd` command. +> Note: This feature is not available for RISC-V based SoCs (ESP32-C3, ESP32-H4). To set the semihosting base directory, change into the required directory before running `openocd` command. ## Example output diff --git a/examples/system/console/advanced/components/cmd_system/cmd_system.c b/examples/system/console/advanced/components/cmd_system/cmd_system.c index 5c17066240..6524b21b6e 100644 --- a/examples/system/console/advanced/components/cmd_system/cmd_system.c +++ b/examples/system/console/advanced/components/cmd_system/cmd_system.c @@ -86,8 +86,8 @@ static int get_version(int argc, char **argv) case CHIP_ESP32C3: model = "ESP32-C3"; break; - case CHIP_ESP32H2: - model = "ESP32-H2"; + case CHIP_ESP32H4: + model = "ESP32-H4"; break; case CHIP_ESP32C2: model = "ESP32-C2"; diff --git a/examples/system/deep_sleep/main/Kconfig.projbuild b/examples/system/deep_sleep/main/Kconfig.projbuild index 06bb60aa8b..1c5000dff2 100644 --- a/examples/system/deep_sleep/main/Kconfig.projbuild +++ b/examples/system/deep_sleep/main/Kconfig.projbuild @@ -54,10 +54,10 @@ menu "Example Configuration" config EXAMPLE_GPIO_WAKEUP_PIN int "Enable wakeup from GPIO" - default 0 if !IDF_TARGET_ESP32H2_BETA_VERSION_2 - default 7 if IDF_TARGET_ESP32H2_BETA_VERSION_2 - range 0 5 if !IDF_TARGET_ESP32H2_BETA_VERSION_2 - range 7 12 if IDF_TARGET_ESP32H2_BETA_VERSION_2 + default 0 if !IDF_TARGET_ESP32H4_BETA_VERSION_2 + default 7 if IDF_TARGET_ESP32H4_BETA_VERSION_2 + range 0 5 if !IDF_TARGET_ESP32H4_BETA_VERSION_2 + range 7 12 if IDF_TARGET_ESP32H4_BETA_VERSION_2 config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL bool "Enable GPIO high-level wakeup" diff --git a/examples/system/esp_timer/sdkconfig.ci.rtc b/examples/system/esp_timer/sdkconfig.ci.rtc index 52139ed8c6..f0f3c7eae2 100644 --- a/examples/system/esp_timer/sdkconfig.ci.rtc +++ b/examples/system/esp_timer/sdkconfig.ci.rtc @@ -7,4 +7,4 @@ CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC=y CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC=y CONFIG_ESP32C2_TIME_SYSCALL_USE_RTC=y CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC=y -CONFIG_ESP32H2_TIME_SYSCALL_USE_RTC=y +CONFIG_ESP32H4_TIME_SYSCALL_USE_RTC=y diff --git a/examples/system/gcov/main/Kconfig.projbuild b/examples/system/gcov/main/Kconfig.projbuild index a5ff55cf83..8b3d5d4d8a 100644 --- a/examples/system/gcov/main/Kconfig.projbuild +++ b/examples/system/gcov/main/Kconfig.projbuild @@ -5,7 +5,7 @@ menu "Example Configuration" config BLINK_GPIO int "Blink GPIO number" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX - default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H2 || IDF_TARGET_ESP32C2 + default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H4 || IDF_TARGET_ESP32C2 default 18 if IDF_TARGET_ESP32S2 default 48 if IDF_TARGET_ESP32S3 default 5 diff --git a/examples/system/light_sleep/main/gpio_wakeup.c b/examples/system/light_sleep/main/gpio_wakeup.c index b7a945ef05..d17d836029 100644 --- a/examples/system/light_sleep/main/gpio_wakeup.c +++ b/examples/system/light_sleep/main/gpio_wakeup.c @@ -12,7 +12,7 @@ /* Most development boards have "boot" button attached to GPIO0. * You can also change this to another pin. */ -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H4 #define BOOT_BUTTON_NUM 9 #else #define BOOT_BUTTON_NUM 0 diff --git a/examples/zigbee/.build-test-rules.yml b/examples/zigbee/.build-test-rules.yml index 84bfceb0f9..f6934ba117 100644 --- a/examples/zigbee/.build-test-rules.yml +++ b/examples/zigbee/.build-test-rules.yml @@ -8,10 +8,20 @@ examples/zigbee/esp_zigbee_gateway: examples/zigbee/esp_zigbee_rcp: enable: - - if: IDF_TARGET == "esp32h2" - reason: only test on esp32h2 + - if: IDF_TARGET == "esp32h4" + reason: should able to run on esp32h4 + disable: + - if: IDF_TARGET == "esp32h4" + temporary: true + # TODO: rename esp32h2 to esp32h4 [IDF-6101] + reason: waiting for esp32h2 in the managed component be renamed to esp32h4 examples/zigbee/light_sample: enable: - - if: IDF_TARGET == "esp32h2" - reason: only test on esp32h2 + - if: IDF_TARGET == "esp32h4" + reason: should able to run on esp32h4 + disable: + - if: IDF_TARGET == "esp32h4" + temporary: true + # TODO: rename esp32h2 to esp32h4 [IDF-6101] + reason: waiting for esp32h2 in the managed component be renamed to esp32h4 diff --git a/examples/zigbee/esp_zigbee_gateway/README.md b/examples/zigbee/esp_zigbee_gateway/README.md index 8d58dbc7f1..75285d2584 100644 --- a/examples/zigbee/esp_zigbee_gateway/README.md +++ b/examples/zigbee/esp_zigbee_gateway/README.md @@ -3,19 +3,19 @@ # Gateway Example -This example demonstrates how to build a Zigbee Gateway device. It runs on a Wi-Fi SoC such as ESP32, ESP32-C3 and ESP32-S3, with an 802.15.4 SoC like ESP32-H2 running [esp_zigbee_rcp](../esp_zigbee_rcp) to provide 802.15.4 radio. +This example demonstrates how to build a Zigbee Gateway device. It runs on a Wi-Fi SoC such as ESP32, ESP32-C3 and ESP32-S3, with an 802.15.4 SoC like ESP32-H4 running [esp_zigbee_rcp](../esp_zigbee_rcp) to provide 802.15.4 radio. ## Hardware Required * One development board with ESP32 or ESP32-S3 SoC acting as Zigbee gateway (loaded with esp_zigbee_gateway example) * A USB cable for power supply and programming * Three jumper wires for UART (TX, RX and GND) -* Gateway doesn't function alone. Choose ESP32-H2 as Zigbee rcp (see [esp_zigbee_rcp example](../esp_zigbee_rcp)) -* **Flash** Zigbee rcp on the ESP32-H2 DevKitC first **before** connecting to Zigbee gateway -* Connect the two SoCs via UART, below is an example setup with ESP32-DevKitC and ESP32-H2-DevKitC: -![Zigbee_gateway](../../openthread/ot_br/image/thread-border-router-esp32-esp32h2.jpg) +* Gateway doesn't function alone. Choose ESP32-H4 as Zigbee rcp (see [esp_zigbee_rcp example](../esp_zigbee_rcp)) +* **Flash** Zigbee rcp on the ESP32-H4 DevKitC first **before** connecting to Zigbee gateway +* Connect the two SoCs via UART, below is an example setup with ESP32-DevKitC and ESP32-H4-DevKitC: +![Zigbee_gateway](../../openthread/ot_br/image/thread-border-router-esp32-esp32h4.jpg) -ESP32 pin | ESP32-H2 pin +ESP32 pin | ESP32-H4 pin ------------- |------------- GND | G GPIO4 (RX) | TX @@ -42,6 +42,7 @@ Build the project, flash it to the board, and start the monitor tool to view the As you run the example, you will see the following log: esp_zigbee_gateway: +``` I (660) ESP_ZB_GATEWAY: status: -1 I (670) ESP_ZB_GATEWAY: Zigbee stack initialized I (680) ESP_ZB_GATEWAY: Zigbee rcp device booted @@ -49,6 +50,7 @@ I (1280) ESP_ZB_GATEWAY: Start network formation I (3060) ESP_ZB_GATEWAY: Formed network successfully (ieee extended address: f9:54:2d:01:a0:03:f7:84, PAN ID: 0x8651) I (4060) ESP_ZB_GATEWAY: status: 0 I (4400) ESP_ZB_GATEWAY: Network steering started +``` ## Gateway Functions diff --git a/examples/zigbee/esp_zigbee_rcp/README.md b/examples/zigbee/esp_zigbee_rcp/README.md index c709d494de..530a96ead9 100644 --- a/examples/zigbee/esp_zigbee_rcp/README.md +++ b/examples/zigbee/esp_zigbee_rcp/README.md @@ -1,20 +1,20 @@ -| Supported Targets | ESP32-H2 | +| Supported Targets | ESP32-H4 | | ----------------- | -------- | -# Rcp Example +# Rcp Example This test code shows how to configure Zigbee rcp (radio co-processor) device. Rcp doesn't function alone, it needs to work together with Zigbee gateway (see [esp_zigbee_gateway example](../esp_zigbee_gateway)) ## Hardware Required -* One development board with ESP32-H2 SoC acting as Zigbee rcp (loaded with esp_zigbee_rcp example) +* One development board with ESP32-H4 SoC acting as Zigbee rcp (loaded with esp_zigbee_rcp example) * A USB cable for power supply and programming * Choose ESP32 or ESP32-S3 as Zigbee gateway. The connection and setup refer to the Zigbee gateway example for setup details (see [esp_zigbee_gateway example](../esp_zigbee_gateway)) * TX, RX pin can be also configured by user in esp_zigbee_rcp.h ## Configure the project -Before project configuration and build, make sure to set the correct chip target using `idf.py --preview set-target esp32h2` +Before project configuration and build, make sure to set the correct chip target using `idf.py --preview set-target esp32h4` ## Erase the NVRAM diff --git a/examples/zigbee/esp_zigbee_rcp/sdkconfig.defaults b/examples/zigbee/esp_zigbee_rcp/sdkconfig.defaults index d517428f61..693d709e85 100644 --- a/examples/zigbee/esp_zigbee_rcp/sdkconfig.defaults +++ b/examples/zigbee/esp_zigbee_rcp/sdkconfig.defaults @@ -1,5 +1,3 @@ -CONFIG_IDF_TARGET="esp32h2" - # # Partition Table # diff --git a/examples/zigbee/light_sample/HA_on_off_light/README.md b/examples/zigbee/light_sample/HA_on_off_light/README.md index b58a0dc50c..05d4691e63 100644 --- a/examples/zigbee/light_sample/HA_on_off_light/README.md +++ b/examples/zigbee/light_sample/HA_on_off_light/README.md @@ -1,21 +1,21 @@ -| Supported Targets | ESP32-H2 | +| Supported Targets | ESP32-H4 | | ----------------- | -------- | -# Light Bulb Example +# Light Bulb Example This test code shows how to configure Zigbee end device and use it as HA on/off light bulb ## Hardware Required -* One development board with ESP32-H2 SoC acting as Zigbee end device (loaded with HA_on_off_light example) +* One development board with ESP32-H4 SoC acting as Zigbee end device (loaded with HA_on_off_light example) * A USB cable for power supply and programming -* Choose another ESP32-H2 as Zigbee coordinator (see [HA_on_off_switch example](../HA_on_off_switch)) +* Choose another ESP32-H4 as Zigbee coordinator (see [HA_on_off_switch example](../HA_on_off_switch)) ## Configure the project -Before project configuration and build, make sure to set the correct chip target using `idf.py set-target esp32h2`. +Before project configuration and build, make sure to set the correct chip target using `idf.py set-target esp32h4`. -## Erase the NVRAM +## Erase the NVRAM Before flash it to the board, it is recommended to erase NVRAM if user doesn't want to keep the previous examples or other projects stored info using `idf.py -p PORT erase-flash` @@ -30,20 +30,20 @@ Build the project, flash it to the board, and start the monitor tool to view the As you run the example, you will see the following log: light bulb: -I (918) ESP_ZB_LIGHT: status: 255 -I (901) ESP_ZB_LIGHT: Zigbee stack initialized -I (901) ESP_ZB_LIGHT: Start network steering -I (2611) ESP_ZB_LIGHT: Joined network successfully (Extended PAN ID: aa:98:48:01:a0:03:f7:84, PAN ID: 0x0e8b) -I (5651) ESP_ZB_LIGHT: on/off light set to 1 -I (6631) ESP_ZB_LIGHT: on/off light set to 0 -I (7331) ESP_ZB_LIGHT: on/off light set to 1 -I (8251) ESP_ZB_LIGHT: on/off light set to 0 -I (9111) ESP_ZB_LIGHT: on/off light set to 1 -I (9671) ESP_ZB_LIGHT: on/off light set to 0 +I (918) ESP_ZB_LIGHT: status: 255 +I (901) ESP_ZB_LIGHT: Zigbee stack initialized +I (901) ESP_ZB_LIGHT: Start network steering +I (2611) ESP_ZB_LIGHT: Joined network successfully (Extended PAN ID: aa:98:48:01:a0:03:f7:84, PAN ID: 0x0e8b) +I (5651) ESP_ZB_LIGHT: on/off light set to 1 +I (6631) ESP_ZB_LIGHT: on/off light set to 0 +I (7331) ESP_ZB_LIGHT: on/off light set to 1 +I (8251) ESP_ZB_LIGHT: on/off light set to 0 +I (9111) ESP_ZB_LIGHT: on/off light set to 1 +I (9671) ESP_ZB_LIGHT: on/off light set to 0 ## Light Control Functions - * By toggling the switch button (BOOT) on the ESP32-H2 board loaded with the `HA_on_off_switch` example, the LED on this board loaded with `HA_on_off_light` example will be on and off. + * By toggling the switch button (BOOT) on the ESP32-H4 board loaded with the `HA_on_off_switch` example, the LED on this board loaded with `HA_on_off_light` example will be on and off. ## Troubleshooting diff --git a/examples/zigbee/light_sample/HA_on_off_light/sdkconfig.defaults b/examples/zigbee/light_sample/HA_on_off_light/sdkconfig.defaults index 4f82c3f28f..bd6d5f604c 100644 --- a/examples/zigbee/light_sample/HA_on_off_light/sdkconfig.defaults +++ b/examples/zigbee/light_sample/HA_on_off_light/sdkconfig.defaults @@ -1,5 +1,3 @@ -CONFIG_IDF_TARGET="esp32h2" - # # Partition Table # diff --git a/examples/zigbee/light_sample/HA_on_off_switch/README.md b/examples/zigbee/light_sample/HA_on_off_switch/README.md index a8d8f9f523..23696ea9f0 100644 --- a/examples/zigbee/light_sample/HA_on_off_switch/README.md +++ b/examples/zigbee/light_sample/HA_on_off_switch/README.md @@ -1,21 +1,21 @@ -| Supported Targets | ESP32-H2 | +| Supported Targets | ESP32-H4 | | ----------------- | -------- | -# Light Switch Example +# Light Switch Example This test code shows how to configure Zigbee Coordinator and use it as an HA on/off_switch ## Hardware Required -* One development board with ESP32-H2 SoC acting as Zigbee Coordinator (loaded with HA_on_off_switch) +* One development board with ESP32-H4 SoC acting as Zigbee Coordinator (loaded with HA_on_off_switch) * A USB cable for power supply and programming -* Choose another ESP32-H2 as Zigbee end-device (see [HA_on_off_light](../HA_on_off_light/)) +* Choose another ESP32-H4 as Zigbee end-device (see [HA_on_off_light](../HA_on_off_light/)) ## Configure the project -Before project configuration and build, make sure to set the correct chip target using `idf.py set-target esp32h2`. +Before project configuration and build, make sure to set the correct chip target using `idf.py set-target esp32h4`. -## Erase the NVRAM +## Erase the NVRAM Before flash it to the board, it is recommended to erase NVRAM if user doesn't want to keep the previous examples or other projects stored info using `idf.py -p PORT erase-flash` @@ -29,30 +29,30 @@ Build the project, flash it to the board, and start the monitor tool to view the As you run the example, you will see the following log: -light switch: -I (318) gpio: GPIO[9]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:2 -I (328) system_api: Base MAC address is not set -I (328) system_api: read default base MAC address from EFUSE -I (408) phy: libbtbb version: 6c47ec3, Mar 16 2022, 18:54:24 -I (408) phy: phy_version: 101, bb2a234, Mar 16 2022, 18:54:11 -I (818) ESP_ZB_ON_OFF_SWITCH: status: 255 -I (818) ESP_ZB_ON_OFF_SWITCH: Zigbee stack initialized -I (818) ESP_ZB_ON_OFF_SWITCH: Start network formation -I (1318) ESP_ZB_ON_OFF_SWITCH: Formed network successfully (Extended PAN ID: ff:fc:7c:c0:f0:bd:97:10, PAN ID: 0x88e7) -I (1778) ESP_ZB_ON_OFF_SWITCH: status: 0 -I (5528) ESP_ZB_ON_OFF_SWITCH: status: 0 -I (6038) ESP_ZB_ON_OFF_SWITCH: status: 0 -I (6068) ESP_ZB_ON_OFF_SWITCH: New device commissioned or rejoined (short: 0x2878) -I (6098) ESP_ZB_ON_OFF_SWITCH: User find cb: address:0x2878, endpoint:10 -I (6638) ESP_ZB_ON_OFF_SWITCH: status: 0 -I (6678) ESP_ZB_ON_OFF_SWITCH: status: 0 -I (8168) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command -I (8898) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command -I (9458) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command -I (10088) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command -I (10588) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command -I (11098) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command - +light switch: +I (318) gpio: GPIO[9]| InputEn: 1| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:2 +I (328) system_api: Base MAC address is not set +I (328) system_api: read default base MAC address from EFUSE +I (408) phy: libbtbb version: 6c47ec3, Mar 16 2022, 18:54:24 +I (408) phy: phy_version: 101, bb2a234, Mar 16 2022, 18:54:11 +I (818) ESP_ZB_ON_OFF_SWITCH: status: 255 +I (818) ESP_ZB_ON_OFF_SWITCH: Zigbee stack initialized +I (818) ESP_ZB_ON_OFF_SWITCH: Start network formation +I (1318) ESP_ZB_ON_OFF_SWITCH: Formed network successfully (Extended PAN ID: ff:fc:7c:c0:f0:bd:97:10, PAN ID: 0x88e7) +I (1778) ESP_ZB_ON_OFF_SWITCH: status: 0 +I (5528) ESP_ZB_ON_OFF_SWITCH: status: 0 +I (6038) ESP_ZB_ON_OFF_SWITCH: status: 0 +I (6068) ESP_ZB_ON_OFF_SWITCH: New device commissioned or rejoined (short: 0x2878) +I (6098) ESP_ZB_ON_OFF_SWITCH: User find cb: address:0x2878, endpoint:10 +I (6638) ESP_ZB_ON_OFF_SWITCH: status: 0 +I (6678) ESP_ZB_ON_OFF_SWITCH: status: 0 +I (8168) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command +I (8898) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command +I (9458) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command +I (10088) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command +I (10588) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command +I (11098) ESP_ZB_ON_OFF_SWITCH: send move to on_off toggle command + ## Light Control Functions diff --git a/examples/zigbee/light_sample/HA_on_off_switch/sdkconfig.defaults b/examples/zigbee/light_sample/HA_on_off_switch/sdkconfig.defaults index 974931a889..84faf10eb9 100644 --- a/examples/zigbee/light_sample/HA_on_off_switch/sdkconfig.defaults +++ b/examples/zigbee/light_sample/HA_on_off_switch/sdkconfig.defaults @@ -1,5 +1,3 @@ -CONFIG_IDF_TARGET="esp32h2" - # # Partition Table # diff --git a/examples/zigbee/light_sample/README.md b/examples/zigbee/light_sample/README.md index d6fe369671..4534f278f4 100644 --- a/examples/zigbee/light_sample/README.md +++ b/examples/zigbee/light_sample/README.md @@ -1,4 +1,4 @@ -# Light Switch and Bulb Control Example +# Light Switch and Bulb Control Example (See the `README.md` file in the upper level 'examples' directory for more information about examples.) @@ -6,7 +6,7 @@ The folder contains examples demonstrating Zigbee Coordinator and End-Device roles -* [HA_on_off_light](HA_on_off_light) is a standard HA on-off light bulb example demonstrating Zigbee End-device. It provides a simple on/off condition for a Zigbee light. It runs on an 802.15.4 SoC like ESP32-H2. For more details see the example readme file. +* [HA_on_off_light](HA_on_off_light) is a standard HA on-off light bulb example demonstrating Zigbee End-device. It provides a simple on/off condition for a Zigbee light. It runs on an 802.15.4 SoC like ESP32-H4. For more details see the example readme file. -* [HA_on_off_switch](HA_on_off_switch) is a standard HA on-off switch example demonstrating Zigbee Coordinator role. It provides an on/off toggle to control a Zigbee HA on off light. It runs on an 802.15.4 SoC like ESP32-H2. For more details to see the example readme file. +* [HA_on_off_switch](HA_on_off_switch) is a standard HA on-off switch example demonstrating Zigbee Coordinator role. It provides an on/off toggle to control a Zigbee HA on off light. It runs on an 802.15.4 SoC like ESP32-H4. For more details to see the example readme file. diff --git a/pytest.ini b/pytest.ini index 380b5a5a63..5952f504dd 100644 --- a/pytest.ini +++ b/pytest.ini @@ -26,9 +26,9 @@ markers = esp32c3: support esp32c3 target esp32c2: support esp32c2 target esp32c6: support esp32c6 target - esp32h2: support esp32h2 target + esp32h4: support esp32h4 target supported_targets: support all supported targets ('esp32', 'esp32s2', 'esp32c3', 'esp32s3', 'esp32c2') - preview_targets: support all preview targets ('linux', 'esp32h2', 'esp32c6') + preview_targets: support all preview targets ('linux', 'esp32h4', 'esp32c6') all_targets: support all targets, including supported ones and preview ones # env markers diff --git a/tools/ci/build_template_app.sh b/tools/ci/build_template_app.sh index 274c87675e..7cb7bfeaa5 100755 --- a/tools/ci/build_template_app.sh +++ b/tools/ci/build_template_app.sh @@ -62,7 +62,7 @@ build_stage2() { --build-log ${BUILD_LOG_CMAKE} \ --size-file size.json \ --collect-size-info size_info.txt \ - --default-build-targets esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32c6 # add esp32h2 back after IDF-5541 + --default-build-targets esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32c6 # add esp32h4 back after IDF-5541 } build_stage1() { @@ -76,7 +76,7 @@ build_stage1() { --build-log ${BUILD_LOG_CMAKE} \ --size-file size.json \ --collect-size-info size_info.txt \ - --default-build-targets esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32h2,esp32c6 + --default-build-targets esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32h4,esp32c6 } # Default arguments diff --git a/tools/ci/check_build_test_rules.py b/tools/ci/check_build_test_rules.py index 83b64d8f5b..1e345f0a97 100755 --- a/tools/ci/check_build_test_rules.py +++ b/tools/ci/check_build_test_rules.py @@ -29,7 +29,7 @@ USUAL_TO_FORMAL = { 'esp32s2': 'ESP32-S2', 'esp32s3': 'ESP32-S3', 'esp32c3': 'ESP32-C3', - 'esp32h2': 'ESP32-H2', + 'esp32h4': 'ESP32-H4', 'esp32c2': 'ESP32-C2', 'esp32c6': 'ESP32-C6', 'linux': 'Linux', @@ -40,7 +40,7 @@ FORMAL_TO_USUAL = { 'ESP32-S2': 'esp32s2', 'ESP32-S3': 'esp32s3', 'ESP32-C3': 'esp32c3', - 'ESP32-H2': 'esp32h2', + 'ESP32-H4': 'esp32h4', 'ESP32-C2': 'esp32c2', 'ESP32-C6': 'esp32c6', 'Linux': 'linux', @@ -217,7 +217,7 @@ def check_test_scripts( # { # app_dir: { # 'script_path': 'path/to/script', - # 'targets': ['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32h2', 'esp32c2', 'linux'], + # 'targets': ['esp32', 'esp32s2', 'esp32s3', 'esp32c3', 'esp32h4', 'esp32c2', 'linux'], # } # } def check_enable_test( diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index 3c52d823da..2a91495ea2 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -442,8 +442,6 @@ components/esp_netif/private_include/esp_netif_private.h components/esp_netif/test/test_esp_netif.c components/esp_netif/test_apps/component_ut_test.py components/esp_netif/test_apps/main/esp_netif_test.c -components/esp_phy/esp32h2/include/phy_init_data.h -components/esp_phy/src/phy_init_esp32hxx.c components/esp_phy/test/test_phy_rtc.c components/esp_pm/include/esp_private/pm_impl.h components/esp_pm/include/esp_private/pm_trace.h @@ -468,12 +466,6 @@ components/esp_rom/esp32c3/ld/esp32c3.rom.libgcc.ld components/esp_rom/esp32c3/ld/esp32c3.rom.newlib-nano.ld components/esp_rom/esp32c3/ld/esp32c3.rom.newlib.ld components/esp_rom/esp32c3/ld/esp32c3.rom.version.ld -components/esp_rom/esp32h2/ld/esp32h2.rom.api.ld -components/esp_rom/esp32h2/ld/esp32h2.rom.ld -components/esp_rom/esp32h2/ld/esp32h2.rom.libgcc.ld -components/esp_rom/esp32h2/ld/esp32h2.rom.newlib-nano.ld -components/esp_rom/esp32h2/ld/esp32h2.rom.newlib.ld -components/esp_rom/esp32h2/ld/esp32h2.rom.version.ld components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld components/esp_rom/esp32s2/ld/esp32s2.rom.ld components/esp_rom/esp32s2/ld/esp32s2.rom.libgcc.ld @@ -514,21 +506,6 @@ components/esp_rom/include/esp32c3/rom/rtc.h components/esp_rom/include/esp32c3/rom/sha.h components/esp_rom/include/esp32c3/rom/tjpgd.h components/esp_rom/include/esp32c3/rom/uart.h -components/esp_rom/include/esp32h2/rom/aes.h -components/esp_rom/include/esp32h2/rom/apb_backup_dma.h -components/esp_rom/include/esp32h2/rom/bigint.h -components/esp_rom/include/esp32h2/rom/cache.h -components/esp_rom/include/esp32h2/rom/crc.h -components/esp_rom/include/esp32h2/rom/digital_signature.h -components/esp_rom/include/esp32h2/rom/esp_flash.h -components/esp_rom/include/esp32h2/rom/ets_sys.h -components/esp_rom/include/esp32h2/rom/hmac.h -components/esp_rom/include/esp32h2/rom/libc_stubs.h -components/esp_rom/include/esp32h2/rom/miniz.h -components/esp_rom/include/esp32h2/rom/rsa_pss.h -components/esp_rom/include/esp32h2/rom/sha.h -components/esp_rom/include/esp32h2/rom/tjpgd.h -components/esp_rom/include/esp32h2/rom/uart.h components/esp_rom/include/esp32s2/rom/aes.h components/esp_rom/include/esp32s2/rom/bigint.h components/esp_rom/include/esp32s2/rom/crc.h @@ -616,9 +593,6 @@ components/esp_system/port/soc/esp32/intr.c components/esp_system/port/soc/esp32/reset_reason.c components/esp_system/port/soc/esp32c3/apb_backup_dma.c components/esp_system/port/soc/esp32c3/cache_err_int.h -components/esp_system/port/soc/esp32h2/apb_backup_dma.c -components/esp_system/port/soc/esp32h2/cache_err_int.h -components/esp_system/port/soc/esp32h2/reset_reason.c components/esp_system/port/soc/esp32s2/cache_err_int.h components/esp_system/port/soc/esp32s2/reset_reason.c components/esp_system/port/soc/esp32s3/cache_err_int.h @@ -700,16 +674,6 @@ components/hal/esp32c3/include/hal/spi_flash_encrypted_ll.h components/hal/esp32c3/include/hal/uhci_ll.h components/hal/esp32c3/include/hal/usb_serial_jtag_ll.h components/hal/esp32c3/rtc_cntl_hal.c -components/hal/esp32h2/hmac_hal.c -components/hal/esp32h2/include/hal/ds_ll.h -components/hal/esp32h2/include/hal/hmac_hal.h -components/hal/esp32h2/include/hal/hmac_ll.h -components/hal/esp32h2/include/hal/mpu_ll.h -components/hal/esp32h2/include/hal/sha_ll.h -components/hal/esp32h2/include/hal/spi_flash_encrypted_ll.h -components/hal/esp32h2/include/hal/uhci_ll.h -components/hal/esp32h2/include/hal/uhci_types.h -components/hal/esp32h2/include/hal/usb_serial_jtag_ll.h components/hal/esp32s2/include/hal/crypto_dma_ll.h components/hal/esp32s2/include/hal/dedic_gpio_ll.h components/hal/esp32s2/include/hal/mpu_ll.h @@ -994,41 +958,6 @@ components/soc/esp32c3/include/soc/wdev_reg.h components/soc/esp32c3/interrupts.c components/soc/esp32c3/ledc_periph.c components/soc/esp32c3/uart_periph.c -components/soc/esp32h2/i2c_periph.c -components/soc/esp32h2/include/soc/apb_ctrl_reg.h -components/soc/esp32h2/include/soc/apb_ctrl_struct.h -components/soc/esp32h2/include/soc/apb_saradc_reg.h -components/soc/esp32h2/include/soc/apb_saradc_struct.h -components/soc/esp32h2/include/soc/bb_reg.h -components/soc/esp32h2/include/soc/boot_mode.h -components/soc/esp32h2/include/soc/clkrst_reg.h -components/soc/esp32h2/include/soc/efuse_reg.h -components/soc/esp32h2/include/soc/efuse_struct.h -components/soc/esp32h2/include/soc/extmem_reg.h -components/soc/esp32h2/include/soc/fe_reg.h -components/soc/esp32h2/include/soc/interrupt_reg.h -components/soc/esp32h2/include/soc/ledc_reg.h -components/soc/esp32h2/include/soc/nrx_reg.h -components/soc/esp32h2/include/soc/rtc_caps.h -components/soc/esp32h2/include/soc/rtc_i2c_reg.h -components/soc/esp32h2/include/soc/rtc_i2c_struct.h -components/soc/esp32h2/include/soc/sensitive_struct.h -components/soc/esp32h2/include/soc/soc_pins.h -components/soc/esp32h2/include/soc/spi_mem_reg.h -components/soc/esp32h2/include/soc/spi_mem_struct.h -components/soc/esp32h2/include/soc/spi_pins.h -components/soc/esp32h2/include/soc/spi_reg.h -components/soc/esp32h2/include/soc/spi_struct.h -components/soc/esp32h2/include/soc/syscon_reg.h -components/soc/esp32h2/include/soc/syscon_struct.h -components/soc/esp32h2/include/soc/system_reg.h -components/soc/esp32h2/include/soc/system_struct.h -components/soc/esp32h2/include/soc/uart_pins.h -components/soc/esp32h2/include/soc/usb_serial_jtag_reg.h -components/soc/esp32h2/include/soc/usb_serial_jtag_struct.h -components/soc/esp32h2/include/soc/wdev_reg.h -components/soc/esp32h2/ledc_periph.c -components/soc/esp32h2/uart_periph.c components/soc/esp32s2/adc_periph.c components/soc/esp32s2/dedic_gpio_periph.c components/soc/esp32s2/i2c_periph.c diff --git a/tools/ci/check_public_headers_exceptions.txt b/tools/ci/check_public_headers_exceptions.txt index a76a5c9368..fe968b5d84 100644 --- a/tools/ci/check_public_headers_exceptions.txt +++ b/tools/ci/check_public_headers_exceptions.txt @@ -103,7 +103,7 @@ components/esp_rom/include/esp32/rom/rtc.h components/esp_rom/include/esp32c3/rom/rtc.h components/esp_rom/include/esp32s2/rom/rtc.h components/esp_rom/include/esp32s3/rom/rtc.h -components/esp_rom/include/esp32h2/rom/rtc.h +components/esp_rom/include/esp32h4/rom/rtc.h components/esp_rom/include/esp32c2/rom/rtc.h components/esp_rom/include/esp32c6/rom/rtc.h components/esp_rom/include/esp32/rom/sha.h diff --git a/tools/ci/executable-list.txt b/tools/ci/executable-list.txt index af68794867..d0bb396966 100644 --- a/tools/ci/executable-list.txt +++ b/tools/ci/executable-list.txt @@ -30,14 +30,14 @@ docs/check_lang_folder_sync.sh examples/build_system/cmake/idf_as_lib/build-esp32.sh examples/build_system/cmake/idf_as_lib/build-esp32c2.sh examples/build_system/cmake/idf_as_lib/build-esp32c3.sh -examples/build_system/cmake/idf_as_lib/build-esp32h2.sh +examples/build_system/cmake/idf_as_lib/build-esp32h4.sh examples/build_system/cmake/idf_as_lib/build-esp32s2.sh examples/build_system/cmake/idf_as_lib/build-esp32s3.sh examples/build_system/cmake/idf_as_lib/build.sh examples/build_system/cmake/idf_as_lib/run-esp32.sh examples/build_system/cmake/idf_as_lib/run-esp32c2.sh examples/build_system/cmake/idf_as_lib/run-esp32c3.sh -examples/build_system/cmake/idf_as_lib/run-esp32h2.sh +examples/build_system/cmake/idf_as_lib/run-esp32h4.sh examples/build_system/cmake/idf_as_lib/run-esp32s2.sh examples/build_system/cmake/idf_as_lib/run-esp32s3.sh examples/build_system/cmake/idf_as_lib/run.sh diff --git a/tools/ci/python_packages/ttfw_idf/IDFDUT.py b/tools/ci/python_packages/ttfw_idf/IDFDUT.py index aa4e106abb..7beec74848 100644 --- a/tools/ci/python_packages/ttfw_idf/IDFDUT.py +++ b/tools/ci/python_packages/ttfw_idf/IDFDUT.py @@ -631,13 +631,13 @@ class ESP32C6DUT(IDFDUT): return targets.ESP32C6BETAROM -class ESP32H2DUT(IDFDUT): - TARGET = 'esp32h2' +class ESP32H4DUT(IDFDUT): + TARGET = 'esp32h4' TOOLCHAIN_PREFIX = 'riscv32-esp-elf-' @classmethod def get_rom(cls): - return targets.ESP32H2ROM + return targets.ESP32H4ROM class ESP8266DUT(IDFDUT): @@ -650,7 +650,7 @@ class ESP8266DUT(IDFDUT): def get_target_by_rom_class(cls): - for c in [ESP32DUT, ESP32S2DUT, ESP32S3DUT, ESP32C2DUT, ESP32C3DUT, ESP32C6DUT, ESP32H2DUT, ESP8266DUT, IDFQEMUDUT]: + for c in [ESP32DUT, ESP32S2DUT, ESP32S3DUT, ESP32C2DUT, ESP32C3DUT, ESP32C6DUT, ESP32H4DUT, ESP8266DUT, IDFQEMUDUT]: if c.get_rom() == cls: return c.TARGET return None diff --git a/tools/ci/python_packages/ttfw_idf/__init__.py b/tools/ci/python_packages/ttfw_idf/__init__.py index af5fae6f66..b9b9936a22 100644 --- a/tools/ci/python_packages/ttfw_idf/__init__.py +++ b/tools/ci/python_packages/ttfw_idf/__init__.py @@ -15,7 +15,7 @@ from tiny_test_fw import TinyFW, Utility from .DebugUtils import CustomProcess, GDBBackend, OCDBackend # noqa: export DebugUtils for users from .IDFApp import UT, ComponentUTApp, Example, IDFApp, LoadableElfTestApp, TestApp # noqa: export all Apps for users from .IDFDUT import (ESP32C2DUT, ESP32C3DUT, ESP32C3FPGADUT, ESP32C6DUT, ESP32DUT, # noqa: export DUTs for users - ESP32H2DUT, ESP32QEMUDUT, ESP32S2DUT, ESP32S3DUT, ESP32S3FPGADUT, ESP8266DUT, IDFDUT) + ESP32H4DUT, ESP32QEMUDUT, ESP32S2DUT, ESP32S3DUT, ESP32S3FPGADUT, ESP8266DUT, IDFDUT) from .unity_test_parser import TestFormat, TestResults # pass TARGET_DUT_CLS_DICT to Env.py to avoid circular dependency issue. @@ -28,7 +28,7 @@ TARGET_DUT_CLS_DICT = { 'ESP32C3FPGA': ESP32C3FPGADUT, 'ESP32S3FPGA': ESP32S3FPGADUT, 'ESP32C6': ESP32C6DUT, - 'ESP32H2': ESP32H2DUT, + 'ESP32H4': ESP32H4DUT, } diff --git a/tools/ci/test_build_system_cmake.sh b/tools/ci/test_build_system_cmake.sh index aa1807148e..1842a42f22 100755 --- a/tools/ci/test_build_system_cmake.sh +++ b/tools/ci/test_build_system_cmake.sh @@ -513,7 +513,7 @@ function run_tests() print_status "Test build ESP-IDF as a library to a custom CMake projects for all targets" IDF_AS_LIB=$IDF_PATH/examples/build_system/cmake/idf_as_lib # note: we just need to run cmake - for TARGET in "esp32" "esp32s2" "esp32s3" "esp32c3" "esp32h2" "esp32c2" "esp32c6" + for TARGET in "esp32" "esp32s2" "esp32s3" "esp32c3" "esp32h4" "esp32c2" "esp32c6" do echo "Build idf_as_lib for $TARGET target" rm -rf build diff --git a/tools/cmake/dfu.cmake b/tools/cmake/dfu.cmake index 8db0a6199e..3de89d4b26 100644 --- a/tools/cmake/dfu.cmake +++ b/tools/cmake/dfu.cmake @@ -11,7 +11,7 @@ function(__add_dfu_targets) set(dfu_pid "9") elseif("${target}" STREQUAL "esp32c3") return() - elseif("${target}" STREQUAL "esp32h2") + elseif("${target}" STREQUAL "esp32h4") return() elseif("${target}" STREQUAL "esp32c2") return() diff --git a/tools/cmake/toolchain-esp32h2.cmake b/tools/cmake/toolchain-esp32h4.cmake similarity index 100% rename from tools/cmake/toolchain-esp32h2.cmake rename to tools/cmake/toolchain-esp32h4.cmake diff --git a/tools/cmake/uf2.cmake b/tools/cmake/uf2.cmake index 4e80d8decf..aa00d5df3c 100644 --- a/tools/cmake/uf2.cmake +++ b/tools/cmake/uf2.cmake @@ -12,6 +12,8 @@ function(__add_uf2_targets) set(uf2_family_id "0xc47e5767") elseif("${target}" STREQUAL "esp32h2") set(uf2_family_id "0x332726f6") + elseif("${target}" STREQUAL "esp32h4") + return() elseif("${target}" STREQUAL "esp32c2") set(uf2_family_id "0x2b88d29c") elseif("${target}" STREQUAL "esp32c6") # TODO: IDF-5626 diff --git a/tools/gdb_panic_server.py b/tools/gdb_panic_server.py index eeef4321aa..e93bb074ea 100644 --- a/tools/gdb_panic_server.py +++ b/tools/gdb_panic_server.py @@ -59,7 +59,7 @@ GDB_REGS_INFO_RISCV_ILP32 = [ GDB_REGS_INFO = { 'esp32c3': GDB_REGS_INFO_RISCV_ILP32, 'esp32c2': GDB_REGS_INFO_RISCV_ILP32, - 'esp32h2': GDB_REGS_INFO_RISCV_ILP32, + 'esp32h4': GDB_REGS_INFO_RISCV_ILP32, 'esp32c6': GDB_REGS_INFO_RISCV_ILP32 } @@ -154,7 +154,7 @@ def parse_idf_riscv_panic_output(panic_text): # type: (str) -> PanicInfo PANIC_OUTPUT_PARSERS = { 'esp32c3': parse_idf_riscv_panic_output, 'esp32c2': parse_idf_riscv_panic_output, - 'esp32h2': parse_idf_riscv_panic_output, + 'esp32h4': parse_idf_riscv_panic_output, 'esp32c6': parse_idf_riscv_panic_output } diff --git a/tools/idf_py_actions/constants.py b/tools/idf_py_actions/constants.py index 5311d8c7d5..0cb9197fe8 100644 --- a/tools/idf_py_actions/constants.py +++ b/tools/idf_py_actions/constants.py @@ -33,7 +33,7 @@ if os.name != 'nt': URL_TO_DOC = 'https://docs.espressif.com/projects/esp-idf' SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3', 'esp32c2'] -PREVIEW_TARGETS = ['linux', 'esp32h2', 'esp32c6'] +PREVIEW_TARGETS = ['linux', 'esp32h4', 'esp32c6'] OPENOCD_TAGET_CONFIG_DEFAULT = '-f interface/ftdi/esp32_devkitj_v1.cfg -f target/{target}.cfg' OPENOCD_TAGET_CONFIG: Dict[str, str] = { diff --git a/tools/idf_size_yaml/esp32h2_data_info.yaml b/tools/idf_size_yaml/esp32h4_data_info.yaml similarity index 100% rename from tools/idf_size_yaml/esp32h2_data_info.yaml rename to tools/idf_size_yaml/esp32h4_data_info.yaml diff --git a/tools/test_apps/.build-test-rules.yml b/tools/test_apps/.build-test-rules.yml index 6c25a5fd5b..93ce232883 100644 --- a/tools/test_apps/.build-test-rules.yml +++ b/tools/test_apps/.build-test-rules.yml @@ -97,7 +97,7 @@ tools/test_apps/system/cxx_no_except: tools/test_apps/system/eh_frame: enable: - - if: IDF_TARGET in ["esp32c2", "esp32c3", "esp32h2"] + - if: IDF_TARGET in ["esp32c2", "esp32c3", "esp32h4"] temporary: true reason: the other targets are not tested yet @@ -109,7 +109,7 @@ tools/test_apps/system/flash_psram: tools/test_apps/system/g0_components: enable: - - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h2", "esp32c6"] # preview targets + - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h4", "esp32c6"] # preview targets tools/test_apps/system/g1_components: disable: @@ -161,7 +161,7 @@ tools/test_apps/system/no_embedded_paths: tools/test_apps/system/panic: enable: - - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "esp32h2" + - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "esp32h4" disable: - if: IDF_TARGET == "esp32c2" temporary: true @@ -173,4 +173,4 @@ tools/test_apps/system/panic: tools/test_apps/system/startup: enable: - - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h2", "esp32c6"] # preview targets + - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32h4", "esp32c6"] # preview targets diff --git a/tools/test_apps/system/eh_frame/README.md b/tools/test_apps/system/eh_frame/README.md index f6d8233c04..95fbea0c46 100644 --- a/tools/test_apps/system/eh_frame/README.md +++ b/tools/test_apps/system/eh_frame/README.md @@ -1,16 +1,16 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H2 | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-H4 | | ----------------- | -------- | -------- | -------- | # Building and running The main goal of this test is to check whether the compiler/linker generates non-empty sections `.eh_frame` and `.eh_frame_hdr`. - + Thus, as soon as this example compiles we can considered it passed. However, it will also print the addresses of both sections on the UART. In order to build and run the example, use the following commands: ``` -idf.py set-target +idf.py set-target idf.py build idf.py flash monitor -``` +``` diff --git a/tools/test_apps/system/g0_components/README.md b/tools/test_apps/system/g0_components/README.md index bea7ca0e46..6060d89b20 100644 --- a/tools/test_apps/system/g0_components/README.md +++ b/tools/test_apps/system/g0_components/README.md @@ -1,4 +1,4 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | # "G0"-components-only app @@ -22,7 +22,7 @@ Then, trigger the build: idf.py build ``` -Build should be successful if there is no dependency problem between G0 and upper layers. +Build should be successful if there is no dependency problem between G0 and upper layers. # Component dependencies graph (`component_deps.dot`) diff --git a/tools/test_apps/system/panic/README.md b/tools/test_apps/system/panic/README.md index 9910b8a090..f2cb9a86b8 100644 --- a/tools/test_apps/system/panic/README.md +++ b/tools/test_apps/system/panic/README.md @@ -1,8 +1,8 @@ -| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | # Building -Several configurations are provided as `sdkconfig.ci.XXX` and serve as a template. +Several configurations are provided as `sdkconfig.ci.XXX` and serve as a template. ## Example with configuration "panic" for target ESP32 ``` @@ -22,6 +22,6 @@ Multiple test cases are passed as additional arguments: ``` python app_test.py test_panic_illegal_instruction test_panic_int_wdt test_panic_storeprohibited -``` +``` *Note that you need to pick the correct test cases at run time according to the configuration you built before. The above examples are for configuration "panic"* diff --git a/tools/test_apps/system/startup/README.md b/tools/test_apps/system/startup/README.md index a8b7833fa3..c7ab5f4044 100644 --- a/tools/test_apps/system/startup/README.md +++ b/tools/test_apps/system/startup/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H4 | ESP32-S2 | ESP32-S3 | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/tools/test_idf_size/app_esp32h2.map b/tools/test_idf_size/app_esp32h4.map similarity index 99% rename from tools/test_idf_size/app_esp32h2.map rename to tools/test_idf_size/app_esp32h4.map index 2d74eab99a..7c346652e6 100644 --- a/tools/test_idf_size/app_esp32h2.map +++ b/tools/test_idf_size/app_esp32h4.map @@ -128,10 +128,10 @@ esp-idf/driver/libdriver.a(periph_ctrl.c.obj) esp-idf/driver/libdriver.a(uart.c.obj) (periph_module_enable) esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) esp-idf/esp_system/libesp_system.a(cpu_start.c.obj) (bootloader_init_mem) -esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) +esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) esp-idf/esp_system/libesp_system.a(cpu_start.c.obj) (bootloader_flash_update_id) esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) - esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) (bootloader_read_flash_id) + esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) (bootloader_read_flash_id) esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) (bootloader_execute_flash_command) esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -198,7 +198,7 @@ esp-idf/soc/libsoc.a(spi_periph.c.obj) esp-idf/spi_flash/libspi_flash.a(esp_flash_spi_init.c.obj) (spi_periph_signal) esp-idf/soc/libsoc.a(uart_periph.c.obj) esp-idf/driver/libdriver.a(uart.c.obj) (uart_periph_signal) -esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) +esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) (esp_cpu_configure_region_protection) esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) esp-idf/main/libmain.a(hello_world_main.c.obj) (esp_chip_info) @@ -244,7 +244,7 @@ esp-idf/bootloader_support/libbootloader_support.a(flash_partitions.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_common.c.obj) (esp_partition_table_verify) esp-idf/bootloader_support/libbootloader_support.a(bootloader_sha.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) (bootloader_sha256_start) -esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) +esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) (bootloader_random_disable) esp-idf/hal/libhal.a(gdma_hal.c.obj) esp-idf/driver/libdriver.a(gdma.c.obj) (gdma_hal_init) @@ -487,12 +487,12 @@ registered_heaps 0x4 esp-idf/heap/libheap.a(heap_caps_init.c.ob Discarded input sections - .text 0x0000000000000000 0x0 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h2.c.obj - .data 0x0000000000000000 0x0 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h2.c.obj - .bss 0x0000000000000000 0x0 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h2.c.obj - .comment 0x0000000000000000 0x26 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h2.c.obj + .text 0x0000000000000000 0x0 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h4.c.obj + .data 0x0000000000000000 0x0 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h4.c.obj + .bss 0x0000000000000000 0x0 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h4.c.obj + .comment 0x0000000000000000 0x26 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h4.c.obj .riscv.attributes - 0x0000000000000000 0x24 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h2.c.obj + 0x0000000000000000 0x24 CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h4.c.obj .text 0x0000000000000000 0x0 esp-idf/app_update/libapp_update.a(esp_app_desc.c.obj) .data 0x0000000000000000 0x0 esp-idf/app_update/libapp_update.a(esp_app_desc.c.obj) .bss 0x0000000000000000 0x0 esp-idf/app_update/libapp_update.a(esp_app_desc.c.obj) @@ -2044,13 +2044,13 @@ Discarded input sections .text 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) .data 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) .bss 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .text 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) - .data 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) - .bss 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) - .iram1.0 0x0000000000000000 0x3a esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) - .iram1.1 0x0000000000000000 0x46 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) - .iram1.2 0x0000000000000000 0x1c esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) - .iram1.3 0x0000000000000000 0x1c esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .text 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) + .data 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) + .bss 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) + .iram1.0 0x0000000000000000 0x3a esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) + .iram1.1 0x0000000000000000 0x46 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) + .iram1.2 0x0000000000000000 0x1c esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) + .iram1.3 0x0000000000000000 0x1c esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .text 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .data 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .bss 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) @@ -2477,9 +2477,9 @@ Discarded input sections .comment 0x0000000000000000 0x26 esp-idf/soc/libsoc.a(uart_periph.c.obj) .riscv.attributes 0x0000000000000000 0x24 esp-idf/soc/libsoc.a(uart_periph.c.obj) - .text 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) - .data 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) - .bss 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .text 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) + .data 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) + .bss 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .text 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .data 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .bss 0x0000000000000000 0x0 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) @@ -4001,24 +4001,24 @@ Discarded input sections .debug_frame 0x0000000000000000 0x78 esp-idf/bootloader_support/libbootloader_support.a(bootloader_sha.c.obj) .riscv.attributes 0x0000000000000000 0x24 esp-idf/bootloader_support/libbootloader_support.a(bootloader_sha.c.obj) - .text 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .data 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .bss 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) + .text 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .data 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .bss 0x0000000000000000 0x0 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) .text.bootloader_random_enable - 0x0000000000000000 0x2 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) + 0x0000000000000000 0x2 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) .text.bootloader_random_disable - 0x0000000000000000 0x2 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .debug_info 0x0000000000000000 0x9de esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .debug_abbrev 0x0000000000000000 0x1ad esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) + 0x0000000000000000 0x2 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .debug_info 0x0000000000000000 0x9de esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .debug_abbrev 0x0000000000000000 0x1ad esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) .debug_aranges - 0x0000000000000000 0x28 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .debug_ranges 0x0000000000000000 0x18 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .debug_line 0x0000000000000000 0x309 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .debug_str 0x0000000000000000 0x6f8 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .comment 0x0000000000000000 0x26 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) - .debug_frame 0x0000000000000000 0x30 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) + 0x0000000000000000 0x28 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .debug_ranges 0x0000000000000000 0x18 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .debug_line 0x0000000000000000 0x309 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .debug_str 0x0000000000000000 0x6f8 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .comment 0x0000000000000000 0x26 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) + .debug_frame 0x0000000000000000 0x30 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) .riscv.attributes - 0x0000000000000000 0x24 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) + 0x0000000000000000 0x24 esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) .text 0x0000000000000000 0x0 esp-idf/hal/libhal.a(gdma_hal.c.obj) .data 0x0000000000000000 0x0 esp-idf/hal/libhal.a(gdma_hal.c.obj) .bss 0x0000000000000000 0x0 esp-idf/hal/libhal.a(gdma_hal.c.obj) @@ -5468,7 +5468,7 @@ rtc_iram_seg 0x0000000050000000 0x0000000000002000 xrw Linker script and memory map -LOAD CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h2.c.obj +LOAD CMakeFiles/hello-world.elf.dir/project_elf_src_esp32h4.c.obj LOAD esp-idf/esp_ringbuf/libesp_ringbuf.a LOAD esp-idf/efuse/libefuse.a LOAD esp-idf/esp_ipc/libesp_ipc.a @@ -5837,13 +5837,13 @@ LOAD esp-idf/esp_serial_slave_link/libesp_serial_slave_link.a LOAD esp-idf/mbedtls/mbedtls/library/libmbedtls.a LOAD esp-idf/mbedtls/mbedtls/library/libmbedcrypto.a LOAD esp-idf/mbedtls/mbedtls/library/libmbedx509.a -LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h2\libphy.a -LOAD /home/xy/esp/esp-idf/components/ieee802154/lib/esp32h2/lib802154.a -LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h2\libbtbb.a +LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h4\libphy.a +LOAD /home/xy/esp/esp-idf/components/ieee802154/lib/esp32h4/lib802154.a +LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h4\libbtbb.a LOAD esp-idf/esp_phy/libesp_phy.a -LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h2\libphy.a +LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h4\libphy.a LOAD esp-idf/esp_phy/libesp_phy.a -LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h2\libphy.a +LOAD /home/xy/esp/esp-idf/components/esp_phy/lib/esp32h4\libphy.a LOAD esp-idf/newlib/libnewlib.a LOAD /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libstdc++.a LOAD esp-idf/pthread/libpthread.a @@ -5940,7 +5940,7 @@ END GROUP 0x0000000040380000 _vector_table 0x0000000040380104 _interrupt_handler 0x000000004038020c . = ALIGN (0x4) - *fill* 0x000000004038020a 0x2 + *fill* 0x000000004038020a 0x2 0x000000004038020c _invalid_pc_placeholder = ABSOLUTE (.) 0x000000004038020c _iram_text_start = ABSOLUTE (.) *(.iram1 .iram1.*) @@ -6960,7 +6960,7 @@ END GROUP .dram0.dummy 0x000000003fc80000 0x9200 0x000000003fc89200 . = ((ORIGIN (dram0_0_seg) + _iram_end) - _iram_start) - *fill* 0x000000003fc80000 0x9200 + *fill* 0x000000003fc80000 0x9200 .dram0.data 0x000000003fc89200 0x1300 0x000000003fc89200 _data_start = ABSOLUTE (.) @@ -6973,7 +6973,7 @@ END GROUP *(.sdata.*) .sdata.first_call.3866 0x000000003fc89204 0x1 esp-idf/app_update/libapp_update.a(esp_app_desc.c.obj) - *fill* 0x000000003fc89205 0x3 + *fill* 0x000000003fc89205 0x3 .sdata.rtc_wdt_ctx 0x000000003fc89208 0x8 esp-idf/esp_system/libesp_system.a(panic.c.obj) .sdata.s_panic_uart @@ -7014,24 +7014,24 @@ END GROUP 0x000000003fc89258 0x8 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) .sdata2.chip_name 0x000000003fc89260 0x5 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_issi.c.obj) - *fill* 0x000000003fc89265 0x3 + *fill* 0x000000003fc89265 0x3 .sdata2.chip_name 0x000000003fc89268 0x5 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_mxic.c.obj) - *fill* 0x000000003fc8926d 0x3 + *fill* 0x000000003fc8926d 0x3 .sdata2.chip_name 0x000000003fc89270 0x3 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_gd.c.obj) - *fill* 0x000000003fc89273 0x1 + *fill* 0x000000003fc89273 0x1 .sdata2.TAG 0x000000003fc89274 0x8 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_winbond.c.obj) .sdata2.chip_name 0x000000003fc8927c 0x8 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_winbond.c.obj) .sdata2.chip_name 0x000000003fc89284 0x5 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_boya.c.obj) - *fill* 0x000000003fc89289 0x3 + *fill* 0x000000003fc89289 0x3 .sdata2.TAG 0x000000003fc8928c 0x7 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) - *fill* 0x000000003fc89293 0x1 + *fill* 0x000000003fc89293 0x1 .sdata2.esp_unknown_msg 0x000000003fc89294 0x6 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) - *fill* 0x000000003fc8929a 0x2 + *fill* 0x000000003fc8929a 0x2 .sdata2.WAFER_VERSION 0x000000003fc8929c 0x4 esp-idf/efuse/libefuse.a(esp_efuse_table.c.obj) .sdata2.g_spi_lock_main_flash_dev @@ -7049,7 +7049,7 @@ END GROUP 0x000000003fc892ac 0xc0 esp-idf/vfs/libvfs.a(vfs.c.obj) .data.s_context 0x000000003fc8936c 0x48 esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003fc893b4 0x4 + *fill* 0x000000003fc893b4 0x4 .data.timestamp_id.4851 0x000000003fc893b8 0x10 esp-idf/esp_timer/libesp_timer.a(esp_timer_impl_systimer.c.obj) .data.s_stub_table @@ -7073,7 +7073,7 @@ END GROUP .dram1.5 0x000000003fc89548 0x24 esp-idf/spi_flash/libspi_flash.a(spi_flash_os_func_noos.c.obj) 0x000000003fc89548 esp_flash_noos_functions .dram1.0 0x000000003fc8956c 0x6 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) - *fill* 0x000000003fc89572 0x2 + *fill* 0x000000003fc89572 0x2 .dram1.1 0x000000003fc89574 0x18 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) .dram1.2 0x000000003fc8958c 0x4 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) 0x000000003fc8958c rom_flash_chip_dummy @@ -7081,9 +7081,9 @@ END GROUP 0x000000003fc89590 spi_flash_chip_generic_timeout .dram1.19 0x000000003fc895a4 0x58 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) .dram1.27 0x000000003fc895fc 0x6 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003fc89602 0x2 + *fill* 0x000000003fc89602 0x2 .dram1.28 0x000000003fc89604 0x6 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003fc8960a 0x2 + *fill* 0x000000003fc8960a 0x2 .dram1.29 0x000000003fc8960c 0x8 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) .dram1.30 0x000000003fc89614 0x19 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) 0x000000003fc8962d _coredump_dram_start = ABSOLUTE (.) @@ -7094,7 +7094,7 @@ END GROUP 0x000000003fc8962d _bt_data_start = ABSOLUTE (.) *libbt.a:(.data .data.*) 0x000000003fc89630 . = ALIGN (0x4) - *fill* 0x000000003fc8962d 0x3 + *fill* 0x000000003fc8962d 0x3 0x000000003fc89630 _bt_data_end = ABSOLUTE (.) 0x000000003fc89630 _btdm_data_start = ABSOLUTE (.) *libbtdm_app.a:(.data .data.*) @@ -7104,7 +7104,7 @@ END GROUP .rodata.rtc_clk_xtal_freq_get.str1.4 0x000000003fc89630 0x47 esp-idf/esp_hw_support/libesp_hw_support.a(rtc_clk.c.obj) *libesp_system.a:esp_err.*(.rodata .rodata.*) - *fill* 0x000000003fc89677 0x1 + *fill* 0x000000003fc89677 0x1 .rodata._esp_error_check_failed.str1.4 0x000000003fc89678 0x10 esp-idf/esp_system/libesp_system.a(esp_err.c.obj) .rodata.esp_error_check_failed_print.str1.4 @@ -7126,82 +7126,82 @@ END GROUP 0x000000003fc896e4 0x55 esp-idf/hal/libhal.a(systimer_hal.c.obj) *libhal.a:wdt_hal_iram.*(.rodata .rodata.*) *libheap.a:heap_tlsf.*(.rodata .rodata.*) - *fill* 0x000000003fc89739 0x3 + *fill* 0x000000003fc89739 0x3 .rodata.__func__.3670 0x000000003fc8973c 0x16 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89752 0x2 + *fill* 0x000000003fc89752 0x2 .rodata.__func__.3679 0x000000003fc89754 0x12 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89766 0x2 + *fill* 0x000000003fc89766 0x2 .rodata.__func__.3687 0x000000003fc89768 0x12 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc8977a 0x2 + *fill* 0x000000003fc8977a 0x2 .rodata.__func__.3710 0x000000003fc8977c 0xc esp-idf/heap/libheap.a(heap_tlsf.c.obj) .rodata.__func__.3715 0x000000003fc89788 0xd esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89795 0x3 + *fill* 0x000000003fc89795 0x3 .rodata.__func__.3721 0x000000003fc89798 0x11 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc897a9 0x3 + *fill* 0x000000003fc897a9 0x3 .rodata.__func__.3727 0x000000003fc897ac 0x11 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc897bd 0x3 + *fill* 0x000000003fc897bd 0x3 .rodata.__func__.3733 0x000000003fc897c0 0x10 esp-idf/heap/libheap.a(heap_tlsf.c.obj) .rodata.__func__.3740 0x000000003fc897d0 0x10 esp-idf/heap/libheap.a(heap_tlsf.c.obj) .rodata.__func__.3755 0x000000003fc897e0 0x12 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc897f2 0x2 + *fill* 0x000000003fc897f2 0x2 .rodata.__func__.3762 0x000000003fc897f4 0x13 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89807 0x1 + *fill* 0x000000003fc89807 0x1 .rodata.__func__.3925 0x000000003fc89808 0xa esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89812 0x2 + *fill* 0x000000003fc89812 0x2 .rodata.__func__.3938 0x000000003fc89814 0xd esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89821 0x3 + *fill* 0x000000003fc89821 0x3 .rodata.default_walker.str1.4 0x000000003fc89824 0x26 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc8984a 0x2 + *fill* 0x000000003fc8984a 0x2 .rodata.integrity_walker.str1.4 0x000000003fc8984c 0x96 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc898e2 0x2 + *fill* 0x000000003fc898e2 0x2 .rodata.tlsf_add_pool.str1.4 0x000000003fc898e4 0x142 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89a26 0x2 + *fill* 0x000000003fc89a26 0x2 .rodata.tlsf_create.str1.4 0x000000003fc89a28 0x32 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89a5a 0x2 + *fill* 0x000000003fc89a5a 0x2 .rodata.tlsf_free.str1.4 0x000000003fc89a5c 0x148 esp-idf/heap/libheap.a(heap_tlsf.c.obj) .rodata.tlsf_malloc.str1.4 0x000000003fc89ba4 0x1a7 esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89d4b 0x1 + *fill* 0x000000003fc89d4b 0x1 .rodata.tlsf_realloc.str1.4 0x000000003fc89d4c 0x2e esp-idf/heap/libheap.a(heap_tlsf.c.obj) - *fill* 0x000000003fc89d7a 0x2 + *fill* 0x000000003fc89d7a 0x2 .rodata.tlsf_remove_pool.str1.4 0x000000003fc89d7c 0xe6 esp-idf/heap/libheap.a(heap_tlsf.c.obj) *libheap.a:multi_heap.*(.rodata .rodata.*) - *fill* 0x000000003fc89e62 0x2 + *fill* 0x000000003fc89e62 0x2 .rodata.__func__.4515 0x000000003fc89e64 0x19 esp-idf/heap/libheap.a(multi_heap.c.obj) - *fill* 0x000000003fc89e7d 0x3 + *fill* 0x000000003fc89e7d 0x3 .rodata.__func__.4556 0x000000003fc89e80 0x18 esp-idf/heap/libheap.a(multi_heap.c.obj) .rodata.assert_valid_block.str1.4 0x000000003fc89e98 0x32 esp-idf/heap/libheap.a(multi_heap.c.obj) - *fill* 0x000000003fc89eca 0x2 + *fill* 0x000000003fc89eca 0x2 .rodata.multi_heap_get_first_block.str1.4 0x000000003fc89ecc 0xd esp-idf/heap/libheap.a(multi_heap.c.obj) - *fill* 0x000000003fc89ed9 0x3 + *fill* 0x000000003fc89ed9 0x3 .rodata.multi_heap_register_impl.str1.4 0x000000003fc89edc 0x2d esp-idf/heap/libheap.a(multi_heap.c.obj) *libnewlib.a:abort.*(.rodata .rodata.*) - *fill* 0x000000003fc89f09 0x3 + *fill* 0x000000003fc89f09 0x3 .rodata.abort.str1.4 0x000000003fc89f0c 0x26 esp-idf/newlib/libnewlib.a(abort.c.obj) *libnewlib.a:heap.*(.rodata .rodata.*) @@ -7209,27 +7209,27 @@ END GROUP 0x000000003fc89f32 _nimble_data_start = ABSOLUTE (.) *libnimble.a:(.data .data.*) 0x000000003fc89f34 . = ALIGN (0x4) - *fill* 0x000000003fc89f32 0x2 + *fill* 0x000000003fc89f32 0x2 0x000000003fc89f34 _nimble_data_end = ABSOLUTE (.) *libphy.a:(.rodata .rodata.*) *libsoc.a:lldesc.*(.rodata .rodata.*) *libspi_flash.a:memspi_host_driver.*(.rodata .rodata.*) .rodata.__func__.5445 0x000000003fc89f34 0x19 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) - *fill* 0x000000003fc89f4d 0x3 + *fill* 0x000000003fc89f4d 0x3 .rodata.__func__.5451 0x000000003fc89f50 0x18 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) .rodata.__func__.5459 0x000000003fc89f68 0x19 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) - *fill* 0x000000003fc89f81 0x3 + *fill* 0x000000003fc89f81 0x3 .rodata.esp_flash_gpspi_host 0x000000003fc89f84 0x58 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) .rodata.memspi_host_erase_sector.str1.4 0x000000003fc89fdc 0x4a esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) - *fill* 0x000000003fc8a026 0x2 + *fill* 0x000000003fc8a026 0x2 .rodata.memspi_host_program_page.str1.4 0x000000003fc8a028 0x1e esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) - *fill* 0x000000003fc8a046 0x2 + *fill* 0x000000003fc8a046 0x2 .rodata.memspi_host_read_id_hs.str1.4 0x000000003fc8a048 0x24 esp-idf/spi_flash/libspi_flash.a(memspi_host_driver.c.obj) *libspi_flash.a:spi_flash_chip_boya.*(.rodata .rodata.*) @@ -7242,26 +7242,26 @@ END GROUP 0x000000003fc8a0e4 esp_flash_chip_gd *libspi_flash.a:spi_flash_chip_generic.*(.rodata .rodata.*) .rodata.TAG 0x000000003fc8a15c 0xd esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) - *fill* 0x000000003fc8a169 0x3 + *fill* 0x000000003fc8a169 0x3 .rodata.__func__.4205 0x000000003fc8a16c 0x29 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) - *fill* 0x000000003fc8a195 0x3 + *fill* 0x000000003fc8a195 0x3 .rodata.esp_flash_chip_generic 0x000000003fc8a198 0x78 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) 0x000000003fc8a198 esp_flash_chip_generic .rodata.spi_flash_chip_generic_get_write_protect.str1.4 0x000000003fc8a210 0x4a esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) - *fill* 0x000000003fc8a25a 0x2 + *fill* 0x000000003fc8a25a 0x2 .rodata.spi_flash_chip_generic_read.str1.4 0x000000003fc8a25c 0x43 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) - *fill* 0x000000003fc8a29f 0x1 + *fill* 0x000000003fc8a29f 0x1 .rodata.spi_flash_chip_generic_read_unique_id.str1.4 0x000000003fc8a2a0 0x52 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) - *fill* 0x000000003fc8a2f2 0x2 + *fill* 0x000000003fc8a2f2 0x2 .rodata.spi_flash_chip_generic_suspend_cmd_conf.str1.4 0x000000003fc8a2f4 0x5f esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_generic.c.obj) *libspi_flash.a:spi_flash_chip_issi.*(.rodata .rodata.*) - *fill* 0x000000003fc8a353 0x1 + *fill* 0x000000003fc8a353 0x1 .rodata.esp_flash_chip_issi 0x000000003fc8a354 0x78 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_issi.c.obj) 0x000000003fc8a354 esp_flash_chip_issi @@ -7272,7 +7272,7 @@ END GROUP .rodata.spi_flash_chip_mxic_read_unique_id.str1.4 0x000000003fc8a444 0x41 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_mxic.c.obj) *libspi_flash.a:spi_flash_chip_winbond.*(.rodata .rodata.*) - *fill* 0x000000003fc8a485 0x3 + *fill* 0x000000003fc8a485 0x3 .rodata.esp_flash_chip_winbond 0x000000003fc8a488 0x78 esp-idf/spi_flash/libspi_flash.a(spi_flash_chip_winbond.c.obj) 0x000000003fc8a488 esp_flash_chip_winbond @@ -7300,7 +7300,7 @@ END GROUP 0x000000003fc8a534 0xf8 esp-idf/log/liblog.a(log.c.obj) .bss.s_intr_handlers 0x000000003fc8a62c 0x100 esp-idf/riscv/libriscv.a(interrupt.c.obj) - *fill* 0x000000003fc8a72c 0x4 + *fill* 0x000000003fc8a72c 0x4 .bss.xIsrStack 0x000000003fc8a730 0x600 esp-idf/freertos/libfreertos.a(port.c.obj) .bss.pxReadyTasksLists @@ -7331,7 +7331,7 @@ END GROUP .bss.s_reent 0x000000003fc8b030 0xf0 esp-idf/newlib/libnewlib.a(newlib_init.c.obj) .bss.ref_counts 0x000000003fc8b120 0x1b esp-idf/driver/libdriver.a(periph_ctrl.c.obj) - *fill* 0x000000003fc8b13b 0x1 + *fill* 0x000000003fc8b13b 0x1 .bss.s_mmap_page_refcnt 0x000000003fc8b13c 0x80 esp-idf/spi_flash/libspi_flash.a(flash_mmap.c.obj) .bss.idle_cb 0x000000003fc8b1bc 0x20 esp-idf/esp_system/libesp_system.a(freertos_hooks.c.obj) @@ -7352,7 +7352,7 @@ END GROUP .sbss.g_panic_abort 0x000000003fc8b218 0x1 esp-idf/esp_system/libesp_system.a(panic.c.obj) 0x000000003fc8b218 g_panic_abort - *fill* 0x000000003fc8b219 0x3 + *fill* 0x000000003fc8b219 0x3 .sbss.s_panic_abort_details 0x000000003fc8b21c 0x4 esp-idf/esp_system/libesp_system.a(panic.c.obj) .sbss.g_exc_frames @@ -7386,7 +7386,7 @@ END GROUP 0x000000003fc8b254 0x4 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) .sbss.non_iram_int_disabled_flag 0x000000003fc8b258 0x1 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) - *fill* 0x000000003fc8b259 0x3 + *fill* 0x000000003fc8b259 0x3 .sbss.non_iram_int_mask 0x000000003fc8b25c 0x4 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) .sbss.vector_desc_head @@ -8012,7 +8012,7 @@ END GROUP 0x0000000042005c6c 0xe esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) 0x0000000042005c6c bootloader_init_mem .text.bootloader_flash_update_id - 0x0000000042005c7a 0x1a esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + 0x0000000042005c7a 0x1a esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) 0x0000000042005c7a bootloader_flash_update_id .text.bootloader_read_flash_id 0x0000000042005c94 0x3a esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) @@ -8152,7 +8152,7 @@ END GROUP 0x0000000042006e4c 0xe esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) 0x0000000042006e4c interrupt_controller_hal_desc_flags .text.esp_cpu_configure_region_protection - 0x0000000042006e5a 0xfa esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + 0x0000000042006e5a 0xfa esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) 0x0000000042006e5a esp_cpu_configure_region_protection .text.esp_chip_info 0x0000000042006f54 0x46 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) @@ -8203,7 +8203,7 @@ END GROUP .text.esp_ota_get_running_partition 0x00000000420074c4 0xba esp-idf/app_update/libapp_update.a(esp_ota_ops.c.obj) 0x00000000420074c4 esp_ota_get_running_partition - *fill* 0x000000004200757e 0x2 + *fill* 0x000000004200757e 0x2 .text 0x0000000042007580 0x7c /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-assert.o) 0x0000000042007580 __assert_func 0x00000000420075e8 __assert @@ -8355,7 +8355,7 @@ END GROUP *(.fini) *(.gnu.version) 0x0000000042014d24 . = (. + 0x10) - *fill* 0x0000000042014d14 0x10 + *fill* 0x0000000042014d14 0x10 0x0000000042014d24 _text_end = ABSOLUTE (.) 0x0000000042014d24 _instruction_reserved_end = ABSOLUTE (.) 0x0000000042014d24 _etext = . @@ -8366,9 +8366,9 @@ END GROUP 0x000000003c000020 _flash_rodata_dummy_start = . 0x000000003c000020 . = ALIGN (ALIGNOF (.flash.text)) 0x000000003c014d24 . = (. + SIZEOF (.flash.text)) - *fill* 0x000000003c000020 0x14d04 + *fill* 0x000000003c000020 0x14d04 0x000000003c020020 . = (ALIGN (0x10000) + 0x20) - *fill* 0x000000003c014d24 0xb2fc + *fill* 0x000000003c014d24 0xb2fc 0x000000003c020020 _rodata_reserved_start = . .flash.appdesc 0x000000003c020020 0x100 @@ -8384,13 +8384,13 @@ END GROUP *(EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:memspi_host_driver.* *libsoc.a:lldesc.* *libnewlib.a:stdatomic.* *libnewlib.a:heap.* *libnewlib.a:abort.* *libheap.a:multi_heap.* *libheap.a:heap_tlsf.* *libhal.a:wdt_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:spi_slave_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:soc_hal.* *libhal.a:ledc_hal_iram.* *libhal.a:i2c_hal_iram.* *libhal.a:cpu_hal.* *libgcc.a:_divsf3.* *libesp_system.a:ubsan.* *libesp_system.a:esp_err.* *libesp_hw_support.a:rtc_clk.* *libapp_trace.a:app_trace_util.* *libapp_trace.a:app_trace.* *libphy.a *libgcov.a) .rodata EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libspi_flash.a:spi_flash_chip_winbond.* *libspi_flash.a:spi_flash_chip_mxic.* *libspi_flash.a:spi_flash_chip_issi.* *libspi_flash.a:spi_flash_chip_generic.* *libspi_flash.a:spi_flash_chip_gd.* *libspi_flash.a:spi_flash_chip_boya.* *libspi_flash.a:memspi_host_driver.* *libsoc.a:lldesc.* *libnewlib.a:stdatomic.* *libnewlib.a:heap.* *libnewlib.a:abort.* *libheap.a:multi_heap.* *libheap.a:heap_tlsf.* *libhal.a:wdt_hal_iram.* *libhal.a:systimer_hal.* *libhal.a:spi_slave_hal_iram.* *libhal.a:spi_hal_iram.* *libhal.a:spi_flash_hal_iram.* *libhal.a:spi_flash_hal_gpspi.* *libhal.a:spi_flash_encrypt_hal_iram.* *libhal.a:soc_hal.* *libhal.a:ledc_hal_iram.* *libhal.a:i2c_hal_iram.* *libhal.a:cpu_hal.* *libgcc.a:_divsf3.* *libesp_system.a:ubsan.* *libesp_system.a:esp_err.* *libesp_hw_support.a:rtc_clk.* *libapp_trace.a:app_trace_util.* *libapp_trace.a:app_trace.* *libphy.a *libgcov.a) .rodata.*) .rodata.s_warn.str1.4 0x000000003c020120 0x6b esp-idf/esp_system/libesp_system.a(fpga_overrides.c.obj) - *fill* 0x000000003c02018b 0x1 + *fill* 0x000000003c02018b 0x1 .rodata.str1.4 0x000000003c02018c 0x9e esp-idf/esp_system/libesp_system.a(cpu_start.c.obj) - *fill* 0x000000003c02022a 0x2 + *fill* 0x000000003c02022a 0x2 .rodata.__func__.12546 0x000000003c02022c 0xd esp-idf/esp_system/libesp_system.a(startup.c.obj) - *fill* 0x000000003c020239 0x3 + *fill* 0x000000003c020239 0x3 .rodata.do_core_init.str1.4 0x000000003c02023c 0x7c esp-idf/esp_system/libesp_system.a(startup.c.obj) 0x80 (size before relaxing) @@ -8400,7 +8400,7 @@ END GROUP .rodata.esp_panic_handler.str1.4 0x000000003c020420 0x83 esp-idf/esp_system/libesp_system.a(panic.c.obj) 0x87 (size before relaxing) - *fill* 0x000000003c0204a3 0x1 + *fill* 0x000000003c0204a3 0x1 .rodata.frame_to_panic_info.str1.4 0x000000003c0204a4 0x8 esp-idf/esp_system/libesp_system.a(panic_handler.c.obj) .rodata.print_state_for_core.str1.4 @@ -8408,109 +8408,109 @@ END GROUP .rodata 0x000000003c0204ac 0xdc esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) .rodata.panic_arch_fill_info.str1.4 0x000000003c020588 0x19 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) - *fill* 0x000000003c0205a1 0x3 + *fill* 0x000000003c0205a1 0x3 .rodata.panic_print_basic_backtrace.str1.4 0x000000003c0205a4 0x12 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) 0x23 (size before relaxing) - *fill* 0x000000003c0205b6 0x2 + *fill* 0x000000003c0205b6 0x2 .rodata.panic_print_registers.str1.4 0x000000003c0205b8 0x1b esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) 0x23 (size before relaxing) - *fill* 0x000000003c0205d3 0x1 + *fill* 0x000000003c0205d3 0x1 .rodata.panic_soc_fill_info.str1.4 0x000000003c0205d4 0x34 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) .rodata.print_cache_err_details.str1.4 0x000000003c020608 0x4b esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) - *fill* 0x000000003c020653 0x1 + *fill* 0x000000003c020653 0x1 .rodata.print_memprot_err_details.str1.4 0x000000003c020654 0x63 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) - *fill* 0x000000003c0206b7 0x1 + *fill* 0x000000003c0206b7 0x1 .rodata.pseudo_reason.3514 0x000000003c0206b8 0x10 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) .rodata.reason.3521 0x000000003c0206c8 0x40 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) .rodata.str1.4 0x000000003c020708 0x449 esp-idf/esp_system/libesp_system.a(panic_arch.c.obj) - *fill* 0x000000003c020b51 0x3 + *fill* 0x000000003c020b51 0x3 .rodata.__func__.6224 0x000000003c020b54 0xf esp-idf/vfs/libvfs.a(vfs.c.obj) - *fill* 0x000000003c020b63 0x1 + *fill* 0x000000003c020b63 0x1 .rodata.translate_path.str1.4 0x000000003c020b64 0x5d esp-idf/vfs/libvfs.a(vfs.c.obj) - *fill* 0x000000003c020bc1 0x3 + *fill* 0x000000003c020bc1 0x3 .rodata.__func__.7376 0x000000003c020bc4 0xb esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020bcf 0x1 + *fill* 0x000000003c020bcf 0x1 .rodata.__func__.7392 0x000000003c020bd0 0x11 esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020be1 0x3 + *fill* 0x000000003c020be1 0x3 .rodata.__func__.7398 0x000000003c020be4 0xa esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020bee 0x2 + *fill* 0x000000003c020bee 0x2 .rodata.__func__.7410 0x000000003c020bf0 0xb esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020bfb 0x1 + *fill* 0x000000003c020bfb 0x1 .rodata.__func__.7414 0x000000003c020bfc 0xb esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020c07 0x1 + *fill* 0x000000003c020c07 0x1 .rodata.__func__.7420 0x000000003c020c08 0xb esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020c13 0x1 + *fill* 0x000000003c020c13 0x1 .rodata.__func__.7430 0x000000003c020c14 0xb esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020c1f 0x1 + *fill* 0x000000003c020c1f 0x1 .rodata.__func__.7629 0x000000003c020c20 0x1a esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020c3a 0x2 + *fill* 0x000000003c020c3a 0x2 .rodata.esp_vfs_dev_uart_register.str1.4 0x000000003c020c3c 0x36 esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020c72 0x2 + *fill* 0x000000003c020c72 0x2 .rodata.uart_access.str1.4 0x000000003c020c74 0xb esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020c7f 0x1 + *fill* 0x000000003c020c7f 0x1 .rodata.uart_fcntl.str1.4 0x000000003c020c80 0x32 esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020cb2 0x2 + *fill* 0x000000003c020cb2 0x2 .rodata.uart_fsync.str1.4 0x000000003c020cb4 0x12 esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020cc6 0x2 + *fill* 0x000000003c020cc6 0x2 .rodata.uart_return_char.str1.4 0x000000003c020cc8 0x1d esp-idf/vfs/libvfs.a(vfs_uart.c.obj) - *fill* 0x000000003c020ce5 0x3 + *fill* 0x000000003c020ce5 0x3 .rodata.__func__.3664 0x000000003c020ce8 0x15 esp-idf/log/liblog.a(log.c.obj) - *fill* 0x000000003c020cfd 0x3 + *fill* 0x000000003c020cfd 0x3 .rodata.s_log_level_get_and_unlock.str1.4 0x000000003c020d00 0x65 esp-idf/log/liblog.a(log.c.obj) - *fill* 0x000000003c020d65 0x3 + *fill* 0x000000003c020d65 0x3 .rodata.__func__.4358 0x000000003c020d68 0x18 esp-idf/heap/libheap.a(heap_caps.c.obj) .rodata.__func__.4377 0x000000003c020d80 0x11 esp-idf/heap/libheap.a(heap_caps.c.obj) - *fill* 0x000000003c020d91 0x3 + *fill* 0x000000003c020d91 0x3 .rodata.__func__.4445 0x000000003c020d94 0xf esp-idf/heap/libheap.a(heap_caps.c.obj) - *fill* 0x000000003c020da3 0x1 + *fill* 0x000000003c020da3 0x1 .rodata.__func__.4454 0x000000003c020da4 0x12 esp-idf/heap/libheap.a(heap_caps.c.obj) - *fill* 0x000000003c020db6 0x2 + *fill* 0x000000003c020db6 0x2 .rodata.str1.4 0x000000003c020db8 0x119 esp-idf/heap/libheap.a(heap_caps.c.obj) - *fill* 0x000000003c020ed1 0x3 + *fill* 0x000000003c020ed1 0x3 .rodata.__func__.4368 0x000000003c020ed4 0xe esp-idf/heap/libheap.a(heap_caps_init.c.obj) - *fill* 0x000000003c020ee2 0x2 + *fill* 0x000000003c020ee2 0x2 .rodata.__func__.4399 0x000000003c020ee4 0xf esp-idf/heap/libheap.a(heap_caps_init.c.obj) - *fill* 0x000000003c020ef3 0x1 + *fill* 0x000000003c020ef3 0x1 .rodata.heap_caps_init.str1.4 0x000000003c020ef4 0xf4 esp-idf/heap/libheap.a(heap_caps_init.c.obj) .rodata.register_heap.str1.4 0x000000003c020fe8 0x41 esp-idf/heap/libheap.a(heap_caps_init.c.obj) - *fill* 0x000000003c021029 0x3 + *fill* 0x000000003c021029 0x3 .rodata.__func__.2850 0x000000003c02102c 0x1b esp-idf/heap/libheap.a(memory_layout_utils.c.obj) - *fill* 0x000000003c021047 0x1 + *fill* 0x000000003c021047 0x1 .rodata.s_prepare_reserved_regions.str1.4 0x000000003c021048 0x100 esp-idf/heap/libheap.a(memory_layout_utils.c.obj) .rodata.soc_memory_regions @@ -8521,33 +8521,33 @@ END GROUP 0x000000003c021188 soc_memory_types .rodata.str1.4 0x000000003c0211ec 0x2b esp-idf/heap/libheap.a(memory_layout.c.obj) - *fill* 0x000000003c021217 0x1 + *fill* 0x000000003c021217 0x1 .rodata.__func__.4845 0x000000003c021218 0x15 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) - *fill* 0x000000003c02122d 0x3 + *fill* 0x000000003c02122d 0x3 .rodata.__func__.4869 0x000000003c021230 0x14 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) .rodata.__func__.4936 0x000000003c021244 0xe esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) - *fill* 0x000000003c021252 0x2 + *fill* 0x000000003c021252 0x2 .rodata.__func__.4956 0x000000003c021254 0x11 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) - *fill* 0x000000003c021265 0x3 + *fill* 0x000000003c021265 0x3 .rodata.esp_intr_free.str1.4 0x000000003c021268 0x4 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) .rodata.find_desc_for_source.str1.4 0x000000003c02126c 0x37 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) - *fill* 0x000000003c0212a3 0x1 + *fill* 0x000000003c0212a3 0x1 .rodata.is_vect_desc_usable.str1.4 0x000000003c0212a4 0x43 esp-idf/esp_hw_support/libesp_hw_support.a(intr_alloc.c.obj) - *fill* 0x000000003c0212e7 0x1 + *fill* 0x000000003c0212e7 0x1 .rodata.__func__.3333 0x000000003c0212e8 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) .rodata.__func__.3466 0x000000003c021308 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) .rodata.__func__.3990 0x000000003c021328 0x1b esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) - *fill* 0x000000003c021343 0x1 + *fill* 0x000000003c021343 0x1 .rodata.esp_memprot_iram_set_pms_area.str1.4 0x000000003c021344 0x2c esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) .rodata.esp_memprot_mem_type_to_str.str1.4 @@ -8555,163 +8555,163 @@ END GROUP 0x29 (size before relaxing) .rodata.esp_memprot_pms_to_str.str1.4 0x000000003c02138c 0xdd esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) - *fill* 0x000000003c021469 0x3 + *fill* 0x000000003c021469 0x3 .rodata.esp_memprot_set_split_line.str1.4 0x000000003c02146c 0x161 esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) - *fill* 0x000000003c0215cd 0x3 + *fill* 0x000000003c0215cd 0x3 .rodata.str1.4 0x000000003c0215d0 0x3f esp-idf/esp_hw_support/libesp_hw_support.a(memprot.c.obj) - *fill* 0x000000003c02160f 0x1 + *fill* 0x000000003c02160f 0x1 .rodata.__func__.2295 0x000000003c021610 0x18 esp-idf/riscv/libriscv.a(interrupt.c.obj) .rodata.intr_handler_set.str1.4 0x000000003c021628 0x71 esp-idf/riscv/libriscv.a(interrupt.c.obj) - *fill* 0x000000003c021699 0x3 + *fill* 0x000000003c021699 0x3 .rodata.__func__.4898 0x000000003c02169c 0xd esp-idf/esp_timer/libesp_timer.a(esp_timer.c.obj) - *fill* 0x000000003c0216a9 0x3 + *fill* 0x000000003c0216a9 0x3 .rodata.esp_timer_init.str1.4 0x000000003c0216ac 0xa esp-idf/esp_timer/libesp_timer.a(esp_timer.c.obj) - *fill* 0x000000003c0216b6 0x2 + *fill* 0x000000003c0216b6 0x2 .rodata.str1.4 0x000000003c0216b8 0x31 esp-idf/esp_timer/libesp_timer.a(esp_timer.c.obj) - *fill* 0x000000003c0216e9 0x3 + *fill* 0x000000003c0216e9 0x3 .rodata.esp_timer_impl_init_system_time.str1.4 0x000000003c0216ec 0x50 esp-idf/esp_timer/libesp_timer.a(system_time.c.obj) .rodata.esp_timer_impl_init.str1.4 0x000000003c02173c 0x7d esp-idf/esp_timer/libesp_timer.a(esp_timer_impl_systimer.c.obj) - *fill* 0x000000003c0217b9 0x3 + *fill* 0x000000003c0217b9 0x3 .rodata.__func__.5259 0x000000003c0217bc 0x11 esp-idf/freertos/libfreertos.a(port.c.obj) - *fill* 0x000000003c0217cd 0x3 + *fill* 0x000000003c0217cd 0x3 .rodata.esp_startup_start_app.str1.4 0x000000003c0217d0 0x2b esp-idf/freertos/libfreertos.a(port.c.obj) 0x37 (size before relaxing) - *fill* 0x000000003c0217fb 0x1 + *fill* 0x000000003c0217fb 0x1 .rodata.prvTaskExitError.str1.4 0x000000003c0217fc 0x46 esp-idf/freertos/libfreertos.a(port.c.obj) - *fill* 0x000000003c021842 0x2 + *fill* 0x000000003c021842 0x2 .rodata.vApplicationStackOverflowHook.str1.4 0x000000003c021844 0x3c esp-idf/freertos/libfreertos.a(port.c.obj) .rodata.__func__.4676 0x000000003c021880 0x1d esp-idf/freertos/libfreertos.a(port_common.c.obj) - *fill* 0x000000003c02189d 0x3 + *fill* 0x000000003c02189d 0x3 .rodata.__func__.4681 0x000000003c0218a0 0xa esp-idf/freertos/libfreertos.a(port_common.c.obj) - *fill* 0x000000003c0218aa 0x2 + *fill* 0x000000003c0218aa 0x2 .rodata.esp_startup_start_app_common.str1.4 0x000000003c0218ac 0x16 esp-idf/freertos/libfreertos.a(port_common.c.obj) - *fill* 0x000000003c0218c2 0x2 + *fill* 0x000000003c0218c2 0x2 .rodata.main_task.str1.4 0x000000003c0218c4 0x7d esp-idf/freertos/libfreertos.a(port_common.c.obj) - *fill* 0x000000003c021941 0x3 + *fill* 0x000000003c021941 0x3 .rodata.__func__.5119 0x000000003c021944 0x10 esp-idf/freertos/libfreertos.a(port_systick.c.obj) .rodata.vPortSetupTimer.str1.4 0x000000003c021954 0xb0 esp-idf/freertos/libfreertos.a(port_systick.c.obj) .rodata.__func__.4724 0x000000003c021a04 0x13 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021a17 0x1 + *fill* 0x000000003c021a17 0x1 .rodata.__func__.4733 0x000000003c021a18 0x1a esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021a32 0x2 + *fill* 0x000000003c021a32 0x2 .rodata.__func__.4743 0x000000003c021a34 0x14 esp-idf/freertos/libfreertos.a(queue.c.obj) .rodata.__func__.4782 0x000000003c021a48 0x19 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021a61 0x3 + *fill* 0x000000003c021a61 0x3 .rodata.__func__.4789 0x000000003c021a64 0x19 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021a7d 0x3 + *fill* 0x000000003c021a7d 0x3 .rodata.__func__.4813 0x000000003c021a80 0x12 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021a92 0x2 + *fill* 0x000000003c021a92 0x2 .rodata.__func__.4834 0x000000003c021a94 0x12 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021aa6 0x2 + *fill* 0x000000003c021aa6 0x2 .rodata.__func__.4856 0x000000003c021aa8 0x14 esp-idf/freertos/libfreertos.a(queue.c.obj) .rodata.__func__.4880 0x000000003c021abc 0x15 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021ad1 0x3 + *fill* 0x000000003c021ad1 0x3 .rodata.__func__.4914 0x000000003c021ad4 0xd esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021ae1 0x3 + *fill* 0x000000003c021ae1 0x3 .rodata.__func__.4998 0x000000003c021ae4 0x1b esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021aff 0x1 + *fill* 0x000000003c021aff 0x1 .rodata.prvNotifyQueueSetContainer.str1.4 0x000000003c021b00 0x7b esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021b7b 0x1 + *fill* 0x000000003c021b7b 0x1 .rodata.xQueueGenericCreate.str1.4 0x000000003c021b7c 0x8e esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021c0a 0x2 + *fill* 0x000000003c021c0a 0x2 .rodata.xQueueGenericCreateStatic.str1.4 0x000000003c021c0c 0xdf esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021ceb 0x1 + *fill* 0x000000003c021ceb 0x1 .rodata.xQueueGenericReset.str1.4 0x000000003c021cec 0x8 esp-idf/freertos/libfreertos.a(queue.c.obj) .rodata.xQueueGenericSend.str1.4 0x000000003c021cf4 0x195 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021e89 0x3 + *fill* 0x000000003c021e89 0x3 .rodata.xQueueGiveFromISR.str1.4 0x000000003c021e8c 0x7d esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021f09 0x3 + *fill* 0x000000003c021f09 0x3 .rodata.xQueueGiveMutexRecursive.str1.4 0x000000003c021f0c 0x8 esp-idf/freertos/libfreertos.a(queue.c.obj) .rodata.xQueueReceive.str1.4 0x000000003c021f14 0x66 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021f7a 0x2 + *fill* 0x000000003c021f7a 0x2 .rodata.xQueueReceiveFromISR.str1.4 0x000000003c021f7c 0x52 esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021fce 0x2 + *fill* 0x000000003c021fce 0x2 .rodata.xQueueSemaphoreTake.str1.4 0x000000003c021fd0 0x2d esp-idf/freertos/libfreertos.a(queue.c.obj) - *fill* 0x000000003c021ffd 0x3 + *fill* 0x000000003c021ffd 0x3 .rodata.__func__.4754 0x000000003c022000 0xc esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.__func__.4766 0x000000003c02200c 0xb esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022017 0x1 + *fill* 0x000000003c022017 0x1 .rodata.__func__.4827 0x000000003c022018 0x14 esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.__func__.4845 0x000000003c02202c 0xf esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c02203b 0x1 + *fill* 0x000000003c02203b 0x1 .rodata.__func__.4868 0x000000003c02203c 0xe esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c02204a 0x2 + *fill* 0x000000003c02204a 0x2 .rodata.__func__.4876 0x000000003c02204c 0x1d esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022069 0x3 + *fill* 0x000000003c022069 0x3 .rodata.__func__.4890 0x000000003c02206c 0x13 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c02207f 0x1 + *fill* 0x000000003c02207f 0x1 .rodata.__func__.4925 0x000000003c022080 0x16 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022096 0x2 + *fill* 0x000000003c022096 0x2 .rodata.__func__.4946 0x000000003c022098 0x19 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c0220b1 0x3 + *fill* 0x000000003c0220b1 0x3 .rodata.__func__.4969 0x000000003c0220b4 0x15 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c0220c9 0x3 + *fill* 0x000000003c0220c9 0x3 .rodata.__func__.5048 0x000000003c0220cc 0xd esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c0220d9 0x3 + *fill* 0x000000003c0220d9 0x3 .rodata.__func__.5052 0x000000003c0220dc 0xd esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c0220e9 0x3 + *fill* 0x000000003c0220e9 0x3 .rodata.__func__.5084 0x000000003c0220ec 0x18 esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.__func__.5093 0x000000003c022104 0x24 esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.__func__.5155 0x000000003c022128 0x17 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c02213f 0x1 + *fill* 0x000000003c02213f 0x1 .rodata.prvDeleteTCB.str1.4 0x000000003c022140 0x32 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022172 0x2 + *fill* 0x000000003c022172 0x2 .rodata.prvDeleteTLS.str1.4 0x000000003c022174 0x28 esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.ucExpectedStackBytes.4897 @@ -8720,191 +8720,191 @@ END GROUP 0x000000003c0221b0 0x58 esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.vTaskDelete.str1.4 0x000000003c022208 0x31 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022239 0x3 + *fill* 0x000000003c022239 0x3 .rodata.vTaskPlaceOnEventList.str1.4 0x000000003c02223c 0xc esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.vTaskPriorityDisinheritAfterTimeout.str1.4 0x000000003c022248 0x28 esp-idf/freertos/libfreertos.a(tasks.c.obj) .rodata.vTaskSetTimeOutState.str1.4 0x000000003c022270 0xa esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c02227a 0x2 + *fill* 0x000000003c02227a 0x2 .rodata.vTaskStartScheduler.str1.4 0x000000003c02227c 0x1a esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022296 0x2 + *fill* 0x000000003c022296 0x2 .rodata.xTaskCheckForTimeOut.str1.4 0x000000003c022298 0xe esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c0222a6 0x2 + *fill* 0x000000003c0222a6 0x2 .rodata.xTaskGenericNotify.str1.4 0x000000003c0222a8 0x6f esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022317 0x1 + *fill* 0x000000003c022317 0x1 .rodata.xTaskGetIdleTaskHandleForCPU.str1.4 0x000000003c022318 0x36 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c02234e 0x2 + *fill* 0x000000003c02234e 0x2 .rodata.xTaskIncrementTick.str1.4 0x000000003c022350 0x76 esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c0223c6 0x2 + *fill* 0x000000003c0223c6 0x2 .rodata.xTaskPriorityDisinherit.str1.4 0x000000003c0223c8 0x3d esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022405 0x3 + *fill* 0x000000003c022405 0x3 .rodata.xTaskRemoveFromEventList.str1.4 0x000000003c022408 0xf esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022417 0x1 + *fill* 0x000000003c022417 0x1 .rodata.xTaskResumeAll.str1.4 0x000000003c022418 0x4b esp-idf/freertos/libfreertos.a(tasks.c.obj) - *fill* 0x000000003c022463 0x1 + *fill* 0x000000003c022463 0x1 .rodata.__func__.4451 0x000000003c022464 0xc esp-idf/newlib/libnewlib.a(locks.c.obj) .rodata.__func__.4460 0x000000003c022470 0x15 esp-idf/newlib/libnewlib.a(locks.c.obj) - *fill* 0x000000003c022485 0x3 + *fill* 0x000000003c022485 0x3 .rodata.__func__.4480 0x000000003c022488 0x15 esp-idf/newlib/libnewlib.a(locks.c.obj) - *fill* 0x000000003c02249d 0x3 + *fill* 0x000000003c02249d 0x3 .rodata.__func__.4505 0x000000003c0224a0 0x13 esp-idf/newlib/libnewlib.a(locks.c.obj) - *fill* 0x000000003c0224b3 0x1 + *fill* 0x000000003c0224b3 0x1 .rodata.__func__.4537 0x000000003c0224b4 0x16 esp-idf/newlib/libnewlib.a(locks.c.obj) - *fill* 0x000000003c0224ca 0x2 + *fill* 0x000000003c0224ca 0x2 .rodata.esp_newlib_locks_init.str1.4 0x000000003c0224cc 0x68 esp-idf/newlib/libnewlib.a(locks.c.obj) .rodata.str1.4 0x000000003c022534 0x91 esp-idf/newlib/libnewlib.a(locks.c.obj) - *fill* 0x000000003c0225c5 0x3 + *fill* 0x000000003c0225c5 0x3 .rodata.app_main.str1.4 0x000000003c0225c8 0xe8 esp-idf/main/libmain.a(hello_world_main.c.obj) 0xec (size before relaxing) .rodata.__FUNCTION__.7171 0x000000003c0226b0 0x15 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c0226c5 0x3 + *fill* 0x000000003c0226c5 0x3 .rodata.__FUNCTION__.7176 0x000000003c0226c8 0x15 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c0226dd 0x3 + *fill* 0x000000003c0226dd 0x3 .rodata.__FUNCTION__.7181 0x000000003c0226e0 0x13 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c0226f3 0x1 + *fill* 0x000000003c0226f3 0x1 .rodata.__FUNCTION__.7186 0x000000003c0226f4 0x13 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c022707 0x1 + *fill* 0x000000003c022707 0x1 .rodata.__FUNCTION__.7191 0x000000003c022708 0x10 esp-idf/driver/libdriver.a(uart.c.obj) .rodata.__FUNCTION__.7196 0x000000003c022718 0x10 esp-idf/driver/libdriver.a(uart.c.obj) .rodata.__FUNCTION__.7201 0x000000003c022728 0x12 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c02273a 0x2 + *fill* 0x000000003c02273a 0x2 .rodata.__FUNCTION__.7206 0x000000003c02273c 0x12 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c02274e 0x2 + *fill* 0x000000003c02274e 0x2 .rodata.__FUNCTION__.7240 0x000000003c022750 0x16 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c022766 0x2 + *fill* 0x000000003c022766 0x2 .rodata.__FUNCTION__.7412 0x000000003c022768 0x12 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c02277a 0x2 + *fill* 0x000000003c02277a 0x2 .rodata.__FUNCTION__.7477 0x000000003c02277c 0x1b esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c022797 0x1 + *fill* 0x000000003c022797 0x1 .rodata.__FUNCTION__.7485 0x000000003c022798 0x27 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c0227bf 0x1 + *fill* 0x000000003c0227bf 0x1 .rodata.__FUNCTION__.7489 0x000000003c0227c0 0x11 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c0227d1 0x3 + *fill* 0x000000003c0227d1 0x3 .rodata.uart_disable_intr_mask_and_return_prev.str1.4 0x000000003c0227d4 0x36 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c02280a 0x2 + *fill* 0x000000003c02280a 0x2 .rodata.uart_flush_input.str1.4 0x000000003c02280c 0x2d esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c022839 0x3 + *fill* 0x000000003c022839 0x3 .rodata.uart_pattern_pop_pos.str1.4 0x000000003c02283c 0x31 esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c02286d 0x3 + *fill* 0x000000003c02286d 0x3 .rodata.uart_set_stop_bits.str1.4 0x000000003c022870 0x2e esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c02289e 0x2 + *fill* 0x000000003c02289e 0x2 .rodata.uart_set_word_length.str1.4 0x000000003c0228a0 0x2e esp-idf/driver/libdriver.a(uart.c.obj) - *fill* 0x000000003c0228ce 0x2 + *fill* 0x000000003c0228ce 0x2 .rodata.__func__.4215 0x000000003c0228d0 0x15 esp-idf/driver/libdriver.a(periph_ctrl.c.obj) - *fill* 0x000000003c0228e5 0x3 + *fill* 0x000000003c0228e5 0x3 .rodata.periph_module_enable.str1.4 0x000000003c0228e8 0x40 esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .rodata.__func__.5389 0x000000003c022928 0x15 esp-idf/spi_flash/libspi_flash.a(flash_mmap.c.obj) - *fill* 0x000000003c02293d 0x3 + *fill* 0x000000003c02293d 0x3 .rodata.__func__.5398 0x000000003c022940 0x11 esp-idf/spi_flash/libspi_flash.a(flash_mmap.c.obj) - *fill* 0x000000003c022951 0x3 + *fill* 0x000000003c022951 0x3 .rodata.str1.4 0x000000003c022954 0xca esp-idf/spi_flash/libspi_flash.a(flash_mmap.c.obj) - *fill* 0x000000003c022a1e 0x2 + *fill* 0x000000003c022a1e 0x2 .rodata.TAG 0x000000003c022a20 0xa esp-idf/spi_flash/libspi_flash.a(esp_flash_api.c.obj) - *fill* 0x000000003c022a2a 0x2 + *fill* 0x000000003c022a2a 0x2 .rodata.esp_flash_read_unique_chip_id.str1.4 0x000000003c022a2c 0x91 esp-idf/spi_flash/libspi_flash.a(esp_flash_api.c.obj) - *fill* 0x000000003c022abd 0x3 + *fill* 0x000000003c022abd 0x3 .rodata.io_mode_str 0x000000003c022ac0 0x2a esp-idf/spi_flash/libspi_flash.a(esp_flash_api.c.obj) - *fill* 0x000000003c022aea 0x2 + *fill* 0x000000003c022aea 0x2 .rodata.str1.4 0x000000003c022aec 0x235 esp-idf/spi_flash/libspi_flash.a(esp_flash_api.c.obj) - *fill* 0x000000003c022d21 0x3 + *fill* 0x000000003c022d21 0x3 .rodata.TAG 0x000000003c022d24 0xa esp-idf/spi_flash/libspi_flash.a(esp_flash_spi_init.c.obj) - *fill* 0x000000003c022d2e 0x2 + *fill* 0x000000003c022d2e 0x2 .rodata.esp_flash_init_default_chip.str1.4 0x000000003c022d30 0xfb esp-idf/spi_flash/libspi_flash.a(esp_flash_spi_init.c.obj) - *fill* 0x000000003c022e2b 0x1 + *fill* 0x000000003c022e2b 0x1 .rodata.__func__.6451 0x000000003c022e2c 0x1a esp-idf/spi_flash/libspi_flash.a(spi_flash_os_func_app.c.obj) - *fill* 0x000000003c022e46 0x2 + *fill* 0x000000003c022e46 0x2 .rodata.str1.4 0x000000003c022e48 0x45 esp-idf/spi_flash/libspi_flash.a(spi_flash_os_func_app.c.obj) - *fill* 0x000000003c022e8d 0x3 + *fill* 0x000000003c022e8d 0x3 .rodata.__func__.4508 0x000000003c022e90 0x13 esp-idf/spi_flash/libspi_flash.a(partition.c.obj) - *fill* 0x000000003c022ea3 0x1 + *fill* 0x000000003c022ea3 0x1 .rodata.__func__.4557 0x000000003c022ea4 0x12 esp-idf/spi_flash/libspi_flash.a(partition.c.obj) - *fill* 0x000000003c022eb6 0x2 + *fill* 0x000000003c022eb6 0x2 .rodata.ensure_partitions_loaded.str1.4 0x000000003c022eb8 0x35 esp-idf/spi_flash/libspi_flash.a(partition.c.obj) - *fill* 0x000000003c022eed 0x3 + *fill* 0x000000003c022eed 0x3 .rodata.esp_partition_get.str1.4 0x000000003c022ef0 0x11 esp-idf/spi_flash/libspi_flash.a(partition.c.obj) - *fill* 0x000000003c022f01 0x3 + *fill* 0x000000003c022f01 0x3 .rodata.esp_partition_next.str1.4 0x000000003c022f04 0x29 esp-idf/spi_flash/libspi_flash.a(partition.c.obj) - *fill* 0x000000003c022f2d 0x3 + *fill* 0x000000003c022f2d 0x3 .rodata.load_partitions.str1.4 0x000000003c022f30 0x78 esp-idf/spi_flash/libspi_flash.a(partition.c.obj) .rodata.__func__.4205 0x000000003c022fa8 0x17 esp-idf/esp_system/libesp_system.a(crosscore_int.c.obj) - *fill* 0x000000003c022fbf 0x1 + *fill* 0x000000003c022fbf 0x1 .rodata.__func__.4210 0x000000003c022fc0 0x17 esp-idf/esp_system/libesp_system.a(crosscore_int.c.obj) - *fill* 0x000000003c022fd7 0x1 + *fill* 0x000000003c022fd7 0x1 .rodata.esp_crosscore_int_init.str1.4 0x000000003c022fd8 0x4 esp-idf/esp_system/libesp_system.a(crosscore_int.c.obj) .rodata.str1.4 0x000000003c022fdc 0x46 esp-idf/esp_system/libesp_system.a(crosscore_int.c.obj) - *fill* 0x000000003c023022 0x2 + *fill* 0x000000003c023022 0x2 .rodata.__func__.6677 0x000000003c023024 0x12 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003c023036 0x2 + *fill* 0x000000003c023036 0x2 .rodata.__func__.6694 0x000000003c023038 0x11 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003c023049 0x3 + *fill* 0x000000003c023049 0x3 .rodata.esp_task_wdt_add.str1.4 0x000000003c02304c 0x39 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003c023085 0x3 + *fill* 0x000000003c023085 0x3 .rodata.esp_task_wdt_init.str1.4 0x000000003c023088 0x85 esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003c02310d 0x3 + *fill* 0x000000003c02310d 0x3 .rodata.task_wdt_isr.str1.4 0x000000003c023110 0xfd esp-idf/esp_system/libesp_system.a(task_wdt.c.obj) - *fill* 0x000000003c02320d 0x3 + *fill* 0x000000003c02320d 0x3 .rodata.spi_flash_clk_cfg_reg 0x000000003c023210 0x30 esp-idf/hal/libhal.a(spi_flash_hal.c.obj) .rodata.spi_flash_gpspi_clk_cfg_reg @@ -8913,50 +8913,50 @@ END GROUP 0x000000003c023270 0x628 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) .rodata.str1.4 0x000000003c023898 0x1571 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) - *fill* 0x000000003c024e09 0x3 + *fill* 0x000000003c024e09 0x3 .rodata.__func__.4891 0x000000003c024e0c 0xf esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024e1b 0x1 + *fill* 0x000000003c024e1b 0x1 .rodata.__func__.5010 0x000000003c024e1c 0x12 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024e2e 0x2 + *fill* 0x000000003c024e2e 0x2 .rodata.__func__.5073 0x000000003c024e30 0x10 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) .rodata.__func__.5097 0x000000003c024e40 0x13 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024e53 0x1 + *fill* 0x000000003c024e53 0x1 .rodata.__func__.5159 0x000000003c024e54 0x16 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024e6a 0x2 + *fill* 0x000000003c024e6a 0x2 .rodata.prvGetFreeSize.str1.4 0x000000003c024e6c 0x1f esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024e8b 0x1 + *fill* 0x000000003c024e8b 0x1 .rodata.prvReceiveGeneric.str1.4 0x000000003c024e8c 0x35 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024ec1 0x3 + *fill* 0x000000003c024ec1 0x3 .rodata.prvReturnItemByteBuf.str1.4 0x000000003c024ec4 0x7f esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c024f43 0x1 + *fill* 0x000000003c024f43 0x1 .rodata.xRingbufferSend.str1.4 0x000000003c024f44 0x28 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) .rodata.xRingbufferSendAcquire.str1.4 0x000000003c024f6c 0x95 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c025001 0x3 + *fill* 0x000000003c025001 0x3 .rodata.xRingbufferSendComplete.str1.4 0x000000003c025004 0x16 esp-idf/esp_ringbuf/libesp_ringbuf.a(ringbuf.c.obj) - *fill* 0x000000003c02501a 0x2 + *fill* 0x000000003c02501a 0x2 .rodata.__func__.3945 0x000000003c02501c 0x1a esp-idf/efuse/libefuse.a(esp_efuse_utility.c.obj) - *fill* 0x000000003c025036 0x2 + *fill* 0x000000003c025036 0x2 .rodata.__func__.4040 0x000000003c025038 0x1b esp-idf/efuse/libefuse.a(esp_efuse_utility.c.obj) - *fill* 0x000000003c025053 0x1 + *fill* 0x000000003c025053 0x1 .rodata.esp_efuse_utility_process.str1.4 0x000000003c025054 0x69 esp-idf/efuse/libefuse.a(esp_efuse_utility.c.obj) - *fill* 0x000000003c0250bd 0x3 + *fill* 0x000000003c0250bd 0x3 .rodata.set_cnt_in_reg.str1.4 0x000000003c0250c0 0x61 esp-idf/efuse/libefuse.a(esp_efuse_utility.c.obj) - *fill* 0x000000003c025121 0x3 + *fill* 0x000000003c025121 0x3 .rodata.write_reg.str1.4 0x000000003c025124 0x84 esp-idf/efuse/libefuse.a(esp_efuse_utility.c.obj) .rodata.range_read_addr_blocks @@ -8964,14 +8964,14 @@ END GROUP 0x000000003c0251a8 range_read_addr_blocks .rodata.__func__.5073 0x000000003c025200 0x1e esp-idf/app_update/libapp_update.a(esp_ota_ops.c.obj) - *fill* 0x000000003c02521e 0x2 + *fill* 0x000000003c02521e 0x2 .rodata.esp_ota_get_running_partition.str1.4 0x000000003c025220 0x5b esp-idf/app_update/libapp_update.a(esp_ota_ops.c.obj) - *fill* 0x000000003c02527b 0x1 + *fill* 0x000000003c02527b 0x1 .rodata.str1.4 0x000000003c02527c 0x3f /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-assert.o) 0x43 (size before relaxing) - *fill* 0x000000003c0252bb 0x1 + *fill* 0x000000003c0252bb 0x1 .rodata 0x000000003c0252bc 0x60 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-findfp.o) 0x000000003c0252bc __sf_fake_stderr 0x000000003c0252dc __sf_fake_stdout @@ -8982,7 +8982,7 @@ END GROUP .rodata 0x000000003c02531c 0x2bc /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-vfiprintf.o) .rodata.str1.4 0x000000003c0255d8 0x25 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-vfiprintf.o) - *fill* 0x000000003c0255fd 0x3 + *fill* 0x000000003c0255fd 0x3 .rodata 0x000000003c025600 0x2bc /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-vfprintf.o) .rodata.str1.4 0x000000003c0258bc 0x10 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-vfprintf.o) @@ -8990,7 +8990,7 @@ END GROUP .rodata.str1.4 0x000000003c0258cc 0xa9 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-dtoa.o) 0xad (size before relaxing) - *fill* 0x000000003c025975 0x3 + *fill* 0x000000003c025975 0x3 .rodata 0x000000003c025978 0x128 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-mprec.o) 0x000000003c025988 __mprec_tens 0x000000003c025a50 __mprec_tinytens @@ -8998,7 +8998,7 @@ END GROUP .rodata.str1.4 0x000000003c025aa0 0x6e /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-mprec.o) 0x99 (size before relaxing) - *fill* 0x000000003c025b0e 0x2 + *fill* 0x000000003c025b0e 0x2 .rodata 0x000000003c025b10 0x494 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-svfiprintf.o) 0x000000003c025dac __chclass 0x000000003c025eac __state_table @@ -9007,7 +9007,7 @@ END GROUP 0x000000003c025fa4 0x25 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-svfiprintf.o) .rodata 0x000000003c025fa4 0x101 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-ctype_.o) 0x000000003c025fa4 _ctype_ - *fill* 0x000000003c0260a5 0x3 + *fill* 0x000000003c0260a5 0x3 .rodata 0x000000003c0260a8 0x16c /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-locale.o) 0x000000003c0260a8 __default_global_locale .rodata.str1.4 @@ -9022,7 +9022,7 @@ END GROUP *(.gnu.linkonce.e.*) *(.gnu.version_r) 0x000000003c026228 . = ((. + 0x7) & 0xfffffffffffffffc) - *fill* 0x000000003c026222 0x6 + *fill* 0x000000003c026222 0x6 0x000000003c026228 __init_priority_array_start = ABSOLUTE (.) *(EXCLUDE_FILE(*crtbegin.* *crtend.*) .init_array.*) 0x000000003c026228 __init_priority_array_end = ABSOLUTE (.) @@ -9061,7 +9061,7 @@ END GROUP *(.srodata) .srodata 0x000000003c026244 0x5 esp-idf/esp_system/libesp_system.a(brownout.c.obj) *(.srodata.*) - *fill* 0x000000003c026249 0x7 + *fill* 0x000000003c026249 0x7 .srodata.cst8 0x000000003c026250 0x20 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-vfprintf.o) .srodata.cst8 0x000000003c026270 0x40 /home/xy/.espressif/tools/riscv32-esp-elf/esp-2021r1-8.4.0/riscv32-esp-elf/bin/../lib/gcc/riscv32-esp-elf/8.4.0/../../../../riscv32-esp-elf/lib/rv32im/ilp32\libc.a(lib_a-dtoa.o) 0x48 (size before relaxing) @@ -9268,7 +9268,7 @@ END GROUP .iram0.text_end 0x0000000040389108 0xf8 0x0000000040389200 . = ALIGN (0x200) - *fill* 0x0000000040389108 0xf8 + *fill* 0x0000000040389108 0xf8 *(.iram_end_test) 0x0000000040389200 _iram_text_end = ABSOLUTE (.) @@ -10164,7 +10164,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_info 0x0000000000084b87 0x9a20 esp-idf/driver/libdriver.a(uart.c.obj) .debug_info 0x000000000008e5a7 0xf5d esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .debug_info 0x000000000008f504 0x97e esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .debug_info 0x000000000008fe82 0x254b esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_info 0x000000000008fe82 0x254b esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_info 0x00000000000923cd 0x14d3 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_info 0x00000000000938a0 0x3351 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .debug_info 0x0000000000096bf1 0x1310 esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -10195,7 +10195,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_info 0x00000000000ddabd 0xb12 esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) .debug_info 0x00000000000de5cf 0x52e6 esp-idf/hal/libhal.a(spi_flash_hal_gpspi.c.obj) .debug_info 0x00000000000e38b5 0x200c esp-idf/hal/libhal.a(systimer_hal.c.obj) - .debug_info 0x00000000000e58c1 0xb3a esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .debug_info 0x00000000000e58c1 0xb3a esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .debug_info 0x00000000000e63fb 0xab7 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .debug_info 0x00000000000e6eb2 0xa4c esp-idf/riscv/libriscv.a(instruction_decode.c.obj) .debug_info 0x00000000000e78fe 0x3137 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) @@ -10311,7 +10311,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_abbrev 0x000000000000c153 0x5c4 esp-idf/driver/libdriver.a(uart.c.obj) .debug_abbrev 0x000000000000c717 0x2b3 esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .debug_abbrev 0x000000000000c9ca 0x1c2 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .debug_abbrev 0x000000000000cb8c 0x306 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_abbrev 0x000000000000cb8c 0x306 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_abbrev 0x000000000000ce92 0x2ed esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_abbrev 0x000000000000d17f 0x486 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .debug_abbrev 0x000000000000d605 0x339 esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -10342,7 +10342,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_abbrev 0x0000000000012b1c 0x23b esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) .debug_abbrev 0x0000000000012d57 0x48e esp-idf/hal/libhal.a(spi_flash_hal_gpspi.c.obj) .debug_abbrev 0x00000000000131e5 0x3d3 esp-idf/hal/libhal.a(systimer_hal.c.obj) - .debug_abbrev 0x00000000000135b8 0x1d6 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .debug_abbrev 0x00000000000135b8 0x1d6 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .debug_abbrev 0x000000000001378e 0x1de esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .debug_abbrev 0x000000000001396c 0x20a esp-idf/riscv/libriscv.a(instruction_decode.c.obj) .debug_abbrev 0x0000000000013b76 0x313 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) @@ -10450,7 +10450,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_loc 0x000000000001eca9 0x1f esp-idf/main/libmain.a(hello_world_main.c.obj) .debug_loc 0x000000000001ecc8 0x4054 esp-idf/driver/libdriver.a(uart.c.obj) .debug_loc 0x0000000000022d1c 0x2ef esp-idf/driver/libdriver.a(periph_ctrl.c.obj) - .debug_loc 0x000000000002300b 0xe4 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_loc 0x000000000002300b 0xe4 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_loc 0x00000000000230ef 0x292 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_loc 0x0000000000023381 0x57b esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .debug_loc 0x00000000000238fc 0x101 esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -10654,7 +10654,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_aranges 0x0000000000001ed0 0x20 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) .debug_aranges - 0x0000000000001ef0 0x40 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + 0x0000000000001ef0 0x40 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_aranges 0x0000000000001f30 0x70 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_aranges @@ -10716,7 +10716,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_aranges 0x0000000000002b50 0x88 esp-idf/hal/libhal.a(systimer_hal.c.obj) .debug_aranges - 0x0000000000002bd8 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + 0x0000000000002bd8 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .debug_aranges 0x0000000000002bf8 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .debug_aranges @@ -10880,7 +10880,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_ranges 0x0000000000003d10 0x340 esp-idf/driver/libdriver.a(uart.c.obj) .debug_ranges 0x0000000000004050 0xe0 esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .debug_ranges 0x0000000000004130 0x10 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .debug_ranges 0x0000000000004140 0x30 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_ranges 0x0000000000004140 0x30 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_ranges 0x0000000000004170 0x60 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_ranges 0x00000000000041d0 0x70 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .debug_ranges 0x0000000000004240 0x68 esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -10910,7 +10910,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_ranges 0x0000000000005160 0x28 esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) .debug_ranges 0x0000000000005188 0x150 esp-idf/hal/libhal.a(spi_flash_hal_gpspi.c.obj) .debug_ranges 0x00000000000052d8 0xb0 esp-idf/hal/libhal.a(systimer_hal.c.obj) - .debug_ranges 0x0000000000005388 0x10 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .debug_ranges 0x0000000000005388 0x10 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .debug_ranges 0x0000000000005398 0x10 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .debug_ranges 0x00000000000053a8 0x10 esp-idf/riscv/libriscv.a(instruction_decode.c.obj) .debug_ranges 0x00000000000053b8 0x18 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) @@ -11011,7 +11011,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_line 0x0000000000037d2e 0x7e51 esp-idf/driver/libdriver.a(uart.c.obj) .debug_line 0x000000000003fb7f 0xc23 esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .debug_line 0x00000000000407a2 0x30b esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .debug_line 0x0000000000040aad 0x5e9 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_line 0x0000000000040aad 0x5e9 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_line 0x0000000000041096 0xabd esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_line 0x0000000000041b53 0xcf6 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .debug_line 0x0000000000042849 0x715 esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -11042,7 +11042,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_line 0x0000000000057959 0x47f esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) .debug_line 0x0000000000057dd8 0x1202 esp-idf/hal/libhal.a(spi_flash_hal_gpspi.c.obj) .debug_line 0x0000000000058fda 0xab2 esp-idf/hal/libhal.a(systimer_hal.c.obj) - .debug_line 0x0000000000059a8c 0x5a6 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .debug_line 0x0000000000059a8c 0x5a6 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .debug_line 0x000000000005a032 0x448 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .debug_line 0x000000000005a47a 0x3a1 esp-idf/riscv/libriscv.a(instruction_decode.c.obj) .debug_line 0x000000000005a81b 0x934 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) @@ -11220,7 +11220,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) 0xa18 (size before relaxing) .debug_str 0x0000000000014092 0xaa esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) 0x67c (size before relaxing) - .debug_str 0x000000000001413c 0x3ac esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_str 0x000000000001413c 0x3ac esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) 0x1a35 (size before relaxing) .debug_str 0x00000000000144e8 0x2e8 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) 0xdca (size before relaxing) @@ -11282,7 +11282,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) 0x2a94 (size before relaxing) .debug_str 0x00000000000194c6 0x26c esp-idf/hal/libhal.a(systimer_hal.c.obj) 0x13c6 (size before relaxing) - .debug_str 0x0000000000019732 0x7a esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .debug_str 0x0000000000019732 0x7a esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) 0x667 (size before relaxing) .debug_str 0x00000000000197ac 0x93 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) 0x792 (size before relaxing) @@ -11450,7 +11450,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .comment 0x0000000000000025 0x26 esp-idf/driver/libdriver.a(uart.c.obj) .comment 0x0000000000000025 0x26 esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .comment 0x0000000000000025 0x26 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .comment 0x0000000000000025 0x26 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .comment 0x0000000000000025 0x26 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .comment 0x0000000000000025 0x26 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .comment 0x0000000000000025 0x26 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .comment 0x0000000000000025 0x26 esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -11481,7 +11481,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .comment 0x0000000000000025 0x26 esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) .comment 0x0000000000000025 0x26 esp-idf/hal/libhal.a(spi_flash_hal_gpspi.c.obj) .comment 0x0000000000000025 0x26 esp-idf/hal/libhal.a(systimer_hal.c.obj) - .comment 0x0000000000000025 0x26 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .comment 0x0000000000000025 0x26 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .comment 0x0000000000000025 0x26 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .comment 0x0000000000000025 0x26 esp-idf/riscv/libriscv.a(instruction_decode.c.obj) .comment 0x0000000000000025 0x26 esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) @@ -11661,7 +11661,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .riscv.attributes 0x00000000000008ac 0x24 esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) .riscv.attributes - 0x00000000000008d0 0x24 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + 0x00000000000008d0 0x24 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .riscv.attributes 0x00000000000008f4 0x24 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .riscv.attributes @@ -11723,7 +11723,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .riscv.attributes 0x0000000000000d08 0x24 esp-idf/hal/libhal.a(systimer_hal.c.obj) .riscv.attributes - 0x0000000000000d2c 0x28 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + 0x0000000000000d2c 0x28 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .riscv.attributes 0x0000000000000d54 0x24 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .riscv.attributes @@ -11887,7 +11887,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_frame 0x0000000000005e58 0x9e8 esp-idf/driver/libdriver.a(uart.c.obj) .debug_frame 0x0000000000006840 0x9c esp-idf/driver/libdriver.a(periph_ctrl.c.obj) .debug_frame 0x00000000000068dc 0x2c esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) - .debug_frame 0x0000000000006908 0x8c esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + .debug_frame 0x0000000000006908 0x8c esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) .debug_frame 0x0000000000006994 0x178 esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) .debug_frame 0x0000000000006b0c 0x148 esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) .debug_frame 0x0000000000006c54 0x14c esp-idf/spi_flash/libspi_flash.a(cache_utils.c.obj) @@ -11917,7 +11917,7 @@ OUTPUT(hello-world.elf elf32-littleriscv) .debug_frame 0x0000000000008ee0 0x6c esp-idf/hal/libhal.a(interrupt_controller_hal.c.obj) .debug_frame 0x0000000000008f4c 0xf8 esp-idf/hal/libhal.a(spi_flash_hal_gpspi.c.obj) .debug_frame 0x0000000000009044 0x130 esp-idf/hal/libhal.a(systimer_hal.c.obj) - .debug_frame 0x0000000000009174 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) + .debug_frame 0x0000000000009174 0x20 esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) .debug_frame 0x0000000000009194 0x30 esp-idf/esp_hw_support/libesp_hw_support.a(chip_info.c.obj) .debug_frame 0x00000000000091c4 0x28 esp-idf/riscv/libriscv.a(instruction_decode.c.obj) .debug_frame 0x00000000000091ec 0x4c esp-idf/esp_common/libesp_common.a(esp_err_to_name.c.obj) @@ -13046,7 +13046,7 @@ bootloader_common_ota_select_valid esp-idf/bootloader_support/lib bootloader_common_select_otadata esp-idf/bootloader_support/libbootloader_support.a(bootloader_common_loader.c.obj) esp-idf/app_update/libapp_update.a(esp_ota_ops.c.obj) bootloader_common_vddsdio_configure esp-idf/bootloader_support/libbootloader_support.a(bootloader_common.c.obj) -bootloader_configure_spi_pins esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) +bootloader_configure_spi_pins esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) bootloader_debug_buffer esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) esp-idf/bootloader_support/libbootloader_support.a(esp_image_format.c.obj) bootloader_enable_qio_mode esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) @@ -13054,18 +13054,18 @@ bootloader_enable_wp esp-idf/bootloader_support/lib bootloader_execute_flash_command esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) bootloader_fill_random esp-idf/esp_system/libesp_system.a(fpga_overrides.c.obj) -bootloader_flash_clock_config esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) -bootloader_flash_cs_timing_config esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) -bootloader_flash_dummy_config esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) +bootloader_flash_clock_config esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) +bootloader_flash_cs_timing_config esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) +bootloader_flash_dummy_config esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) bootloader_flash_erase_range esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_common.c.obj) bootloader_flash_erase_sector esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) bootloader_flash_read esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(esp_image_format.c.obj) -bootloader_flash_set_dummy_out esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) +bootloader_flash_set_dummy_out esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) bootloader_flash_unlock esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) -bootloader_flash_update_id esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) +bootloader_flash_update_id esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) esp-idf/esp_system/libesp_system.a(cpu_start.c.obj) bootloader_flash_write esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) @@ -13086,11 +13086,11 @@ bootloader_munmap esp-idf/bootloader_support/lib esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_common_loader.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_common.c.obj) -bootloader_random_disable esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) +bootloader_random_disable esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) -bootloader_random_enable esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h2.c.obj) +bootloader_random_enable esp-idf/bootloader_support/libbootloader_support.a(bootloader_random_esp32h4.c.obj) bootloader_read_flash_id esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) - esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) bootloader_reset esp-idf/bootloader_support/libbootloader_support.a(bootloader_utility.c.obj) bootloader_sha256_data esp-idf/bootloader_support/libbootloader_support.a(bootloader_sha.c.obj) esp-idf/bootloader_support/libbootloader_support.a(esp_image_format.c.obj) @@ -13170,7 +13170,7 @@ esp_clk_slowclk_cal_set esp-idf/esp_hw_support/libesp_ esp_clk_xtal_freq esp-idf/esp_hw_support/libesp_hw_support.a(esp_clk.c.obj) esp_common_include_fpga_overrides esp-idf/esp_system/libesp_system.a(fpga_overrides.c.obj) esp_cpu_clear_watchpoint esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util.c.obj) -esp_cpu_configure_region_protection esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h2.c.obj) +esp_cpu_configure_region_protection esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util_esp32h4.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_mem.c.obj) esp_cpu_in_ocd_debug_mode esp-idf/esp_hw_support/libesp_hw_support.a(cpu_util.c.obj) esp-idf/bootloader_support/libbootloader_support.a(esp_image_format.c.obj) @@ -13732,7 +13732,7 @@ esp_rom_printf esp-idf/driver/libdriver.a(spi esp-idf/esp_system/libesp_system.a(cpu_start.c.obj) esp-idf/esp_system/libesp_system.a(fpga_overrides.c.obj) esp_rom_spiflash_config_clk esp-idf/spi_flash/libspi_flash.a(flash_ops.c.obj) - esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) esp_rom_spiflash_config_readmode esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) esp_rom_spiflash_select_qio_pins esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) esp_rom_spiflash_wait_idle esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) @@ -14486,7 +14486,7 @@ rom_spiflash_legacy_data esp-idf/bootloader_support/lib esp-idf/spi_flash/libspi_flash.a(flash_mmap.c.obj) esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash.c.obj) esp-idf/bootloader_support/libbootloader_support.a(flash_qio_mode.c.obj) - esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h2.c.obj) + esp-idf/bootloader_support/libbootloader_support.a(bootloader_flash_config_esp32h4.c.obj) rtc_clk_32k_bootstrap esp-idf/esp_hw_support/libesp_hw_support.a(rtc_clk.c.obj) rtc_clk_32k_enable esp-idf/esp_hw_support/libesp_hw_support.a(rtc_clk.c.obj) rtc_clk_32k_enable_external esp-idf/esp_hw_support/libesp_hw_support.a(rtc_clk.c.obj) diff --git a/tools/test_idf_size/expected_output b/tools/test_idf_size/expected_output index 3c721c910b..7e0025f5a7 100644 --- a/tools/test_idf_size/expected_output +++ b/tools/test_idf_size/expected_output @@ -3728,7 +3728,7 @@ Used Flash size : 186524 bytes 93019 Total image size: 234780 bytes (.bin may be padded larger) 134103 +100677 *** -Running idf_size.py for esp32h2... +Running idf_size.py for esp32h4... Total sizes: Used stat D/IRAM: 45656 bytes ( 282024 remain, 13.9% used) .data size: 4864 bytes @@ -3740,7 +3740,7 @@ Used Flash size : 110492 bytes Total image size: 152484 bytes (.bin may be padded larger) *** -Running idf_size.py for esp32h2 (target autodetected)... +Running idf_size.py for esp32h4 (target autodetected)... Total sizes: Used stat D/IRAM: 45656 bytes ( 282024 remain, 13.9% used) .data size: 4864 bytes @@ -3752,7 +3752,7 @@ Used Flash size : 110492 bytes Total image size: 152484 bytes (.bin may be padded larger) *** -Running idf_size.py --archives for esp32h2... +Running idf_size.py --archives for esp32h4... Total sizes: Used stat D/IRAM: 45656 bytes ( 282024 remain, 13.9% used) .data size: 4864 bytes @@ -3789,7 +3789,7 @@ Per-archive contributions to ELF file: libcxx.a 0 0 0 0 0 2 0 0 2 *** -Running idf_size.py --files for esp32h2... +Running idf_size.py --files for esp32h4... Total sizes: Used stat D/IRAM: 45656 bytes ( 282024 remain, 13.9% used) .data size: 4864 bytes @@ -3883,7 +3883,7 @@ spi_flash_chip_mxic.c.ob 190 0 0 76 266 system_internal.c.obj 0 0 0 260 260 0 0 0 260 system_time.c.obj 0 0 8 38 46 142 80 0 260 lib_a-ctype_.o 0 0 0 0 0 0 257 0 257 - cpu_util_esp32h2.c.obj 0 0 0 0 0 250 0 0 250 + cpu_util_esp32h4.c.obj 0 0 0 0 0 250 0 0 250 pthread_local_storage.c. 0 0 4 0 4 242 0 0 242 spi_flash_chip_issi.c.ob 125 0 0 112 237 0 0 0 237 memory_layout.c.obj 4 0 0 0 4 0 231 0 235 @@ -3948,7 +3948,7 @@ bootloader_flash_config_ 0 0 0 0 0 _umoddi3.o 0 0 0 0 0 0 0 0 0 *** -Running idf_size.py --archive_details for esp32h2... +Running idf_size.py --archive_details for esp32h4... Total sizes: Used stat D/IRAM: 45656 bytes ( 282024 remain, 13.9% used) .data size: 4864 bytes @@ -15381,7 +15381,7 @@ Producing JSON output for esp32c3... } *** -Producing JSON output for esp32h2... +Producing JSON output for esp32h4... { "dram_data": 0, "dram_bss": 0, @@ -16133,7 +16133,7 @@ Producing JSON output for esp32h2... "flash_total": 257, "ram_st_total": 0 }, - "libesp_hw_support.a:cpu_util_esp32h2.c.obj": { + "libesp_hw_support.a:cpu_util_esp32h4.c.obj": { ".flash.text": 250, "flash_total": 250, "ram_st_total": 0 @@ -16399,7 +16399,7 @@ Producing JSON output for esp32h2... "flash_total": 28, "ram_st_total": 28 }, - "libbootloader_support.a:bootloader_flash_config_esp32h2.c.obj": { + "libbootloader_support.a:bootloader_flash_config_esp32h4.c.obj": { ".flash.text": 26, "flash_total": 26, "ram_st_total": 0 @@ -20032,7 +20032,7 @@ Symbols from section: .rtc_noinit Section total: 0 *** -Producing CSV output for esp32h2... +Producing CSV output for esp32h4... Total sizes:,,, Used stat D/IRAM,45656 bytes (282024 remain 13.9% used),,, .data size,4864 bytes,,, @@ -20169,7 +20169,7 @@ esp_err.c.obj,108,0,0,154,262,0,0,0 system_internal.c.obj,0,0,0,260,260,0,0,0 system_time.c.obj,0,0,8,38,46,142,80,0 lib_a-ctype_.o,0,0,0,0,0,0,257,0 -cpu_util_esp32h2.c.obj,0,0,0,0,0,250,0,0 +cpu_util_esp32h4.c.obj,0,0,0,0,0,250,0,0 pthread_local_storage.c.,0,0,4,0,4,242,0,0 spi_flash_chip_issi.c.ob,125,0,0,112,237,0,0,0 memory_layout.c.obj,4,0,0,0,4,0,231,0 diff --git a/tools/test_idf_size/test.sh b/tools/test_idf_size/test.sh index df9da903c2..43044e8385 100755 --- a/tools/test_idf_size/test.sh +++ b/tools/test_idf_size/test.sh @@ -101,16 +101,16 @@ csv_test() { && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s2 --archive_details libdriver.a app_esp32s2.map &>> output \ && echo -e "\n***\nRunning idf_size.py diff with another app (different target)..." &>> output \ && python -m coverage run -a $IDF_PATH/tools/idf_size.py app.map --diff app_esp32s2.map &>> output \ - && echo -e "\n***\nRunning idf_size.py for esp32h2..." &>> output \ - && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 app_esp32h2.map &>> output \ - && echo -e "\n***\nRunning idf_size.py for esp32h2 (target autodetected)..." &>> output \ - && python -m coverage run -a $IDF_PATH/tools/idf_size.py app_esp32h2.map &>> output \ - && echo -e "\n***\nRunning idf_size.py --archives for esp32h2..." &>> output \ - && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 --archives app_esp32h2.map &>> output \ - && echo -e "\n***\nRunning idf_size.py --files for esp32h2..." &>> output \ - && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 --files app_esp32h2.map &>> output \ - && echo -e "\n***\nRunning idf_size.py --archive_details for esp32h2..." &>> output \ - && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 --archive_details libdriver.a app_esp32h2.map &>> output \ + && echo -e "\n***\nRunning idf_size.py for esp32h4..." &>> output \ + && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h4 app_esp32h4.map &>> output \ + && echo -e "\n***\nRunning idf_size.py for esp32h4 (target autodetected)..." &>> output \ + && python -m coverage run -a $IDF_PATH/tools/idf_size.py app_esp32h4.map &>> output \ + && echo -e "\n***\nRunning idf_size.py --archives for esp32h4..." &>> output \ + && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h4 --archives app_esp32h4.map &>> output \ + && echo -e "\n***\nRunning idf_size.py --files for esp32h4..." &>> output \ + && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h4 --files app_esp32h4.map &>> output \ + && echo -e "\n***\nRunning idf_size.py --archive_details for esp32h4..." &>> output \ + && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h4 --archive_details libdriver.a app_esp32h4.map &>> output \ && echo -e "\n***\nRunning idf_size.py for esp32c3..." &>> output \ && python -m coverage run -a $IDF_PATH/tools/idf_size.py --target esp32c3 app_esp32c3.map &>> output \ && echo -e "\n***\nRunning idf_size.py for esp32c3 with overflow..." &>> output \ @@ -146,7 +146,7 @@ csv_test() { && python -m coverage run -a $IDF_PATH/tools/idf_size.py --format=json --archive_details libdriver.a app.map --diff app2.map | python $IDF_PATH/tools/test_idf_size/json_validate_test.py &>> output \ && json_test esp32s2 \ && json_test esp32c3 \ - && json_test esp32h2 \ + && json_test esp32h4 \ && json_test esp32s3 \ && echo -e "\n***\nProducing CSV output..." &>> output \ && python -m coverage run -a $IDF_PATH/tools/idf_size.py --format=csv app.map &>> output \ @@ -159,7 +159,7 @@ csv_test() { && python -m coverage run -a $IDF_PATH/tools/idf_size.py --format=csv --archive_details libdriver.a app.map --diff app2.map &>> output \ && csv_test esp32s2 \ && csv_test esp32c3 \ - && csv_test esp32h2 \ + && csv_test esp32h4 \ && csv_test esp32s3 \ && echo -e "\n***\nProducing JSON file output..." &>> output \ && python -m coverage run -a $IDF_PATH/tools/idf_size.py --format=json --output-file output.json app.map &>> output \ diff --git a/tools/tools.json b/tools/tools.json index 184aac19de..5d170c3db6 100644 --- a/tools/tools.json +++ b/tools/tools.json @@ -437,7 +437,7 @@ "esp32s2", "esp32s3", "esp32c3", - "esp32h2", + "esp32h4", "esp32c2", "esp32c6" ],