From 7f5c415401cfb75dbc28e1a29a458078e00895b4 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Thu, 23 Sep 2021 14:30:50 +0800 Subject: [PATCH] ESP8684: introduce a new target esp8684 --- Kconfig | 10 ++ components/esp8684/CMakeLists.txt | 13 ++ components/esp8684/Kconfig | 217 +++++++++++++++++++++++ components/esp8684/Makefile.projbuild | 1 + components/esp8684/component.mk | 4 + components/esp8684/project_include.cmake | 5 + components/esptool_py/esptool | 2 +- tools/cmake/dfu.cmake | 2 + tools/cmake/toolchain-esp8684.cmake | 9 + tools/cmake/uf2.cmake | 2 + tools/find_build_apps/common.py | 1 + tools/idf_py_actions/constants.py | 2 +- tools/idf_size.py | 1 + 13 files changed, 267 insertions(+), 2 deletions(-) create mode 100644 components/esp8684/CMakeLists.txt create mode 100644 components/esp8684/Kconfig create mode 100644 components/esp8684/Makefile.projbuild create mode 100644 components/esp8684/component.mk create mode 100644 components/esp8684/project_include.cmake create mode 100644 tools/cmake/toolchain-esp8684.cmake diff --git a/Kconfig b/Kconfig index f1ede93458..2f0d3863c5 100644 --- a/Kconfig +++ b/Kconfig @@ -57,6 +57,14 @@ mainmenu "Espressif IoT Development Framework Configuration" select FREERTOS_UNICORE select IDF_TARGET_ARCH_RISCV + config IDF_TARGET_ESP8684 + bool + default "y" if IDF_TARGET="esp8684" + select FREERTOS_UNICORE + select IDF_TARGET_ARCH_RISCV + select ESPTOOLPY_NO_STUB # remove if ESPTOOL-303 + select IDF_ENV_FPGA + config IDF_TARGET_LINUX bool default "y" if IDF_TARGET="linux" @@ -68,6 +76,7 @@ mainmenu "Espressif IoT Development Framework Configuration" default 0x0005 if IDF_TARGET_ESP32C3 default 0x0009 if IDF_TARGET_ESP32S3 default 0x000A if IDF_TARGET_ESP32H2 # ESP32H2-TODO: IDF-3475 + default 0x000C if IDF_TARGET_ESP8684 default 0xFFFF menu "SDK tool configuration" @@ -78,6 +87,7 @@ mainmenu "Espressif IoT Development Framework Configuration" default "xtensa-esp32s3-elf-" if IDF_TARGET_ESP32S3 default "riscv32-esp-elf-" if IDF_TARGET_ESP32C3 default "riscv32-esp-elf-" if IDF_TARGET_ESP32H2 + default "riscv32-esp-elf-" if IDF_TARGET_ESP8684 help The prefix/path that is used to call the toolchain. The default setting assumes diff --git a/components/esp8684/CMakeLists.txt b/components/esp8684/CMakeLists.txt new file mode 100644 index 0000000000..60d31bfb98 --- /dev/null +++ b/components/esp8684/CMakeLists.txt @@ -0,0 +1,13 @@ +idf_build_get_property(target IDF_TARGET) +if(NOT "${target}" STREQUAL "esp8684") + return() +endif() + +if(NOT BOOTLOADER_BUILD) + # [refactor-todo] propagate these requirements for compatibility + # remove in the future + set(legacy_reqs driver efuse soc) +endif() + +idf_component_register(REQUIRES riscv "${legacy_reqs}" + REQUIRED_IDF_TARGETS esp8684) diff --git a/components/esp8684/Kconfig b/components/esp8684/Kconfig new file mode 100644 index 0000000000..ce17051b0f --- /dev/null +++ b/components/esp8684/Kconfig @@ -0,0 +1,217 @@ +menu "ESP8684-Specific" + visible if IDF_TARGET_ESP8684 + + choice ESP8684_DEFAULT_CPU_FREQ_MHZ + prompt "CPU frequency" + default ESP8684_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA + default ESP8684_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA + help + CPU frequency to be set on application startup. + + config ESP8684_DEFAULT_CPU_FREQ_40 + bool "40 MHz" + depends on IDF_ENV_FPGA + config ESP8684_DEFAULT_CPU_FREQ_80 + bool "80 MHz" + config ESP8684_DEFAULT_CPU_FREQ_160 + bool "160 MHz" + endchoice + + config ESP8684_DEFAULT_CPU_FREQ_MHZ + int + default 40 if ESP8684_DEFAULT_CPU_FREQ_40 + default 80 if ESP8684_DEFAULT_CPU_FREQ_80 + default 160 if ESP8684_DEFAULT_CPU_FREQ_160 + + menu "Cache config" + + choice ESP8684_MMU_PAGE_SIZE + # TODO: IDF-3821 + prompt "Cache page size" + default ESP8684_MMU_PAGE_SIZE_64KB + help + Cache page size to be set on application startup + + config ESP8684_MMU_PAGE_SIZE_16KB + bool "16KB" + config ESP8684_MMU_PAGE_SIZE_32KB + bool "32KB" + config ESP8684_MMU_PAGE_SIZE_64KB + bool "64KB" + endchoice + + config ESP8684_INSTRUCTION_CACHE_WRAP + bool + prompt "Instruction cache wrap" + help + If enabled, instruction cache will use wrap mode to read spi flash. + The wrap length is fixed to 32B + + + config ESP8684_MMU_PAGE_MODE + int + default 0 if ESP8684_MMU_PAGE_SIZE_16KB + default 1 if ESP8684_MMU_PAGE_SIZE_32KB + default 2 if ESP8684_MMU_PAGE_SIZE_64KB + + endmenu + + config ESP8684_DEBUG_OCDAWARE + bool "Make exception and panic handlers JTAG/OCD aware" + default y + select FREERTOS_DEBUG_OCDAWARE + help + The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and + instead of panicking, have the debugger stop on the offending instruction. + + config ESP8684_DEBUG_STUBS_ENABLE + bool "OpenOCD debug stubs" + default COMPILER_OPTIMIZATION_LEVEL_DEBUG + depends on !ESP8684_TRAX + help + Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging, + e.g. GCOV data dump. + + config ESP8684_BROWNOUT_DET + bool "Hardware brownout detect & reset" + default y + help + The ESP8684 has a built-in brownout detector which can detect if the voltage is lower than + a specific value. If this happens, it will reset the chip in order to prevent unintended + behaviour. + + choice ESP8684_BROWNOUT_DET_LVL_SEL + prompt "Brownout voltage level" + depends on ESP8684_BROWNOUT_DET + default ESP8684_BROWNOUT_DET_LVL_SEL_7 + help + The brownout detector will reset the chip when the supply voltage is approximately + below this level. Note that there may be some variation of brownout voltage level + between each chip. + + #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages + #of the brownout threshold levels. + config ESP8684_BROWNOUT_DET_LVL_SEL_7 + bool "2.51V" + config ESP8684_BROWNOUT_DET_LVL_SEL_6 + bool "2.64V" + config ESP8684_BROWNOUT_DET_LVL_SEL_5 + bool "2.76V" + config ESP8684_BROWNOUT_DET_LVL_SEL_4 + bool "2.92V" + config ESP8684_BROWNOUT_DET_LVL_SEL_3 + bool "3.10V" + config ESP8684_BROWNOUT_DET_LVL_SEL_2 + bool "3.27V" + endchoice + + config ESP8684_BROWNOUT_DET_LVL + int + default 2 if ESP8684_BROWNOUT_DET_LVL_SEL_2 + default 3 if ESP8684_BROWNOUT_DET_LVL_SEL_3 + default 4 if ESP8684_BROWNOUT_DET_LVL_SEL_4 + default 5 if ESP8684_BROWNOUT_DET_LVL_SEL_5 + default 6 if ESP8684_BROWNOUT_DET_LVL_SEL_6 + default 7 if ESP8684_BROWNOUT_DET_LVL_SEL_7 + + choice ESP8684_TIME_SYSCALL + prompt "Timers used for gettimeofday function" + default ESP8684_TIME_SYSCALL_USE_RTC_SYSTIMER + help + This setting defines which hardware timers are used to + implement 'gettimeofday' and 'time' functions in C library. + + - If both high-resolution (systimer) and RTC timers are used, timekeeping will + continue in deep sleep. Time will be reported at 1 microsecond + resolution. This is the default, and the recommended option. + - If only high-resolution timer (systimer) is used, gettimeofday will + provide time at microsecond resolution. + Time will not be preserved when going into deep sleep mode. + - If only RTC timer is used, timekeeping will continue in + deep sleep, but time will be measured at 6.(6) microsecond + resolution. Also the gettimeofday function itself may take + longer to run. + - If no timers are used, gettimeofday and time functions + return -1 and set errno to ENOSYS. + - When RTC is used for timekeeping, two RTC_STORE registers are + used to keep time in deep sleep mode. + + config ESP8684_TIME_SYSCALL_USE_RTC_SYSTIMER + bool "RTC and high-resolution timer" + select ESP_TIME_FUNCS_USE_RTC_TIMER + select ESP_TIME_FUNCS_USE_ESP_TIMER + config ESP8684_TIME_SYSCALL_USE_RTC + bool "RTC" + select ESP_TIME_FUNCS_USE_RTC_TIMER + config ESP8684_TIME_SYSCALL_USE_SYSTIMER + bool "High-resolution timer" + select ESP_TIME_FUNCS_USE_ESP_TIMER + config ESP8684_TIME_SYSCALL_USE_NONE + bool "None" + select ESP_TIME_FUNCS_USE_NONE + endchoice + + choice ESP8684_RTC_CLK_SRC + prompt "RTC clock source" + default ESP8684_RTC_CLK_SRC_INT_RC + help + Choose which clock is used as RTC clock source. + + config ESP8684_RTC_CLK_SRC_INT_RC + bool "Internal 150kHz RC oscillator" + config ESP8684_RTC_CLK_SRC_EXT_OSC + bool "External 32kHz oscillator at 32K_XP pin" + config ESP8684_RTC_CLK_SRC_INT_8MD256 + bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" + endchoice + + config ESP8684_RTC_CLK_CAL_CYCLES + int "Number of cycles for RTC_SLOW_CLK calibration" + default 3000 if ESP8684_RTC_CLK_SRC_EXT_CRYS || ESP8684_RTC_CLK_SRC_EXT_OSC || ESP8684_RTC_CLK_SRC_INT_8MD256 + default 1024 if ESP8684_RTC_CLK_SRC_INT_RC + range 0 27000 if ESP8684_RTC_CLK_SRC_EXT_CRYS || ESP8684_RTC_CLK_SRC_EXT_OSC || ESP8684_RTC_CLK_SRC_INT_8MD256 + range 0 32766 if ESP8684_RTC_CLK_SRC_INT_RC + help + When the startup code initializes RTC_SLOW_CLK, it can perform + calibration by comparing the RTC_SLOW_CLK frequency with main XTAL + frequency. This option sets the number of RTC_SLOW_CLK cycles measured + by the calibration routine. Higher numbers increase calibration + precision, which may be important for applications which spend a lot of + time in deep sleep. Lower numbers reduce startup time. + + When this option is set to 0, clock calibration will not be performed at + startup, and approximate clock frequencies will be assumed: + + - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024. + - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. + In case more value will help improve the definition of the launch of the crystal. + If the crystal could not start, it will be switched to internal RC. + + config ESP8684_NO_BLOBS + bool "No Binary Blobs" + depends on !BT_ENABLED + default n + help + If enabled, this disables the linking of binary libraries in the application build. Note + that after enabling this Wi-Fi/Bluetooth will not work. + + config ESP8684_LIGHTSLEEP_GPIO_RESET_WORKAROUND # IDF-3904 + bool "light sleep GPIO reset workaround" + default y + select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE + help + ESP8684 will reset at wake-up if GPIO is received a small electrostatic pulse during + light sleep, with specific condition + + - GPIO needs to be configured as input-mode only + - The pin receives a small electrostatic pulse, and reset occurs when the pulse + voltage is higher than 6 V + + For GPIO set to input mode only, it is not a good practice to leave it open/floating, + The hardware design needs to controlled it with determined supply or ground voltage + is necessary. + + This option provides a software workaround for this issue. Configure to isolate all + GPIO pins in sleep state. + +endmenu # ESP8684-Specific diff --git a/components/esp8684/Makefile.projbuild b/components/esp8684/Makefile.projbuild new file mode 100644 index 0000000000..9c0b00af76 --- /dev/null +++ b/components/esp8684/Makefile.projbuild @@ -0,0 +1 @@ +# ESP8684 is not supported in the GNU Make build system. diff --git a/components/esp8684/component.mk b/components/esp8684/component.mk new file mode 100644 index 0000000000..a2f7dc1797 --- /dev/null +++ b/components/esp8684/component.mk @@ -0,0 +1,4 @@ +# +# Component Makefile +# +COMPONENT_CONFIG_ONLY := 1 diff --git a/components/esp8684/project_include.cmake b/components/esp8684/project_include.cmake new file mode 100644 index 0000000000..98d8425094 --- /dev/null +++ b/components/esp8684/project_include.cmake @@ -0,0 +1,5 @@ +set(compile_options "-Wno-error=format=" + "-nostartfiles" + "-Wno-format") + +idf_build_set_property(COMPILE_OPTIONS "${compile_options}" APPEND) diff --git a/components/esptool_py/esptool b/components/esptool_py/esptool index b082b0ed2d..3203a6ec49 160000 --- a/components/esptool_py/esptool +++ b/components/esptool_py/esptool @@ -1 +1 @@ -Subproject commit b082b0ed2d86b3330134c4854a021dfd14c29b08 +Subproject commit 3203a6ec493daed22cad5ae48d39c83f77a4dd59 diff --git a/tools/cmake/dfu.cmake b/tools/cmake/dfu.cmake index eb45aade84..23cd378042 100644 --- a/tools/cmake/dfu.cmake +++ b/tools/cmake/dfu.cmake @@ -13,6 +13,8 @@ function(__add_dfu_targets) return() elseif("${target}" STREQUAL "esp32h2") return() + elseif("${target}" STREQUAL "esp8684") + return() elseif("${target}" STREQUAL "linux") return() else() diff --git a/tools/cmake/toolchain-esp8684.cmake b/tools/cmake/toolchain-esp8684.cmake new file mode 100644 index 0000000000..cd30a2ae04 --- /dev/null +++ b/tools/cmake/toolchain-esp8684.cmake @@ -0,0 +1,9 @@ +set(CMAKE_SYSTEM_NAME Generic) + +set(CMAKE_C_COMPILER riscv32-esp-elf-gcc) +set(CMAKE_CXX_COMPILER riscv32-esp-elf-g++) +set(CMAKE_ASM_COMPILER riscv32-esp-elf-gcc) + +set(CMAKE_C_FLAGS "-march=rv32imc" CACHE STRING "C Compiler Base Flags") +set(CMAKE_CXX_FLAGS "-march=rv32imc" CACHE STRING "C++ Compiler Base Flags") +set(CMAKE_EXE_LINKER_FLAGS "-nostartfiles -march=rv32imc --specs=nosys.specs" CACHE STRING "Linker Base Flags") diff --git a/tools/cmake/uf2.cmake b/tools/cmake/uf2.cmake index 0c54c47dfe..6f06e06261 100644 --- a/tools/cmake/uf2.cmake +++ b/tools/cmake/uf2.cmake @@ -12,6 +12,8 @@ function(__add_uf2_targets) set(uf2_family_id "0xc47e5767") elseif("${target}" STREQUAL "esp32h2") set(uf2_family_id "0xd42ba06c") # ESP32H2-TODO: IDF-3487 + elseif("${target}" STREQUAL "esp8684") + set(uf2_family_id "0xd42ba06c") elseif("${target}" STREQUAL "linux") return() else() diff --git a/tools/find_build_apps/common.py b/tools/find_build_apps/common.py index 1bd4f486a6..d2846ceeec 100644 --- a/tools/find_build_apps/common.py +++ b/tools/find_build_apps/common.py @@ -296,6 +296,7 @@ class BuildSystem: 'ESP32-S3': 'esp32s3', 'ESP32-C3': 'esp32c3', 'ESP32-H2': 'esp32h2', + 'ESP8684': 'esp8684', 'Linux': 'linux', } diff --git a/tools/idf_py_actions/constants.py b/tools/idf_py_actions/constants.py index 53c652c7fd..eadb5653ab 100644 --- a/tools/idf_py_actions/constants.py +++ b/tools/idf_py_actions/constants.py @@ -39,4 +39,4 @@ GENERATORS = collections.OrderedDict([ URL_TO_DOC = 'https://docs.espressif.com/projects/esp-idf' SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3'] -PREVIEW_TARGETS = ['linux', 'esp32h2'] +PREVIEW_TARGETS = ['linux', 'esp32h2', 'esp8684'] diff --git a/tools/idf_size.py b/tools/idf_size.py index 92b1f9f34e..ac6095a9da 100755 --- a/tools/idf_size.py +++ b/tools/idf_size.py @@ -83,6 +83,7 @@ class MemRegions(object): with open(os.path.join(os.path.dirname(__file__), 'idf_size_yaml', target + '_data_info.yaml'), 'r') as stream: chip_info = (yaml.safe_load(stream)) except FileNotFoundError: + elif target in ['esp32c3', 'esp32h2', 'esp8684']: raise RuntimeError('Target not detected.') return sorted([get_mem_reg_def(chip_info, item) for item in chip_info])