kopia lustrzana https://github.com/espressif/esp-idf
test: add i2s tdm full duplex multi device test app
wangyuanze
laokaiyao
rodzic
d9df69e815
commit
4d0ac129b4
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@ -340,6 +340,14 @@ component_ut_pytest_esp32s3_flash_multi:
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- build_pytest_components_esp32s3
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tags: [ esp32s3, flash_mutli ]
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component_ut_pytest_esp32s3_generic_multi_device:
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extends:
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- .pytest_components_dir_template
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- .rules:test:component_ut-esp32s3
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needs:
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- build_pytest_components_esp32s3
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tags: [ esp32s3, Example_SPI_Quad_Multi_device, generic_multi_device ]
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component_ut_pytest_esp32c2_generic:
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extends:
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- .pytest_components_dir_template
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@ -4,6 +4,14 @@ components/driver/test_apps/i2s_test_apps:
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disable:
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- if: SOC_I2S_SUPPORTED != 1
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components/driver/test_apps/i2s_test_apps/i2s_tdm:
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disable:
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- if: SOC_I2S_SUPPORTS_TDM != 1
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disable_test:
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- if: IDF_TARGET != "esp32s3"
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temporary: true
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reason: lack of runners
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components/driver/test_apps/i2s_test_apps/legacy_i2s_adc_dac:
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disable:
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- if: SOC_I2S_SUPPORTS_ADC_DAC != 1
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@ -0,0 +1,6 @@
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# The following lines of boilerplate have to be in your project's CMakeLists
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# in this exact order for cmake to work correctly
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cmake_minimum_required(VERSION 3.16)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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project(i2s_tdm_full_duplex_test)
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@ -0,0 +1,3 @@
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| Supported Targets | ESP32-C3 | ESP32-S3 |
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| ----------------- | -------- | -------- |
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@ -0,0 +1,4 @@
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idf_component_register(SRCS "test_app_main.c" "test_i2s_tdm_full_duplex.c"
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INCLUDE_DIRS "."
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WHOLE_ARCHIVE
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)
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@ -0,0 +1,41 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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#include "unity.h"
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#include "unity_test_runner.h"
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#include "esp_heap_caps.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#define TEST_MEMORY_LEAK_THRESHOLD (-300)
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static size_t before_free_8bit;
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static size_t before_free_32bit;
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static void check_leak(size_t before_free, size_t after_free, const char *type)
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{
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ssize_t delta = after_free - before_free;
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printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta);
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TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak");
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}
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void setUp(void)
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{
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before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
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before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
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}
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void tearDown(void)
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{
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size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
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size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
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check_leak(before_free_8bit, after_free_8bit, "8BIT");
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check_leak(before_free_32bit, after_free_32bit, "32BIT");
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}
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void app_main(void)
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{
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unity_run_menu();
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}
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@ -0,0 +1,322 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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#include <stdio.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/queue.h"
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#include "freertos/task.h"
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#include "esp_log.h"
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#include "unity.h"
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#include "driver/gpio.h"
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#include "driver/i2s_tdm.h"
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static const char *TAG = "i2s_tdm_full_duplex_test";
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#define TEST_I2S_FRAME_SIZE (128)
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#define TEST_I2S_PACKET_COUNT (512)
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#define TEST_I2S_NUM (I2S_NUM_0) // ESP32-C3 has only I2S0
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#define TEST_I2S_BCK_IO (GPIO_NUM_4)
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#define TEST_I2S_WS_IO (GPIO_NUM_5)
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#define TEST_I2S_DO_IO (GPIO_NUM_6)
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#define TEST_I2S_DI_IO (GPIO_NUM_7) // DI and DO gpio will be reversed on slave runner
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typedef struct {
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TaskHandle_t maintask_handle;
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QueueHandle_t tx_queue;
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i2s_chan_handle_t tx_channel_handle;
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i2s_data_bit_width_t tx_data_bit_width;
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i2s_tdm_slot_mask_t tdm_slot_mask;
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} test_i2s_tdm_write_task_args_t;
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typedef struct {
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uint32_t *buffer;
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uint32_t buffer_size;
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} test_i2s_tdm_write_buffer_t;
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static void test_i2s_tdm_master_write_task(void *args)
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{
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test_i2s_tdm_write_task_args_t *task_args = (test_i2s_tdm_write_task_args_t*)args;
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/* Allocate I2S tx buffer */
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uint32_t channel_count = 32 - __builtin_clz(task_args->tdm_slot_mask);
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uint32_t tx_buffer_size = TEST_I2S_FRAME_SIZE * channel_count * (task_args->tx_data_bit_width / 8);
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ESP_LOGI(TAG, "Allocating I2S TDM master tx buffer, size=%ld", tx_buffer_size);
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uint32_t *tx_buffer = malloc(tx_buffer_size);
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TEST_ASSERT(tx_buffer);
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uint32_t data_cnt = 0;
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size_t bytes_written = 0;
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ESP_LOGI(TAG, "I2S TDM master send start");
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TEST_ESP_OK(i2s_channel_enable(task_args->tx_channel_handle));
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while (xTaskNotifyWait(0, ULONG_MAX, NULL, 0) == pdFALSE) { // if main task sends terminate signal, exit the loop
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/* Fill in the tx buffer */
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for (uint32_t i = 0; i < tx_buffer_size / sizeof(uint32_t); i ++) {
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tx_buffer[i] = data_cnt;
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data_cnt ++;
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}
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TEST_ESP_OK(i2s_channel_write(task_args->tx_channel_handle, tx_buffer, tx_buffer_size,
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&bytes_written, portMAX_DELAY));
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TEST_ASSERT_EQUAL(tx_buffer_size, bytes_written);
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}
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ESP_LOGI(TAG, "I2S TDM master send stop");
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TEST_ESP_OK(i2s_channel_disable(task_args->tx_channel_handle));
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ESP_LOGI(TAG, "Freeing I2S TDM master tx buffer");
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free(tx_buffer);
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xTaskNotifyGive(task_args->maintask_handle); // notify main task that cleanup is done
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vTaskSuspend(NULL); // wait to be deleted
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}
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static void test_i2s_tdm_master(uint32_t sample_rate, i2s_data_bit_width_t bit_width, i2s_tdm_slot_mask_t slot_mask)
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{
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i2s_chan_handle_t i2s_tdm_tx_handle = NULL;
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i2s_chan_handle_t i2s_tdm_rx_handle = NULL;
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/* Create I2S tx and rx channels */
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i2s_chan_config_t i2s_channel_config = {
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.id = TEST_I2S_NUM,
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.role = I2S_ROLE_MASTER,
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.dma_desc_num = 4,
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.dma_frame_num = TEST_I2S_FRAME_SIZE,
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.auto_clear = false
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};
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TEST_ESP_OK(i2s_new_channel(&i2s_channel_config, &i2s_tdm_tx_handle, &i2s_tdm_rx_handle));
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/* Configure channels to TDM mode */
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i2s_tdm_config_t i2s_tdm_config = {
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.clk_cfg = I2S_TDM_CLK_DEFAULT_CONFIG(sample_rate),
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.slot_cfg = I2S_TDM_PHILIP_SLOT_DEFAULT_CONFIG(bit_width, I2S_SLOT_MODE_STEREO, slot_mask),
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.gpio_cfg = {
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.mclk = GPIO_NUM_NC,
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.bclk = TEST_I2S_BCK_IO,
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.ws = TEST_I2S_WS_IO,
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.dout = TEST_I2S_DO_IO,
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.din = TEST_I2S_DI_IO
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},
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};
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TEST_ESP_OK(i2s_channel_init_tdm_mode(i2s_tdm_tx_handle, &i2s_tdm_config));
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TEST_ESP_OK(i2s_channel_init_tdm_mode(i2s_tdm_rx_handle, &i2s_tdm_config));
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/* Create TDM write task */
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TaskHandle_t subtask_handle = NULL;
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test_i2s_tdm_write_task_args_t task_args = {
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.tx_channel_handle = i2s_tdm_tx_handle,
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.maintask_handle = xTaskGetCurrentTaskHandle(),
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.tx_data_bit_width = bit_width,
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.tdm_slot_mask = slot_mask
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};
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xTaskCreate(test_i2s_tdm_master_write_task, "I2S TDM Write Task", 4096, &task_args, 5, &subtask_handle);
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/* Allocate I2S rx buffer */
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uint32_t channel_count = 32 - __builtin_clz(slot_mask);
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uint32_t rx_buffer_size = channel_count * TEST_I2S_FRAME_SIZE * (bit_width / 8);
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ESP_LOGI(TAG, "Allocating I2S TDM master rx buffer, size=%"PRIu32, rx_buffer_size);
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uint32_t *rx_buffer = malloc(rx_buffer_size);
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TEST_ASSERT(rx_buffer);
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uint8_t is_packet_valid = 0;
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uint32_t good_packet_cnt = 0;
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size_t bytes_read = 0;
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ESP_LOGI(TAG, "I2S TDM master receive start");
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TEST_ESP_OK(i2s_channel_enable(i2s_tdm_rx_handle));
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for(uint32_t packet_cnt = 0; packet_cnt < TEST_I2S_PACKET_COUNT; packet_cnt ++) {
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TEST_ESP_OK(i2s_channel_read(i2s_tdm_rx_handle, rx_buffer, rx_buffer_size,
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&bytes_read, portMAX_DELAY));
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TEST_ASSERT_EQUAL(rx_buffer_size, bytes_read);
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/* Check for empty packet */
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if (rx_buffer[0] == 0) { // empty packet
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if (is_packet_valid == 0) { // omit leading empty packets
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packet_cnt = 0;
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} else {
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ESP_LOGW(TAG, "empty packet %"PRIu32, packet_cnt);
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}
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continue;
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}
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is_packet_valid = 1;
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/* Check received packet */
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uint8_t is_good_packet = 1;
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uint32_t last_value = rx_buffer[0];
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for (uint32_t j = 1; j < rx_buffer_size / sizeof(uint32_t); j ++) {
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if (rx_buffer[j] == last_value + 1) { // increased by 1
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last_value = rx_buffer[j];
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} else {
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is_good_packet = 0;
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ESP_LOGW(TAG, "corrupted packet %"PRIu32, packet_cnt);
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break; // corrupted packet
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}
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}
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if (is_good_packet) {
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good_packet_cnt ++;
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}
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}
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ESP_LOGI(TAG, "Send signal to terminate subtask");
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xTaskNotifyGive(subtask_handle); // notify subtask to exit
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xTaskNotifyWait(0, ULONG_MAX, NULL, portMAX_DELAY); // wait subtask to do some cleanups
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ESP_LOGI(TAG, "Deleting subtask");
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vTaskDelete(subtask_handle); // delete subtask
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ESP_LOGI(TAG, "I2S TDM master receive stop");
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TEST_ESP_OK(i2s_channel_disable(i2s_tdm_rx_handle));
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ESP_LOGI(TAG, "Freeing I2S TDM master rx buffer");
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free(rx_buffer);
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ESP_LOGI(TAG, "Deleting i2s tx and rx channels");
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TEST_ESP_OK(i2s_del_channel(i2s_tdm_rx_handle));
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TEST_ESP_OK(i2s_del_channel(i2s_tdm_tx_handle));
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if (good_packet_cnt < TEST_I2S_PACKET_COUNT-4) { // if there are enough good packets
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ESP_LOGE(TAG, "Good packet count(%"PRIu32") less than threshold", good_packet_cnt);
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TEST_FAIL();
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} else {
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ESP_LOGI(TAG, "Good packet count: %"PRIu32, good_packet_cnt);
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}
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}
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static void test_i2s_tdm_slave(uint32_t sample_rate, i2s_data_bit_width_t bit_width, i2s_tdm_slot_mask_t slot_mask)
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{
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i2s_chan_handle_t i2s_tdm_tx_handle = NULL;
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i2s_chan_handle_t i2s_tdm_rx_handle = NULL;
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/* Create I2S tx and rx channels */
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i2s_chan_config_t i2s_channel_config = {
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.id = TEST_I2S_NUM,
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.role = I2S_ROLE_SLAVE,
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.dma_desc_num = 4,
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.dma_frame_num = TEST_I2S_FRAME_SIZE,
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.auto_clear = false
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};
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TEST_ESP_OK(i2s_new_channel(&i2s_channel_config, &i2s_tdm_tx_handle, &i2s_tdm_rx_handle));
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/* Configure channels to TDM mode */
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i2s_tdm_config_t i2s_tdm_config = {
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.clk_cfg = I2S_TDM_CLK_DEFAULT_CONFIG(sample_rate),
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.slot_cfg = I2S_TDM_PHILIP_SLOT_DEFAULT_CONFIG(bit_width, I2S_SLOT_MODE_STEREO, slot_mask),
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.gpio_cfg = {
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.mclk = GPIO_NUM_NC,
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.bclk = TEST_I2S_BCK_IO,
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.ws = TEST_I2S_WS_IO,
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.dout = TEST_I2S_DI_IO,
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.din = TEST_I2S_DO_IO // on slave, swap DI and DO pin
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},
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};
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TEST_ESP_OK(i2s_channel_init_tdm_mode(i2s_tdm_tx_handle, &i2s_tdm_config));
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TEST_ESP_OK(i2s_channel_init_tdm_mode(i2s_tdm_rx_handle, &i2s_tdm_config));
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/* Allocate I2S rx buffer */
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uint32_t channel_count = 32 - __builtin_clz(slot_mask);
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uint32_t rx_buffer_size = TEST_I2S_FRAME_SIZE * channel_count * (bit_width / 8);
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ESP_LOGI(TAG, "Allocating I2S TDM slave buffer, size=%ld", rx_buffer_size);
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uint32_t *rx_buffer = malloc(rx_buffer_size);
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TEST_ASSERT(rx_buffer);
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ESP_LOGI(TAG, "I2S TDM slave receive & send start");
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TEST_ESP_OK(i2s_channel_enable(i2s_tdm_rx_handle));
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TEST_ESP_OK(i2s_channel_enable(i2s_tdm_tx_handle));
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uint32_t packet_cnt = 0;
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size_t bytes_read = 0, bytes_written = 0;
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while (packet_cnt < TEST_I2S_PACKET_COUNT) {
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TEST_ESP_OK(i2s_channel_read(i2s_tdm_rx_handle, rx_buffer, rx_buffer_size,
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&bytes_read, portMAX_DELAY));
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TEST_ASSERT_EQUAL(rx_buffer_size, bytes_read);
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TEST_ESP_OK(i2s_channel_write(i2s_tdm_tx_handle, rx_buffer, rx_buffer_size,
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&bytes_written, portMAX_DELAY));
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TEST_ASSERT_EQUAL(rx_buffer_size, bytes_written);
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if (rx_buffer[0]) { // packet is not empty
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packet_cnt ++;
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}
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}
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/* Send empty buffers to flush DMA ringbuffer until timeout */
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memset(rx_buffer, 0, rx_buffer_size);
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while (i2s_channel_write(i2s_tdm_tx_handle, rx_buffer, rx_buffer_size,
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&bytes_written, pdMS_TO_TICKS(200)) != ESP_ERR_TIMEOUT);
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ESP_LOGI(TAG, "I2S TDM slave receive stop");
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TEST_ESP_OK(i2s_channel_disable(i2s_tdm_rx_handle));
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TEST_ESP_OK(i2s_channel_disable(i2s_tdm_tx_handle));
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ESP_LOGI(TAG, "Freeing I2S TDM slave buffer");
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free(rx_buffer);
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ESP_LOGI(TAG, "Deleting i2s tx and rx channels");
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TEST_ESP_OK(i2s_del_channel(i2s_tdm_rx_handle));
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TEST_ESP_OK(i2s_del_channel(i2s_tdm_tx_handle));
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}
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static void test_i2s_tdm_master_48k_32bits_4slots(void)
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{
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test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_32BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
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}
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static void test_i2s_tdm_slave_48k_32bits_4slots(void)
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{
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test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_32BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
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}
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TEST_CASE_MULTIPLE_DEVICES("I2S TDM full duplex multiple device test (48k, 32bits, 4slots)", "[I2S_TDM]",
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test_i2s_tdm_master_48k_32bits_4slots, test_i2s_tdm_slave_48k_32bits_4slots);
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static void test_i2s_tdm_master_48k_16bits_4slots(void)
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{
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test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
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}
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static void test_i2s_tdm_slave_48k_16bits_4slots(void)
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{
|
||||
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2S TDM full duplex multiple device test (48k, 16bits, 4slots)", "[I2S_TDM]",
|
||||
test_i2s_tdm_master_48k_16bits_4slots, test_i2s_tdm_slave_48k_16bits_4slots);
|
||||
|
||||
|
||||
static void test_i2s_tdm_master_48k_8bits_4slots(void)
|
||||
{
|
||||
test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_8BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
|
||||
}
|
||||
|
||||
static void test_i2s_tdm_slave_48k_8bits_4slots(void)
|
||||
{
|
||||
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_8BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2S TDM full duplex multiple device test (48k, 8bits, 4slots)", "[I2S_TDM]",
|
||||
test_i2s_tdm_master_48k_8bits_4slots, test_i2s_tdm_slave_48k_8bits_4slots);
|
||||
|
||||
|
||||
static void test_i2s_tdm_master_48k_16bits_8slots(void)
|
||||
{
|
||||
test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3 |
|
||||
I2S_TDM_SLOT4 | I2S_TDM_SLOT5 | I2S_TDM_SLOT6 | I2S_TDM_SLOT7);
|
||||
}
|
||||
|
||||
static void test_i2s_tdm_slave_48k_16bits_8slots(void)
|
||||
{
|
||||
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3 |
|
||||
I2S_TDM_SLOT4 | I2S_TDM_SLOT5 | I2S_TDM_SLOT6 | I2S_TDM_SLOT7);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2S TDM full duplex multiple device test (48k, 16bits, 8slots)", "[I2S_TDM]",
|
||||
test_i2s_tdm_master_48k_16bits_8slots, test_i2s_tdm_slave_48k_16bits_8slots);
|
||||
|
||||
|
||||
static void test_i2s_tdm_master_96k_16bits_4slots(void)
|
||||
{
|
||||
test_i2s_tdm_master(96000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
|
||||
}
|
||||
|
||||
static void test_i2s_tdm_slave_96k_16bits_8slots(void)
|
||||
{
|
||||
test_i2s_tdm_slave(96000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2S TDM full duplex multiple device test (96k, 16bits, 4slots)", "[I2S_TDM]",
|
||||
test_i2s_tdm_master_96k_16bits_4slots, test_i2s_tdm_slave_96k_16bits_8slots);
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
# SPDX-License-Identifier: Unlicense OR CC0-1.0
|
||||
from typing import Tuple
|
||||
|
||||
import pytest
|
||||
from pytest_embedded import Dut
|
||||
|
||||
|
||||
def run_multi_device_case(master: Dut, slave: Dut, case_name: str) -> None:
|
||||
master.write(case_name)
|
||||
slave.write(case_name)
|
||||
|
||||
slave.expect(r'\t\(2\)\s+\".+\"')
|
||||
slave.write('2')
|
||||
master.expect(r'\t\(2\)\s+\".+\"')
|
||||
master.write('1')
|
||||
|
||||
master.expect_unity_test_output()
|
||||
slave.expect_unity_test_output()
|
||||
|
||||
master.expect_exact("Enter next test, or 'enter' to see menu")
|
||||
slave.expect_exact("Enter next test, or 'enter' to see menu")
|
||||
|
||||
|
||||
@pytest.mark.esp32s3
|
||||
@pytest.mark.Example_SPI_Quad_Multi_device # to be changed to `generic_multi_device` in the future
|
||||
@pytest.mark.parametrize('count', [
|
||||
2,
|
||||
], indirect=True)
|
||||
def test_i2s_tdm_full_duplex(dut: Tuple[Dut, Dut]) -> None:
|
||||
master = dut[0]
|
||||
slave = dut[1]
|
||||
master.expect_exact('Press ENTER to see the list of tests')
|
||||
slave.expect_exact('Press ENTER to see the list of tests')
|
||||
|
||||
run_multi_device_case(master, slave, '"I2S TDM full duplex multiple device test (48k, 32bits, 4slots)"')
|
||||
run_multi_device_case(master, slave, '"I2S TDM full duplex multiple device test (48k, 16bits, 4slots)"')
|
||||
run_multi_device_case(master, slave, '"I2S TDM full duplex multiple device test (48k, 8bits, 4slots)"')
|
||||
run_multi_device_case(master, slave, '"I2S TDM full duplex multiple device test (48k, 16bits, 8slots)"')
|
||||
run_multi_device_case(master, slave, '"I2S TDM full duplex multiple device test (96k, 16bits, 4slots)"')
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
CONFIG_FREERTOS_HZ=1000
|
||||
CONFIG_ESP_TASK_WDT=n
|
||||
|
|
@ -66,6 +66,7 @@ markers =
|
|||
|
||||
# multi-dut markers
|
||||
multi_dut_generic: tests should be run on generic runners, at least have two duts connected.
|
||||
Example_SPI_Quad_Multi_device: SPI multi device marker
|
||||
|
||||
# host_test markers
|
||||
host_test: tests which shouldn not be built at the build stage, and instead built in host_test stage.
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue