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feat(gpio): update gpio docs on ESP32C5 MP version

pull/13854/head
gaoxu 2024-04-24 17:18:58 +08:00
rodzic 605f2309bf
commit 3db559ab21
7 zmienionych plików z 55 dodań i 36 usunięć
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2
components/esp_pm/Kconfig
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@ -3,7 +3,7 @@ menu "Power Management"
bool "Support for power management"
# SMP FreeRTOS currently does not support power management IDF-4997
# Power Management is not supported on ESP32C5 MP IDF-8643
depends on (!FREERTOS_SMP || __DOXYGEN__) && !IDF_TARGET_ESP32C5
depends on (!FREERTOS_SMP && !IDF_TARGET_ESP32C5) || __DOXYGEN__
default n
help
If enabled, application is compiled with support for power management.

2
components/soc/esp32p4/ld/esp32p4.peripherals.ld
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@ -58,7 +58,7 @@ PROVIDE ( GPIO_EXT = 0x500E0F00 );
PROVIDE ( SDM = 0x500E0F00 );
PROVIDE ( GLITCH_FILTER = 0x500E0F30 );
PROVIDE ( GPIO_ETM = 0x500E0F60 );
PROVIDE ( IOMUX = 0x500E1000 );
PROVIDE ( IO_MUX = 0x500E1000 );
PROVIDE ( MSPI_IOMUX = 0x500E1200 );
PROVIDE ( HP_SYSTEM = 0x500E5000 );

1
docs/docs_not_updated/esp32c5.txt
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@ -114,7 +114,6 @@ api-reference/peripherals/usb_host/usb_host_notes_design.rst
api-reference/peripherals/usb_host/usb_host_notes_usbh.rst
api-reference/peripherals/hmac.rst
api-reference/peripherals/usb_device.rst
api-reference/peripherals/gpio.rst
api-reference/peripherals/sdspi_host.rst
api-reference/peripherals/spi_slave.rst
api-reference/peripherals/etm.rst

4
docs/en/api-reference/peripherals/gpio.rst
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@ -73,7 +73,9 @@ In addition, if you would like to dump the configurations of all IOs, you can us
If an IO pin is routed to a peripheral signal through the GPIO matrix, the signal ID printed in the dump information is defined in the :component_file:`soc/{IDF_TARGET_PATH_NAME}/include/soc/gpio_sig_map.h` header file. The word ``**RESERVED**`` indicates the IO is occupied by either SPI flash or PSRAM. It is strongly not recommended to reconfigure them for other application purposes.
.. only:: esp32c3 or esp32c6 or esp32h2 or esp32p4 or esp32s2 or esp32s3
Do not rely on the default configurations values in the Technical Reference Manual, because it may be changed in the bootloader or application startup code before app_main.
.. only:: esp32c3 or esp32c6 or esp32h2 or esp32p4 or esp32s2 or esp32s3 or esp32c5
Configure USB PHY Pins to GPIO
-------------------------------

38
docs/en/api-reference/peripherals/gpio/esp32c5.inc
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@ -9,8 +9,6 @@
.. gpio-summary
Current GPIOs are for {IDF_TARGET_NAME} beta3 version. {IDF_TARGET_NAME} MP version would have 2 more available IOs, and some pin functions are changed. The {IDF_TARGET_NAME} MP version will be updated later.
The {IDF_TARGET_NAME} chip features 27 physical GPIO pins (GPIO0 ~ GPIO26). Each pin can be used as a general-purpose I/O, or to be connected to an internal peripheral signal. Through GPIO matrix and IO MUX, peripheral input signals can be from any IO pins, and peripheral output signals can be routed to any IO pins. Together these modules provide highly configurable I/O. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
@ -42,7 +40,7 @@ The table below provides more information on pin usage, and please note the comm
* - GPIO3
- ADC1_CH2
- LP_GPIO3
- Strapping pin
-
* - GPIO4
- ADC1_CH3
@ -57,7 +55,7 @@ The table below provides more information on pin usage, and please note the comm
* - GPIO6
- ADC1_CH5
- LP_GPIO6
- Strapping pin
-
* - GPIO7
-
@ -92,12 +90,12 @@ The table below provides more information on pin usage, and please note the comm
* - GPIO13
-
-
-
- USB-JTAG
* - GPIO14
-
-
-
- USB-JTAG
* - GPIO15
-
@ -107,12 +105,12 @@ The table below provides more information on pin usage, and please note the comm
* - GPIO16
-
-
-
- SPI0/1
* - GPIO17
-
-
-
- SPI0/1
* - GPIO18
-
@ -142,27 +140,37 @@ The table below provides more information on pin usage, and please note the comm
* - GPIO23
-
-
- SPI0/1
-
* - GPIO24
-
-
- SPI0/1
-
* - GPIO25
-
-
- USB-JTAG
-
* - GPIO26
-
-
- USB-JTAG
-
* - GPIO27
-
-
- Strapping pin
* - GPIO28
-
-
- Strapping pin
.. note::
- Strapping pin: GPIO2, GPIO3, GPIO6, and GPIO7 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__.
- SPI0/1: GPIO18 ~ GPIO24 are usually used for SPI flash and not recommended for other uses.
- USB-JTAG: GPIO25 and GPIO26 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled.
- Strapping pin: GPIO2, GPIO7, GPIO27, and GPIO28 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__.
- SPI0/1: GPIO16 ~ GPIO22 are usually used for SPI flash and not recommended for other uses.
- USB-JTAG: GPIO13 and GPIO14 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled.
---

4
docs/zh_CN/api-reference/peripherals/gpio.rst
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@ -73,7 +73,9 @@ GPIO 驱动提供了一个函数 :cpp:func:`gpio_dump_io_configuration` 用来
如果 IO 管脚通过 GPIO 交换矩阵连接到内部外设信号，输出信息打印中的外设信号 ID 定义可以在 :component_file:`soc/{IDF_TARGET_PATH_NAME}/include/soc/gpio_sig_map.h` 头文件中查看。``**RESERVED**`` 字样则表示此 IO 用于连接 SPI flash 或 PSRAM，强烈建议不要重新配置这些管脚用于其他功能。
.. only:: esp32c3 or esp32c6 or esp32h2 or esp32p4 or esp32s2 or esp32s3
请不要依赖技术参考手册中记录的GPIO默认配置状态，因为特殊用途的GPIO可能会在app_main之前被引导程序或应用程序启动阶段的代码更改。
.. only:: esp32c3 or esp32c6 or esp32h2 or esp32p4 or esp32s2 or esp32s3 or esp32c5
配置 USB PHY 管脚 为普通 GPIO 管脚
---------------------------------------

40
docs/zh_CN/api-reference/peripherals/gpio/esp32c5.inc
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@ -9,9 +9,7 @@
.. gpio-summary
当前的 GPIO 适用于 {IDF_TARGET_NAME} beta3 版本。{IDF_TARGET_NAME} MP 版本将会增加 2 个可用的 IO，并且一些引脚功能将会改变。{IDF_TARGET_NAME} MP 版本将会在以后更新。
{IDF_TARGET_NAME} 芯片具有 27 个物理 GPIO 管脚（GPIO0 ~ GPIO26）。每个管脚都可用作一个通用 IO，或连接一个内部的外设信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。
{IDF_TARGET_NAME} 芯片具有 29 个物理 GPIO 管脚（GPIO0 ~ GPIO28）。每个管脚都可用作一个通用 IO，或连接一个内部的外设信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。
下表提供了各管脚的详细信息，部分 GPIO 具有特殊的使用限制，具体可参考表中的注释列。
@ -42,7 +40,7 @@
* - GPIO3
- ADC1_CH2
- LP_GPIO3
- Strapping 管脚
-
* - GPIO4
- ADC1_CH3
@ -57,7 +55,7 @@
* - GPIO6
- ADC1_CH5
- LP_GPIO6
- Strapping 管脚
-
* - GPIO7
-
@ -92,12 +90,12 @@
* - GPIO13
-
-
-
- USB-JTAG
* - GPIO14
-
-
-
- USB-JTAG
* - GPIO15
-
@ -107,12 +105,12 @@
* - GPIO16
-
-
-
- SPI0/1
* - GPIO17
-
-
-
- SPI0/1
* - GPIO18
-
@ -142,27 +140,37 @@
* - GPIO23
-
-
- SPI0/1
-
* - GPIO24
-
-
- SPI0/1
-
* - GPIO25
-
-
- USB-JTAG
-
* - GPIO26
-
-
- USB-JTAG
-
* - GPIO27
-
-
- Strapping 管脚
* - GPIO28
-
-
- Strapping 管脚
.. note::
- Strapping 管脚：GPIO2、GPIO3、GPIO6 和 GPIO7 是 Strapping 管脚。更多信息请参考 `ESP32-C5 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。
- SPI0/1：GPIO18 ~ GPIO24 通常用于 SPI flash，不推荐用于其他用途。
- USB-JTAG：GPIO25 和 GPIO26 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。
- Strapping 管脚：GPIO2、GPIO7、GPIO27 和 GPIO28 是 Strapping 管脚。更多信息请参考 `ESP32-C5 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。
- SPI0/1：GPIO16 ~ GPIO22 通常用于 SPI flash，不推荐用于其他用途。
- USB-JTAG：GPIO13 和 GPIO14 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。
---