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fix(mcpwm): enable mcpwm group clock before hal init

pull/13090/head
morris 2024-01-10 14:26:04 +08:00
rodzic 1ad354bff3
commit 213a599d8b
25 zmienionych plików z 210 dodań i 200 usunięć
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11
components/driver/deprecated/mcpwm_legacy.c
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@ -153,6 +153,9 @@ static void mcpwm_module_enable(mcpwm_unit_t mcpwm_num)
mcpwm_ll_enable_bus_clock(mcpwm_num, true);
mcpwm_ll_reset_register(mcpwm_num);
}
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(mcpwm_num, true);
}
}
context[mcpwm_num].module_ref_count++;
mcpwm_critical_exit(mcpwm_num);
@ -166,6 +169,9 @@ static void mcpwm_module_disable(mcpwm_unit_t mcpwm_num)
MCPWM_RCC_ATOMIC() {
mcpwm_ll_enable_bus_clock(mcpwm_num, false);
}
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(mcpwm_num, false);
}
}
mcpwm_critical_exit(mcpwm_num);
}
@ -261,6 +267,7 @@ static inline uint32_t mcpwm_timer_get_resolution(mcpwm_unit_t mcpwm_num, mcpwm_
esp_err_t mcpwm_group_set_resolution(mcpwm_unit_t mcpwm_num, uint32_t resolution)
{
mcpwm_module_enable(mcpwm_num);
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
uint32_t clk_src_hz = 0;
esp_clk_tree_src_get_freq_hz(MCPWM_TIMER_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz);
@ -460,7 +467,6 @@ esp_err_t mcpwm_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpw
uint32_t timer_pre_scale = group_resolution / timer_resolution;
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(hal->dev, true);
mcpwm_ll_group_set_clock_source(hal->dev, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
mcpwm_ll_group_set_clock_prescale(hal->dev, group_pre_scale);
}
@ -858,7 +864,6 @@ esp_err_t mcpwm_capture_enable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_cha
uint32_t group_pre_scale = clk_src_hz / group_resolution;
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(hal->dev, true);
mcpwm_ll_group_set_clock_source(hal->dev, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
mcpwm_ll_group_set_clock_prescale(hal->dev, group_pre_scale);
}
@ -881,7 +886,7 @@ esp_err_t mcpwm_capture_enable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_cha
if (context[mcpwm_num].mcpwm_intr_handle == NULL) {
ret = esp_intr_alloc(mcpwm_periph_signals.groups[mcpwm_num].irq_id, MCPWM_INTR_FLAG,
mcpwm_default_isr_handler,
(void *) (context + mcpwm_num), &(context[mcpwm_num].mcpwm_intr_handle));
(void *)(context + mcpwm_num), &(context[mcpwm_num].mcpwm_intr_handle));
}
mcpwm_mutex_unlock(mcpwm_num);

4
components/driver/test_apps/.build-test-rules.yml
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@ -39,10 +39,6 @@ components/driver/test_apps/legacy_i2c_driver:
components/driver/test_apps/legacy_mcpwm_driver:
disable:
- if: SOC_MCPWM_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: test not pass, should be re-enable # TODO: IDF-8963
depends_filepatterns:
- components/driver/deprecated/**/*mcpwm*

10
components/driver/test_apps/legacy_mcpwm_driver/main/test_legacy_mcpwm.c
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@ -20,11 +20,19 @@
#if CONFIG_IDF_TARGET_ESP32
#define TEST_PWMA_GPIO (2)
#define TEST_PWMB_GPIO (4)
#define TEST_CAP_GPIO (21)
#define TEST_FAULT_GPIO (21)
#define TEST_SYNC_GPIO_0 (21)
#define TEST_SYNC_GPIO_1 (18)
#define TEST_SYNC_GPIO_2 (19)
#define TEST_CAP_GPIO (21)
#elif CONFIG_IDF_TARGET_ESP32P4
#define TEST_PWMA_GPIO (20)
#define TEST_PWMB_GPIO (21)
#define TEST_CAP_GPIO (22)
#define TEST_FAULT_GPIO (22)
#define TEST_SYNC_GPIO_0 (22)
#define TEST_SYNC_GPIO_1 (32)
#define TEST_SYNC_GPIO_2 (33)
#else
#define TEST_PWMA_GPIO (1)
#define TEST_PWMB_GPIO (2)

3
components/driver/test_apps/legacy_mcpwm_driver/pytest_legacy_mcpwm.py
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@ -1,4 +1,4 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
@ -9,6 +9,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize(
'config',

15
components/esp_driver_mcpwm/src/mcpwm_com.c
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@ -62,6 +62,12 @@ mcpwm_group_t *mcpwm_acquire_group_handle(int group_id)
mcpwm_ll_enable_bus_clock(group_id, true);
mcpwm_ll_reset_register(group_id);
}
// enable function clock before initialize HAL context
// MCPWM registers are in the core clock domain, there's a bridge between APB and the Core clock domain
// if the core clock is not enabled, then even the APB clock is enabled, the MCPWM registers are still not accessible
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(group_id, true);
}
// initialize HAL context
mcpwm_hal_init_config_t hal_config = {
.group_id = group_id
@ -71,11 +77,6 @@ mcpwm_group_t *mcpwm_acquire_group_handle(int group_id)
// disable all interrupts and clear pending status
mcpwm_ll_intr_enable(hal->dev, UINT32_MAX, false);
mcpwm_ll_intr_clear_status(hal->dev, UINT32_MAX);
// enable function clock
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(group->hal.dev, true);
}
}
} else { // group already install
group = s_platform.groups[group_id];
@ -101,9 +102,9 @@ void mcpwm_release_group_handle(mcpwm_group_t *group)
s_platform.group_ref_counts[group_id]--;
if (s_platform.group_ref_counts[group_id] == 0) {
do_deinitialize = true;
s_platform.groups[group_id] = NULL; // deregister from platfrom
s_platform.groups[group_id] = NULL; // deregister from platform
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_enable_clock(group->hal.dev, false);
mcpwm_ll_group_enable_clock(group_id, false);
}
// hal layer deinitialize
mcpwm_hal_deinit(&group->hal);

4
components/esp_driver_mcpwm/test_apps/.build-test-rules.yml
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@ -3,9 +3,5 @@
components/esp_driver_mcpwm/test_apps/mcpwm:
disable:
- if: SOC_MCPWM_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: test not pass, should be re-enable # TODO: IDF-8963
depends_components:
- esp_driver_mcpwm

4
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_cap.c
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@ -35,7 +35,7 @@ TEST_CASE("mcpwm_capture_install_uninstall", "[mcpwm]")
printf("install mcpwm capture channels\r\n");
mcpwm_capture_channel_config_t cap_chan_config = {
.gpio_num = 0,
.gpio_num = TEST_CAP_GPIO,
.prescale = 2,
.flags.pos_edge = true,
.flags.pull_up = true,
@ -80,7 +80,7 @@ TEST_CASE("mcpwm_capture_ext_gpio", "[mcpwm]")
};
TEST_ESP_OK(mcpwm_new_capture_timer(&cap_timer_config, &cap_timer));
const int cap_gpio = 0;
const int cap_gpio = TEST_CAP_GPIO;
// put the GPIO into a preset state
gpio_set_level(cap_gpio, 0);

7
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_common.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -7,6 +7,7 @@
#include "esp_private/mcpwm.h"
#include "test_mcpwm_utils.h"
#include "driver/mcpwm_prelude.h"
#include "test_mcpwm_utils.h"
TEST_CASE("mcpwm_set_interrupt_priority", "[mcpwm]")
{
@ -69,7 +70,7 @@ TEST_CASE("mcpwm_set_interrupt_priority", "[mcpwm]")
TEST_ESP_ERR(ESP_ERR_INVALID_ARG, mcpwm_comparator_register_event_callbacks(comparator2, &comparator_cbs, NULL));
printf("install gpio fault\r\n");
const int fault_gpio = 0;
const int fault_gpio = TEST_FAULT_GPIO;
mcpwm_fault_handle_t fault = NULL;
mcpwm_gpio_fault_config_t gpio_fault_config = {
.group_id = 0,
@ -145,7 +146,7 @@ TEST_CASE("mcpwm_group_set_prescale_dynamically", "[mcpwm]")
TEST_ESP_OK(mcpwm_new_operator(&operator_config, &oper));
mcpwm_generator_config_t generator_config = {
.gen_gpio_num = 0,
.gen_gpio_num = TEST_PWMA_GPIO,
};
mcpwm_gen_handle_t generator = NULL;
TEST_ESP_OK(mcpwm_new_generator(oper, &generator_config, &generator));

7
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_fault.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,12 +9,13 @@
#include "driver/mcpwm_fault.h"
#include "driver/mcpwm_oper.h"
#include "driver/gpio.h"
#include "test_mcpwm_utils.h"
TEST_CASE("mcpwm_fault_install_uninstall", "[mcpwm]")
{
printf("install and uninstall gpio faults\r\n");
mcpwm_gpio_fault_config_t gpio_fault_config = {
.gpio_num = 0,
.gpio_num = TEST_FAULT_GPIO,
};
int total_gpio_faults = SOC_MCPWM_GPIO_FAULTS_PER_GROUP * SOC_MCPWM_GROUPS;
mcpwm_fault_handle_t gpio_faults[total_gpio_faults];
@ -58,7 +59,7 @@ static bool IRAM_ATTR test_fault_exit_callback(mcpwm_fault_handle_t detector, co
TEST_CASE("mcpwm_gpio_fault_event_callbacks", "[mcpwm]")
{
printf("create gpio fault\r\n");
const int fault_gpio = 0;
const int fault_gpio = TEST_FAULT_GPIO;
mcpwm_fault_handle_t fault = NULL;
mcpwm_gpio_fault_config_t gpio_fault_config = {
.group_id = 0,

57
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_gen.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -14,6 +14,7 @@
#include "driver/mcpwm_fault.h"
#include "driver/mcpwm_sync.h"
#include "driver/gpio.h"
#include "test_mcpwm_utils.h"
TEST_CASE("mcpwm_generator_install_uninstall", "[mcpwm]")
{
@ -27,7 +28,7 @@ TEST_CASE("mcpwm_generator_install_uninstall", "[mcpwm]")
printf("create MCPWM generators from that operator\r\n");
mcpwm_gen_handle_t gens[SOC_MCPWM_GENERATORS_PER_OPERATOR];
mcpwm_generator_config_t gen_config = {
.gen_gpio_num = 0,
.gen_gpio_num = TEST_PWMA_GPIO,
};
for (int i = 0; i < SOC_MCPWM_GENERATORS_PER_OPERATOR; i++) {
TEST_ESP_OK(mcpwm_new_generator(oper, &gen_config, &gens[i]));
@ -54,7 +55,7 @@ TEST_CASE("mcpwm_generator_force_level_hold_on", "[mcpwm]")
TEST_ESP_OK(mcpwm_new_operator(&operator_config, &oper));
mcpwm_gen_handle_t generator = NULL;
const int gen_gpio = 0;
const int gen_gpio = TEST_PWMA_GPIO;
mcpwm_generator_config_t generator_config = {
.gen_gpio_num = gen_gpio,
.flags.io_loop_back = true, // loop back for test
@ -92,8 +93,8 @@ TEST_CASE("mcpwm_force_level_and_dead_time", "[mcpwm]")
mcpwm_gen_handle_t gen_a = NULL;
mcpwm_gen_handle_t gen_b = NULL;
const int gen_a_gpio = 0;
const int gen_b_gpio = 2;
const int gen_a_gpio = TEST_PWMA_GPIO;
const int gen_b_gpio = TEST_PWMB_GPIO;
mcpwm_generator_config_t generator_config = {
.gen_gpio_num = gen_a_gpio,
.flags.io_loop_back = true, // loop back for test
@ -154,7 +155,7 @@ TEST_CASE("mcpwm_generator_force_level_recovery", "[mcpwm]")
printf("create generator\r\n");
mcpwm_gen_handle_t generator = NULL;
const int gen_gpio = 0;
const int gen_gpio = TEST_PWMA_GPIO;
mcpwm_generator_config_t generator_config = {
.gen_gpio_num = gen_gpio,
.flags.io_loop_back = true, // loop back for test
@ -198,7 +199,7 @@ TEST_CASE("mcpwm_generator_force_level_recovery", "[mcpwm]")
TEST_CASE("mcpwm_generator_action_on_timer_event", "[mcpwm]")
{
const int generator_gpio = 0;
const int generator_gpio = TEST_PWMA_GPIO;
printf("create timer and operator\r\n");
mcpwm_timer_config_t timer_config = {
.group_id = 0,
@ -394,32 +395,32 @@ TEST_CASE("mcpwm_generator_action_on_compare_event", "[mcpwm]")
printf("[Asymmetric, SingleEdge, ActiveHigh]\r\n");
// PWMA: high = [1->350], low = [351->499,0]
// PWMB: high = [1->200], low = [201->499,0]
mcpwm_gen_action_test_template(1000000, 500, MCPWM_TIMER_COUNT_MODE_UP, 350, 200, 0, 2, single_edge_active_high);
mcpwm_gen_action_test_template(1000000, 500, MCPWM_TIMER_COUNT_MODE_UP, 350, 200, TEST_PWMA_GPIO, TEST_PWMB_GPIO, single_edge_active_high);
printf("[Asymmetric, SingleEdge, ActiveLow]\r\n");
// PWMA: low = [0->300], high = [301->499]
// PWMB: low = [0->150], high = [151->499]
mcpwm_gen_action_test_template(1000000, 500, MCPWM_TIMER_COUNT_MODE_UP, 300, 150, 0, 2, single_edge_active_low);
mcpwm_gen_action_test_template(1000000, 500, MCPWM_TIMER_COUNT_MODE_UP, 300, 150, TEST_PWMA_GPIO, TEST_PWMB_GPIO, single_edge_active_low);
printf("[Asymmetric, PulsePlacement]\r\n");
// PWMA: low = [0->200], high = [201->400], low = [401->599]
// PWMB: high = [0->599], low = [0->599]
mcpwm_gen_action_test_template(1000000, 600, MCPWM_TIMER_COUNT_MODE_UP, 200, 400, 0, 2, pulse_placement);
mcpwm_gen_action_test_template(1000000, 600, MCPWM_TIMER_COUNT_MODE_UP, 200, 400, TEST_PWMA_GPIO, TEST_PWMB_GPIO, pulse_placement);
printf("[Asymmetric, DualEdge, ActiveLow]\r\n");
// PWMA: low = [0->250], high = [251->599, 600->450], low = [451->1]
// PWMB: low = [0->599], low = [600->1]
mcpwm_gen_action_test_template(1000000, 1200, MCPWM_TIMER_COUNT_MODE_UP_DOWN, 250, 450, 0, 2, dual_edge_active_low_asym);
mcpwm_gen_action_test_template(1000000, 1200, MCPWM_TIMER_COUNT_MODE_UP_DOWN, 250, 450, TEST_PWMA_GPIO, TEST_PWMB_GPIO, dual_edge_active_low_asym);
printf("[Symmetric, DualEdge, ActiveLow]\r\n");
// PWMA: low = [0->400], high = [401->599, 600->400], low = [399->1]
// PWMB: low = [0->500], high = [501->599, 600->500], low = [499->1]
mcpwm_gen_action_test_template(1000000, 1200, MCPWM_TIMER_COUNT_MODE_UP_DOWN, 400, 500, 0, 2, dual_edge_active_low_sym);
mcpwm_gen_action_test_template(1000000, 1200, MCPWM_TIMER_COUNT_MODE_UP_DOWN, 400, 500, TEST_PWMA_GPIO, TEST_PWMB_GPIO, dual_edge_active_low_sym);
printf("[Symmetric, DualEdge, Complementary]\r\n");
// PWMA: low = [0->350], high = [351->599, 600->350], low = [349->1]
// PWMB: low = [0->400], high = [401->599, 600->400], low = [399->1]
mcpwm_gen_action_test_template(1000000, 1200, MCPWM_TIMER_COUNT_MODE_UP_DOWN, 350, 400, 0, 2, dual_edge_complementary);
mcpwm_gen_action_test_template(1000000, 1200, MCPWM_TIMER_COUNT_MODE_UP_DOWN, 350, 400, TEST_PWMA_GPIO, TEST_PWMB_GPIO, dual_edge_complementary);
}
typedef void (*set_dead_time_cb_t)(mcpwm_gen_handle_t gena, mcpwm_gen_handle_t genb);
@ -663,33 +664,33 @@ static void invalid_reda_redb_set_dead_time(mcpwm_gen_handle_t gena, mcpwm_gen_h
TEST_CASE("mcpwm_generator_deadtime_classical_configuration", "[mcpwm]")
{
printf("Active High Complementary\r\n");
mcpwm_deadtime_test_template(1000000, 600, 200, 400, 0, 2, ahc_set_generator_actions, ahc_set_dead_time);
mcpwm_deadtime_test_template(1000000, 600, 200, 400, TEST_PWMA_GPIO, TEST_PWMB_GPIO, ahc_set_generator_actions, ahc_set_dead_time);
printf("Active Low Complementary\r\n");
mcpwm_deadtime_test_template(1000000, 600, 200, 400, 0, 2, alc_set_generator_actions, alc_set_dead_time);
mcpwm_deadtime_test_template(1000000, 600, 200, 400, TEST_PWMA_GPIO, TEST_PWMB_GPIO, alc_set_generator_actions, alc_set_dead_time);
printf("Active High\r\n");
mcpwm_deadtime_test_template(1000000, 600, 200, 400, 0, 2, ah_set_generator_actions, ah_set_dead_time);
mcpwm_deadtime_test_template(1000000, 600, 200, 400, TEST_PWMA_GPIO, TEST_PWMB_GPIO, ah_set_generator_actions, ah_set_dead_time);
printf("Active Low\r\n");
mcpwm_deadtime_test_template(1000000, 600, 200, 400, 0, 2, al_set_generator_actions, al_set_dead_time);
mcpwm_deadtime_test_template(1000000, 600, 200, 400, TEST_PWMA_GPIO, TEST_PWMB_GPIO, al_set_generator_actions, al_set_dead_time);
printf("RED on A, Bypass B\r\n");
mcpwm_deadtime_test_template(1000000, 500, 350, 350, 0, 2, reda_only_set_generator_actions, reda_only_set_dead_time);
mcpwm_deadtime_test_template(1000000, 500, 350, 350, TEST_PWMA_GPIO, TEST_PWMB_GPIO, reda_only_set_generator_actions, reda_only_set_dead_time);
printf("Bypass A, FED on B\r\n");
mcpwm_deadtime_test_template(1000000, 500, 350, 350, 0, 2, fedb_only_set_generator_actions, fedb_only_set_dead_time);
mcpwm_deadtime_test_template(1000000, 500, 350, 350, TEST_PWMA_GPIO, TEST_PWMB_GPIO, fedb_only_set_generator_actions, fedb_only_set_dead_time);
printf("Bypass A, RED + FED on B\r\n");
mcpwm_deadtime_test_template(1000000, 500, 350, 350, 0, 2, redfedb_only_set_generator_actions, redfedb_only_set_dead_time);
mcpwm_deadtime_test_template(1000000, 500, 350, 350, TEST_PWMA_GPIO, TEST_PWMB_GPIO, redfedb_only_set_generator_actions, redfedb_only_set_dead_time);
printf("Can't apply one delay module to multiple generators\r\n");
mcpwm_deadtime_test_template(1000000, 500, 350, 350, 0, 2, redfedb_only_set_generator_actions, invalid_reda_redb_set_dead_time);
mcpwm_deadtime_test_template(1000000, 500, 350, 350, TEST_PWMA_GPIO, TEST_PWMB_GPIO, redfedb_only_set_generator_actions, invalid_reda_redb_set_dead_time);
}
TEST_CASE("mcpwm_duty_empty_full", "[mcpwm]")
{
const int gen_gpio_num = 0;
const int gen_gpio_num = TEST_PWMA_GPIO;
mcpwm_timer_handle_t timer;
mcpwm_oper_handle_t oper;
mcpwm_cmpr_handle_t comparator;
@ -766,8 +767,8 @@ TEST_CASE("mcpwm_duty_empty_full", "[mcpwm]")
TEST_CASE("mcpwm_generator_action_on_fault_trigger_event", "[mcpwm]")
{
const int generator_gpio = 0;
const int fault_gpio_num[3] = {2, 4, 5};
const int generator_gpio = TEST_PWMA_GPIO;
const int fault_gpio_num[3] = {TEST_FAULT_GPIO0, TEST_FAULT_GPIO1, TEST_FAULT_GPIO2};
printf("create timer and operator\r\n");
mcpwm_timer_config_t timer_config = {
.group_id = 0,
@ -842,7 +843,7 @@ TEST_CASE("mcpwm_generator_action_on_fault_trigger_event", "[mcpwm]")
TEST_CASE("mcpwm_generator_action_on_soft_sync_trigger_event", "[mcpwm]")
{
const int generator_gpio = 0;
const int generator_gpio = TEST_PWMA_GPIO;
printf("create timer and operator\r\n");
mcpwm_timer_config_t timer_config = {
.group_id = 0,
@ -908,7 +909,7 @@ TEST_CASE("mcpwm_generator_action_on_soft_sync_trigger_event", "[mcpwm]")
TEST_CASE("mcpwm_generator_action_on_timer_sync_trigger_event", "[mcpwm]")
{
const int generator_gpio = 0;
const int generator_gpio = TEST_PWMA_GPIO;
printf("create timer and operator\r\n");
mcpwm_timer_config_t timer_config = {
.group_id = 0,
@ -973,7 +974,7 @@ TEST_CASE("mcpwm_generator_action_on_timer_sync_trigger_event", "[mcpwm]")
TEST_CASE("mcpwm_generator_action_on_gpio_sync_trigger_event", "[mcpwm]")
{
const int generator_gpio = 0;
const int generator_gpio = TEST_PWMA_GPIO;
printf("create timer and operator\r\n");
mcpwm_timer_config_t timer_config = {
.group_id = 0,
@ -998,7 +999,7 @@ TEST_CASE("mcpwm_generator_action_on_gpio_sync_trigger_event", "[mcpwm]")
mcpwm_sync_handle_t gpio_sync = NULL;
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0,
.gpio_num = 2,
.gpio_num = TEST_SYNC_GPIO,
.flags.io_loop_back = true, // so that we can use gpio driver to simulate the sync signal
.flags.pull_down = true, // internally pull down
};

4
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_iram.c
Wyświetl plik

@ -45,7 +45,7 @@ TEST_CASE("mcpwm_capture_iram_safe", "[mcpwm]")
};
TEST_ESP_OK(mcpwm_new_capture_timer(&cap_timer_config, &cap_timer));
const int cap_gpio = 0;
const int cap_gpio = TEST_CAP_GPIO;
// put the GPIO into a preset state
gpio_set_level(cap_gpio, 0);
@ -140,7 +140,7 @@ TEST_CASE("mcpwm_comparator_iram_safe", "[mcpwm]")
printf("install MCPWM generator\r\n");
mcpwm_generator_config_t gen_config = {
.gen_gpio_num = 0,
.gen_gpio_num = TEST_PWMA_GPIO,
};
TEST_ESP_OK(mcpwm_new_generator(oper, &gen_config, &gen));

17
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_oper.c
Wyświetl plik

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -12,6 +12,7 @@
#include "driver/mcpwm_gen.h"
#include "driver/mcpwm_fault.h"
#include "driver/gpio.h"
#include "test_mcpwm_utils.h"
TEST_CASE("mcpwm_operator_install_uninstall", "[mcpwm]")
{
@ -71,7 +72,7 @@ TEST_CASE("mcpwm_operator_carrier", "[mcpwm]")
TEST_ESP_OK(mcpwm_new_operator(&operator_config, &oper));
mcpwm_generator_config_t generator_config = {
.gen_gpio_num = 0,
.gen_gpio_num = TEST_PWMA_GPIO,
};
mcpwm_gen_handle_t generator = NULL;
TEST_ESP_OK(mcpwm_new_generator(oper, &generator_config, &generator));
@ -155,8 +156,8 @@ TEST_CASE("mcpwm_operator_brake_on_gpio_fault", "[mcpwm]")
};
mcpwm_fault_handle_t gpio_cbc_fault = NULL;
mcpwm_fault_handle_t gpio_ost_fault = NULL;
const int cbc_fault_gpio = 4;
const int ost_fault_gpio = 5;
const int cbc_fault_gpio = TEST_FAULT_GPIO1;
const int ost_fault_gpio = TEST_FAULT_GPIO2;
gpio_fault_config.gpio_num = cbc_fault_gpio;
TEST_ESP_OK(mcpwm_new_gpio_fault(&gpio_fault_config, &gpio_cbc_fault));
@ -179,8 +180,8 @@ TEST_CASE("mcpwm_operator_brake_on_gpio_fault", "[mcpwm]")
TEST_ESP_OK(mcpwm_operator_set_brake_on_fault(oper, &brake_config));
printf("create generators\r\n");
const int gen_a_gpio = 0;
const int gen_b_gpio = 2;
const int gen_a_gpio = TEST_PWMA_GPIO;
const int gen_b_gpio = TEST_PWMB_GPIO;
mcpwm_gen_handle_t gen_a = NULL;
mcpwm_gen_handle_t gen_b = NULL;
mcpwm_generator_config_t generator_config = {
@ -285,8 +286,8 @@ TEST_CASE("mcpwm_operator_brake_on_soft_fault", "[mcpwm]")
TEST_ESP_OK(mcpwm_operator_set_brake_on_fault(oper, &brake_config));
printf("create generators\r\n");
const int gen_a_gpio = 0;
const int gen_b_gpio = 2;
const int gen_a_gpio = TEST_PWMA_GPIO;
const int gen_b_gpio = TEST_PWMB_GPIO;
mcpwm_gen_handle_t gen_a = NULL;
mcpwm_gen_handle_t gen_b = NULL;
mcpwm_generator_config_t generator_config = {

4
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_sync.c
Wyświetl plik

@ -42,7 +42,7 @@ TEST_CASE("mcpwm_sync_source_install_uninstall", "[mcpwm]")
printf("install gpio sync_src\r\n");
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.gpio_num = 0,
.gpio_num = TEST_SYNC_GPIO,
};
const int total_gpio_sync_srcs = SOC_MCPWM_GROUPS * SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP;
mcpwm_sync_handle_t gpio_sync_srcs[total_gpio_sync_srcs];
@ -127,7 +127,7 @@ TEST_CASE("mcpwm_gpio_sync_timer_phase_lock", "[mcpwm]")
.direction = MCPWM_TIMER_DIRECTION_UP,
};
mcpwm_sync_handle_t gpio_sync_src;
const int gpio_num = 0;
const int gpio_num = TEST_SYNC_GPIO;
mcpwm_gpio_sync_src_config_t gpio_sync_config = {
.group_id = 0,
.gpio_num = gpio_num,

33
components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_utils.h
Wyświetl plik

@ -1,12 +1,39 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "sdkconfig.h"
#include "esp_attr.h"
#include "driver/mcpwm_types.h"
#ifdef __cplusplus
extern "C" {
#endif
#if CONFIG_IDF_TARGET_ESP32P4
#define TEST_PWMA_GPIO 0
#define TEST_CAP_GPIO 0
#define TEST_FAULT_GPIO 0
#define TEST_PWMB_GPIO 20
#define TEST_FAULT_GPIO0 20
#define TEST_FAULT_GPIO1 21
#define TEST_FAULT_GPIO2 22
#define TEST_SYNC_GPIO 23
#else
#define TEST_PWMA_GPIO 0
#define TEST_CAP_GPIO 0
#define TEST_FAULT_GPIO 0
#define TEST_PWMB_GPIO 2
#define TEST_FAULT_GPIO0 2
#define TEST_FAULT_GPIO1 4
#define TEST_FAULT_GPIO2 5
#define TEST_SYNC_GPIO 12
#endif
#if CONFIG_MCPWM_ISR_IRAM_SAFE
#define TEST_MCPWM_CALLBACK_ATTR IRAM_ATTR
#else
@ -15,3 +42,7 @@
void check_mcpwm_timer_phase(mcpwm_timer_handle_t *timers, size_t num_timers,
uint32_t expected_count, mcpwm_timer_direction_t expected_direction);
#ifdef __cplusplus
}
#endif

1
components/esp_driver_mcpwm/test_apps/mcpwm/pytest_mcpwm.py
Wyświetl plik

@ -9,6 +9,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize(
'config',

38
components/hal/esp32/include/hal/mcpwm_ll.h
Wyświetl plik

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -111,6 +111,20 @@ static inline void mcpwm_ll_reset_register(int group_id)
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mcpwm_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_reset_register(__VA_ARGS__)
/**
* @brief Enable MCPWM module clock
*
* @note Not support to enable/disable the peripheral clock
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
}
/**
* @brief Set the clock source for MCPWM
*
@ -123,20 +137,6 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, mcpwm_tim
(void)clk_src;
}
/**
* @brief Enable MCPWM module clock
*
* @note Not support to enable/disable the peripheral clock
*
* @param mcpwm Peripheral instance address
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(mcpwm_dev_t *mcpwm, bool en)
{
(void)mcpwm; // only one MCPWM instance
(void)en;
}
/**
* @brief Set the MCPWM group clock prescale
*
@ -785,7 +785,7 @@ static inline void mcpwm_ll_generator_reset_actions(mcpwm_dev_t *mcpwm, int oper
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
{
// empty: 0, full: 1
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utez, utep
@ -808,7 +808,7 @@ static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcp
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int cmp_id, int action)
mcpwm_timer_direction_t direction, int cmp_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utea, uteb
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 4));
@ -830,7 +830,7 @@ static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int trig_id, int action)
mcpwm_timer_direction_t direction, int trig_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // ut0, ut1
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 8));
@ -852,7 +852,7 @@ static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_brake_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
{
// the following bit operation is highly depend on the register bit layout.
// the priority comes: generator ID > brake mode > direction

34
components/hal/esp32c6/include/hal/mcpwm_ll.h
Wyświetl plik

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -100,6 +100,18 @@ static inline void mcpwm_ll_reset_register(int group_id)
PCR.pwm_conf.pwm_rst_en = 0;
}
/**
* @brief Enable MCPWM module clock
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
{
(void)group_id;
PCR.pwm_clk_conf.pwm_clkm_en = en;
}
/**
* @brief Set the clock source for MCPWM
*
@ -122,18 +134,6 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, soc_modul
}
}
/**
* @brief Enable MCPWM module clock
*
* @param mcpwm Peripheral instance address
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(mcpwm_dev_t *mcpwm, bool en)
{
(void)mcpwm; // only one MCPWM instance
PCR.pwm_clk_conf.pwm_clkm_en = en;
}
/**
* @brief Set the MCPWM group clock prescale
*
@ -795,7 +795,7 @@ static inline void mcpwm_ll_generator_reset_actions(mcpwm_dev_t *mcpwm, int oper
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
{
// empty: 0, full: 1
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utez, utep
@ -818,7 +818,7 @@ static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcp
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int cmp_id, int action)
mcpwm_timer_direction_t direction, int cmp_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utea, uteb
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 4));
@ -840,7 +840,7 @@ static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int trig_id, int action)
mcpwm_timer_direction_t direction, int trig_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // ut0, ut1
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 8));
@ -862,7 +862,7 @@ static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_brake_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
{
// the following bit operation is highly depend on the register bit layout.
// the priority comes: generator ID > brake mode > direction

34
components/hal/esp32h2/include/hal/mcpwm_ll.h
Wyświetl plik

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -98,6 +98,18 @@ static inline void mcpwm_ll_reset_register(int group_id)
PCR.pwm_conf.pwm_rst_en = 0;
}
/**
* @brief Enable MCPWM module clock
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
{
(void)group_id;
PCR.pwm_clk_conf.pwm_clkm_en = en;
}
/**
* @brief Set the clock source for MCPWM
*
@ -120,18 +132,6 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, soc_modul
}
}
/**
* @brief Enable MCPWM module clock
*
* @param mcpwm Peripheral instance address
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(mcpwm_dev_t *mcpwm, bool en)
{
(void)mcpwm; // only one MCPWM instance
PCR.pwm_clk_conf.pwm_clkm_en = en;
}
/**
* @brief Set the MCPWM group clock prescale
*
@ -793,7 +793,7 @@ static inline void mcpwm_ll_generator_reset_actions(mcpwm_dev_t *mcpwm, int oper
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
{
// empty: 0, full: 1
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utez, utep
@ -816,7 +816,7 @@ static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcp
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int cmp_id, int action)
mcpwm_timer_direction_t direction, int cmp_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utea, uteb
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 4));
@ -838,7 +838,7 @@ static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int trig_id, int action)
mcpwm_timer_direction_t direction, int trig_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // ut0, ut1
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 8));
@ -860,7 +860,7 @@ static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_brake_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
{
// the following bit operation is highly depend on the register bit layout.
// the priority comes: generator ID > brake mode > direction

46
components/hal/esp32p4/include/hal/mcpwm_ll.h
Wyświetl plik

@ -132,6 +132,25 @@ static inline void mcpwm_ll_reset_register(int group_id)
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mcpwm_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_reset_register(__VA_ARGS__)
/**
* @brief Enable MCPWM module clock
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
{
if (group_id == 0) {
HP_SYS_CLKRST.peri_clk_ctrl20.reg_mcpwm0_clk_en = en;
} else {
HP_SYS_CLKRST.peri_clk_ctrl20.reg_mcpwm1_clk_en = en;
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mcpwm_ll_group_enable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_group_enable_clock(__VA_ARGS__)
/**
* @brief Set the clock source for MCPWM
*
@ -166,25 +185,6 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, soc_modul
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mcpwm_ll_group_set_clock_source(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_group_set_clock_source(__VA_ARGS__)
/**
* @brief Enable MCPWM module clock
*
* @param mcpwm Peripheral instance address
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(mcpwm_dev_t *mcpwm, bool en)
{
if (mcpwm == &MCPWM0) {
HP_SYS_CLKRST.peri_clk_ctrl20.reg_mcpwm0_clk_en = en;
} else if (mcpwm == &MCPWM1) {
HP_SYS_CLKRST.peri_clk_ctrl20.reg_mcpwm1_clk_en = en;
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mcpwm_ll_group_enable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_group_enable_clock(__VA_ARGS__)
/**
* @brief Set the MCPWM group clock prescale
*
@ -867,7 +867,7 @@ static inline void mcpwm_ll_generator_reset_actions(mcpwm_dev_t *mcpwm, int oper
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
{
// empty: 0, full: 1
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utez, utep
@ -890,7 +890,7 @@ static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcp
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int cmp_id, int action)
mcpwm_timer_direction_t direction, int cmp_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utea, uteb
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 4));
@ -912,7 +912,7 @@ static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int trig_id, int action)
mcpwm_timer_direction_t direction, int trig_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // ut0, ut1
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 8));
@ -934,7 +934,7 @@ static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_brake_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
{
// the following bit operation is highly depend on the register bit layout.
// the priority comes: generator ID > brake mode > direction

38
components/hal/esp32s3/include/hal/mcpwm_ll.h
Wyświetl plik

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -107,6 +107,20 @@ static inline void mcpwm_ll_reset_register(int group_id)
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mcpwm_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; mcpwm_ll_reset_register(__VA_ARGS__)
/**
* @brief Enable MCPWM module clock
*
* @note Not support to enable/disable the peripheral clock
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
}
/**
* @brief Set the clock source for MCPWM
*
@ -119,20 +133,6 @@ static inline void mcpwm_ll_group_set_clock_source(mcpwm_dev_t *mcpwm, mcpwm_tim
(void)clk_src;
}
/**
* @brief Enable MCPWM module clock
*
* @note Not support to enable/disable the peripheral clock
*
* @param mcpwm Peripheral instance address
* @param en true to enable, false to disable
*/
static inline void mcpwm_ll_group_enable_clock(mcpwm_dev_t *mcpwm, bool en)
{
(void)mcpwm; // only one MCPWM instance
(void)en;
}
/**
* @brief Set the MCPWM group clock prescale
*
@ -793,7 +793,7 @@ static inline void mcpwm_ll_generator_reset_actions(mcpwm_dev_t *mcpwm, int oper
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
mcpwm_timer_direction_t direction, mcpwm_timer_event_t event, mcpwm_generator_action_t action)
{
// empty: 0, full: 1
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utez, utep
@ -816,7 +816,7 @@ static inline void mcpwm_ll_generator_set_action_on_timer_event(mcpwm_dev_t *mcp
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int cmp_id, int action)
mcpwm_timer_direction_t direction, int cmp_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // utea, uteb
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (cmp_id * 2 + 4));
@ -838,7 +838,7 @@ static inline void mcpwm_ll_generator_set_action_on_compare_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, int trig_id, int action)
mcpwm_timer_direction_t direction, int trig_id, int action)
{
if (direction == MCPWM_TIMER_DIRECTION_UP) { // ut0, ut1
mcpwm->operators[operator_id].generator[generator_id].val &= ~(0x03 << (trig_id * 2 + 8));
@ -860,7 +860,7 @@ static inline void mcpwm_ll_generator_set_action_on_trigger_event(mcpwm_dev_t *m
* @param action Action to set
*/
static inline void mcpwm_ll_generator_set_action_on_brake_event(mcpwm_dev_t *mcpwm, int operator_id, int generator_id,
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
mcpwm_timer_direction_t direction, mcpwm_operator_brake_mode_t brake_mode, int action)
{
// the following bit operation is highly depend on the register bit layout.
// the priority comes: generator ID > brake mode > direction

24
components/soc/esp32p4/include/soc/clk_tree_defs.h
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@ -273,11 +273,7 @@ typedef enum {
/**
* @brief Array initializer for all supported clock sources of MCPWM Timer
*/
#if SOC_CLK_TREE_SUPPORTED
#define SOC_MCPWM_TIMER_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL}
#else
#define SOC_MCPWM_TIMER_CLKS {SOC_MOD_CLK_XTAL}
#endif
/**
* @brief Type of MCPWM timer clock source
@ -285,21 +281,13 @@ typedef enum {
typedef enum {
MCPWM_TIMER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */
MCPWM_TIMER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
#if SOC_CLK_TREE_SUPPORTED
MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default choice */
#else
MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */
#endif // SOC_CLK_TREE_SUPPORTED
} soc_periph_mcpwm_timer_clk_src_t;
/**
* @brief Array initializer for all supported clock sources of MCPWM Capture Timer
*/
#if SOC_CLK_TREE_SUPPORTED
#define SOC_MCPWM_CAPTURE_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL}
#else
#define SOC_MCPWM_CAPTURE_CLKS {SOC_MOD_CLK_XTAL}
#endif
/**
* @brief Type of MCPWM capture clock source
@ -307,21 +295,13 @@ typedef enum {
typedef enum {
MCPWM_CAPTURE_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */
MCPWM_CAPTURE_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
#if SOC_CLK_TREE_SUPPORTED
MCPWM_CAPTURE_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default choice */
#else
MCPWM_CAPTURE_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */
#endif // SOC_CLK_TREE_SUPPORTED
} soc_periph_mcpwm_capture_clk_src_t;
/**
* @brief Array initializer for all supported clock sources of MCPWM Carrier
*/
#if SOC_CLK_TREE_SUPPORTED
#define SOC_MCPWM_CARRIER_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL}
#else
#define SOC_MCPWM_CARRIER_CLKS {SOC_MOD_CLK_XTAL}
#endif
/**
* @brief Type of MCPWM carrier clock source
@ -329,11 +309,7 @@ typedef enum {
typedef enum {
MCPWM_CARRIER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */
MCPWM_CARRIER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
#if SOC_CLK_TREE_SUPPORTED
MCPWM_CARRIER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default choice */
#else
MCPWM_CARRIER_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default choice */
#endif // SOC_CLK_TREE_SUPPORTED
} soc_periph_mcpwm_carrier_clk_src_t;
///////////////////////////////////////////////// I2S //////////////////////////////////////////////////////////////

12
examples/peripherals/.build-test-rules.yml
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@ -228,10 +228,6 @@ examples/peripherals/mcpwm/mcpwm_capture_hc_sr04:
- if: SOC_MCPWM_SUPPORTED != 1
depends_components:
- esp_driver_mcpwm
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: test not pass, should be re-enable # TODO: IDF-8963
examples/peripherals/mcpwm/mcpwm_foc_svpwm_open_loop:
disable:
@ -248,20 +244,12 @@ examples/peripherals/mcpwm/mcpwm_servo_control:
- if: SOC_MCPWM_SUPPORTED != 1
depends_components:
- esp_driver_mcpwm
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: test not pass, should be re-enable # TODO: IDF-8963
examples/peripherals/mcpwm/mcpwm_sync:
disable:
- if: SOC_MCPWM_SUPPORTED != 1
depends_components:
- esp_driver_mcpwm
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: test not pass, should be re-enable # TODO: IDF-8963
examples/peripherals/parlio:
disable:

1
examples/peripherals/mcpwm/mcpwm_capture_hc_sr04/pytest_hc_sr04.py
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@ -9,6 +9,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
def test_hc_sr04_example(dut: Dut) -> None:
dut.expect_exact('example: Install capture timer')

1
examples/peripherals/mcpwm/mcpwm_servo_control/pytest_servo_mg996r.py
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@ -9,6 +9,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
def test_servo_mg996r_example(dut: Dut) -> None:
dut.expect_exact('example: Create timer and operator')

1
examples/peripherals/mcpwm/mcpwm_sync/pytest_mcpwm_sync.py
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@ -9,6 +9,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize('config', [
pytest.param('gpio', marks=[pytest.mark.esp32, pytest.mark.esp32s3]),