test(i2c_master): Add test for lp_i2c support in i2c master driver

components/esp_driver_i2c/test_apps/i2c_test_apps/main/CMakeLists.txt

@@ -21,6 +21,10 @@ if(CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR AND CONFIG_SOC_I2C_SUPPORT_SLAVE)
     list(APPEND srcs "test_i2c_10bit.c")
 endif()
 
+if(CONFIG_SOC_LP_I2C_SUPPORTED)
+    list(APPEND srcs "test_lp_i2c.c")
+endif()
+
 # Only build this file with `CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP` and `CONFIG_IEEE802154_ENABLED` enabled
 # Enable `CONFIG_IEEE802154_ENABLED` is for modem domain really power down.
 # This reliable can be removed if the sleep retention got finished.

components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_board.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -25,6 +25,11 @@ extern "C" {
 #define I2C_MASTER_SDA_IO    2     /*!< gpio number for I2C master data  */
 #endif
 
+#if SOC_LP_I2C_SUPPORTED
+#define LP_I2C_SCL_IO   7
+#define LP_I2C_SDA_IO   6
+#endif
+
 #define ESP_SLAVE_ADDR 0x28         /*!< ESP_I2C slave address, you can set any 7bit value */
 #define TEST_I2C_PORT     0
 #define DATA_LENGTH     100

components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_i2c_common.c

@@ -55,7 +55,7 @@ TEST_CASE("I2C bus install-uninstall test", "[i2c]")
     };
     i2c_master_bus_handle_t i2c_mst_handle1;
 
-#if SOC_I2C_NUM > 1
+#if SOC_HP_I2C_NUM > 1
     i2c_master_bus_config_t i2c_mst_config_2 = {
         .clk_source = I2C_CLK_SRC_DEFAULT,
         .i2c_port = 1,
@@ -68,7 +68,7 @@ TEST_CASE("I2C bus install-uninstall test", "[i2c]")
     // Install master bus 0
     ESP_LOGI(TAG, "Initialize bus0");
     TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config_1, &i2c_mst_handle1));
-#if SOC_I2C_NUM > 1
+#if SOC_HP_I2C_NUM > 1
     // Install master bus 1
     ESP_LOGI(TAG, "Initialize bus1");
     TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config_2, &i2c_mst_handle2));
@@ -78,7 +78,7 @@ TEST_CASE("I2C bus install-uninstall test", "[i2c]")
     TEST_ESP_ERR(ESP_ERR_INVALID_STATE, i2c_new_master_bus(&i2c_mst_config_1, &i2c_mst_handle1));
     ESP_LOGI(TAG, "Delete bus0");
     TEST_ESP_OK(i2c_del_master_bus(i2c_mst_handle1));
-#if SOC_I2C_NUM > 1
+#if SOC_HP_I2C_NUM > 1
     ESP_LOGI(TAG, "Delete bus1");
     TEST_ESP_OK(i2c_del_master_bus(i2c_mst_handle2));
 #endif

components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_i2c_multi.c

@@ -613,7 +613,7 @@ static void slave_init_for_probe(void)
 
 TEST_CASE_MULTIPLE_DEVICES("I2C master probe slave test", "[i2c][test_env=generic_multi_device][timeout=150]", master_probe_slave, slave_init_for_probe);
 
-#if SOC_I2C_NUM > 1
+#if SOC_HP_I2C_NUM > 1
 // Now chips with multiple I2C controllers are up to 2, can test more ports when we have more I2C controllers.
 static void i2c_master_write_test_more_port(void)
 {

components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_lp_i2c.c

@@ -0,0 +1,154 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Unlicense OR CC0-1.0
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include "sdkconfig.h"
+#include "unity.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/queue.h"
+#include "esp_err.h"
+#include "soc/gpio_periph.h"
+#include "soc/clk_tree_defs.h"
+#include "soc/soc_caps.h"
+#include "hal/gpio_hal.h"
+#include "hal/uart_ll.h"
+#include "esp_private/periph_ctrl.h"
+#include "driver/gpio.h"
+#include "driver/i2c_master.h"
+#include "driver/i2c_slave.h"
+#include "esp_rom_gpio.h"
+#include "esp_log.h"
+#include "test_utils.h"
+#include "test_board.h"
+
+#define DATA_LENGTH 100
+
+static QueueHandle_t s_receive_queue;
+
+TEST_CASE("LP I2C initialize on i2c slave", "[i2c]")
+{
+    i2c_slave_config_t i2c_slv_config = {
+        .addr_bit_len = I2C_ADDR_BIT_LEN_7,
+        .clk_source = LP_I2C_SCLK_DEFAULT,
+        .i2c_port = LP_I2C_NUM_0,
+        .send_buf_depth = 256,
+        .scl_io_num = LP_I2C_SCL_IO,
+        .sda_io_num = LP_I2C_SDA_IO,
+        .slave_addr = 0x58,
+    };
+
+    i2c_slave_dev_handle_t slave_handle;
+    TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, i2c_new_slave_device(&i2c_slv_config, &slave_handle));
+}
+
+#if CONFIG_IDF_TARGET_ESP32C6
+
+TEST_CASE("LP I2C initialize with wrong IO", "[i2c]")
+{
+    i2c_master_bus_config_t i2c_mst_config = {
+        .lp_source_clk = LP_I2C_SCLK_DEFAULT,
+        .i2c_port = LP_I2C_NUM_0,
+        .scl_io_num = 5,
+        .sda_io_num = 6,
+        .flags.enable_internal_pullup = true,
+    };
+    i2c_master_bus_handle_t bus_handle;
+
+    TEST_ESP_ERR(ESP_ERR_INVALID_ARG, i2c_new_master_bus(&i2c_mst_config, &bus_handle));
+}
+
+#endif
+
+static IRAM_ATTR bool test_i2c_rx_done_callback(i2c_slave_dev_handle_t channel, const i2c_slave_rx_done_event_data_t *edata, void *user_data)
+{
+    BaseType_t high_task_wakeup = pdFALSE;
+    QueueHandle_t receive_queue = (QueueHandle_t)user_data;
+    xQueueSendFromISR(receive_queue, edata, &high_task_wakeup);
+    return high_task_wakeup == pdTRUE;
+}
+
+static void lp_i2c_master_write_test(void)
+{
+    uint8_t data_wr[DATA_LENGTH] = { 0 };
+    int i;
+
+    i2c_master_bus_config_t i2c_mst_config = {
+        .lp_source_clk = LP_I2C_SCLK_DEFAULT,
+        .i2c_port = LP_I2C_NUM_0,
+        .scl_io_num = LP_I2C_SCL_IO,
+        .sda_io_num = LP_I2C_SDA_IO,
+        .flags.enable_internal_pullup = true,
+    };
+    i2c_master_bus_handle_t bus_handle;
+
+    TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config, &bus_handle));
+
+    i2c_device_config_t dev_cfg = {
+        .dev_addr_length = I2C_ADDR_BIT_LEN_7,
+        .device_address = 0x58,
+        .scl_speed_hz = 100000,
+    };
+
+    i2c_master_dev_handle_t dev_handle;
+    TEST_ESP_OK(i2c_master_bus_add_device(bus_handle, &dev_cfg, &dev_handle));
+
+    unity_wait_for_signal("i2c slave init finish");
+
+    unity_send_signal("master write");
+    for (i = 0; i < DATA_LENGTH; i++) {
+        data_wr[i] = i;
+    }
+
+    disp_buf(data_wr, i);
+    TEST_ESP_OK(i2c_master_transmit(dev_handle, data_wr, DATA_LENGTH, -1));
+    unity_wait_for_signal("ready to delete");
+    TEST_ESP_OK(i2c_master_bus_rm_device(dev_handle));
+
+    TEST_ESP_OK(i2c_del_master_bus(bus_handle));
+}
+
+static void hp_i2c_slave_read_test(void)
+{
+    uint8_t data_rd[DATA_LENGTH] = {0};
+
+    i2c_slave_config_t i2c_slv_config = {
+        .addr_bit_len = I2C_ADDR_BIT_LEN_7,
+        .clk_source = I2C_CLK_SRC_DEFAULT,
+        .i2c_port = TEST_I2C_PORT,
+        .send_buf_depth = 256,
+        .scl_io_num = LP_I2C_SCL_IO,
+        .sda_io_num = LP_I2C_SDA_IO,
+        .slave_addr = 0x58,
+    };
+
+    i2c_slave_dev_handle_t slave_handle;
+    TEST_ESP_OK(i2c_new_slave_device(&i2c_slv_config, &slave_handle));
+
+    s_receive_queue = xQueueCreate(1, sizeof(i2c_slave_rx_done_event_data_t));
+    i2c_slave_event_callbacks_t cbs = {
+        .on_recv_done = test_i2c_rx_done_callback,
+    };
+    ESP_ERROR_CHECK(i2c_slave_register_event_callbacks(slave_handle, &cbs, s_receive_queue));
+
+    i2c_slave_rx_done_event_data_t rx_data;
+    TEST_ESP_OK(i2c_slave_receive(slave_handle, data_rd, DATA_LENGTH));
+
+    unity_send_signal("i2c slave init finish");
+
+    unity_wait_for_signal("master write");
+    xQueueReceive(s_receive_queue, &rx_data, pdMS_TO_TICKS(10000));
+    disp_buf(data_rd, DATA_LENGTH);
+    for (int i = 0; i < DATA_LENGTH; i++) {
+        TEST_ASSERT(data_rd[i] == i);
+    }
+    vQueueDelete(s_receive_queue);
+    unity_send_signal("ready to delete");
+    TEST_ESP_OK(i2c_del_slave_device(slave_handle));
+}
+
+TEST_CASE_MULTIPLE_DEVICES("LP_I2C master write slave test", "[i2c][test_env=generic_multi_device][timeout=150]", lp_i2c_master_write_test, hp_i2c_slave_read_test);