From 13167d847976f47e3e0202241eaf260804f37ede Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 9 Jan 2024 12:23:46 +0800 Subject: [PATCH] change(flash): rename spi_timing_is_tuned to spi_flash_timing_is_tuned --- components/esp_hw_support/mspi_timing_by_dqs.c | 14 ++++++-------- .../esp_hw_support/mspi_timing_by_mspi_delay.c | 6 ++---- components/esp_hw_support/mspi_timing_tuning.c | 8 +++----- components/spi_flash/esp_flash_spi_init.c | 2 +- .../spi_flash/include/esp_private/spi_flash_os.h | 4 ++-- 5 files changed, 14 insertions(+), 20 deletions(-) diff --git a/components/esp_hw_support/mspi_timing_by_dqs.c b/components/esp_hw_support/mspi_timing_by_dqs.c index a8ced1f660..6b2be45283 100644 --- a/components/esp_hw_support/mspi_timing_by_dqs.c +++ b/components/esp_hw_support/mspi_timing_by_dqs.c @@ -46,11 +46,11 @@ #define WRONG_DELAYLINE 16 const static char *TAG = "MSPI DQS"; -static uint32_t s_test_data[MSPI_TIMING_TEST_DATA_LEN] = {0x7f786655, 0xa5ff005a, 0x3f3c33aa, 0xa5ff5a00, 0x1f1e9955, 0xa5005aff, 0x0f0fccaa, 0xa55a00ff, - 0x07876655, 0xffa55a00, 0x03c333aa, 0xff00a55a, 0x01e19955, 0xff005aa5, 0x00f0ccaa, 0xff5a00a5, - 0x80786655, 0x00a5ff5a, 0xc03c33aa, 0x00a55aff, 0xe01e9355, 0x00ff5aa5, 0xf00fccaa, 0x005affa5, - 0xf8876655, 0x5aa5ff00, 0xfcc333aa, 0x5affa500, 0xfee19955, 0x5a00a5ff, 0x11f0ccaa, 0x5a00ffa5}; -static mspi_timing_config_t s_test_delayline_config = { +const static uint32_t s_test_data[MSPI_TIMING_TEST_DATA_LEN] = {0x7f786655, 0xa5ff005a, 0x3f3c33aa, 0xa5ff5a00, 0x1f1e9955, 0xa5005aff, 0x0f0fccaa, 0xa55a00ff, + 0x07876655, 0xffa55a00, 0x03c333aa, 0xff00a55a, 0x01e19955, 0xff005aa5, 0x00f0ccaa, 0xff5a00a5, + 0x80786655, 0x00a5ff5a, 0xc03c33aa, 0x00a55aff, 0xe01e9355, 0x00ff5aa5, 0xf00fccaa, 0x005affa5, + 0xf8876655, 0x5aa5ff00, 0xfcc333aa, 0x5affa500, 0xfee19955, 0x5a00a5ff, 0x11f0ccaa, 0x5a00ffa5}; +const static mspi_timing_config_t s_test_delayline_config = { .delayline_table = {{15, 0}, {14, 0}, {13, 0}, {12, 0}, {11, 0}, {10, 0}, {9, 0}, {8, 0}, {7, 0}, {6, 0}, {5, 0}, {4, 0}, {3, 0}, {2, 0}, {1, 0}, {0, 0}, {0, 0}, {0, 1}, {0, 2}, {0, 3}, {0, 4}, {0, 5}, {0, 6}, {0, 7}, {0, 8}, {0, 9}, {0, 10}, {0, 11}, {0, 12}, {0, 13}, {0, 14}, {0, 15}}, .available_config_num = 32, @@ -153,7 +153,7 @@ uint32_t mspi_timing_psram_select_best_tuning_phase(const void *configs, uint32_ void mspi_timing_psram_set_best_tuning_phase(const void *configs, uint8_t best_id) { - s_psram_best_phase = ((mspi_timing_config_t *)configs)->phase[best_id]; + s_psram_best_phase = ((const mspi_timing_config_t *)configs)->phase[best_id]; } void mspi_timing_get_psram_tuning_delaylines(mspi_timing_config_t *configs) @@ -177,8 +177,6 @@ void mspi_timing_config_psram_set_tuning_delayline(const void *configs, uint8_t mspi_timing_ll_set_delayline(i, delayline_config->data_delayline); } } - - ESP_EARLY_LOGD(TAG, "set to delayline: {%d, %d}", delayline_config->data_delayline, delayline_config->dqs_delayline); } uint32_t mspi_timing_psram_select_best_tuning_delayline(const void *configs, uint32_t consecutive_length, uint32_t end, const uint8_t *reference_data, bool is_ddr) diff --git a/components/esp_hw_support/mspi_timing_by_mspi_delay.c b/components/esp_hw_support/mspi_timing_by_mspi_delay.c index 9ab56877a0..28c554ad3e 100644 --- a/components/esp_hw_support/mspi_timing_by_mspi_delay.c +++ b/components/esp_hw_support/mspi_timing_by_mspi_delay.c @@ -532,14 +532,12 @@ static mspi_timing_tuning_param_t s_psram_best_timing_tuning_config; void mspi_timing_flash_set_best_tuning_config(const void *configs, uint8_t best_id) { - const mspi_timing_tuning_param_t params = ((const mspi_timing_config_t *)configs)->tuning_config_table[best_id]; - s_flash_best_timing_tuning_config = params; + s_flash_best_timing_tuning_config = ((const mspi_timing_config_t *)configs)->tuning_config_table[best_id]; } void mspi_timing_psram_set_best_tuning_config(const void *configs, uint8_t best_id) { - const mspi_timing_tuning_param_t params = ((const mspi_timing_config_t *)configs)->tuning_config_table[best_id]; - s_psram_best_timing_tuning_config = params; + s_psram_best_timing_tuning_config = ((const mspi_timing_config_t *)configs)->tuning_config_table[best_id]; } diff --git a/components/esp_hw_support/mspi_timing_tuning.c b/components/esp_hw_support/mspi_timing_tuning.c index f21295ef48..9b2e34709f 100644 --- a/components/esp_hw_support/mspi_timing_tuning.c +++ b/components/esp_hw_support/mspi_timing_tuning.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -24,9 +24,6 @@ #include "mspi_timing_tuning_configs.h" #include "hal/mspi_timing_tuning_ll.h" #endif -#if SOC_MEMSPI_TIMING_TUNING_BY_DQS -#include "hal/psram_ctrlr_ll.h" -#endif #if SOC_MEMSPI_CLK_SRC_IS_INDEPENDENT #include "hal/spimem_flash_ll.h" #endif @@ -215,6 +212,7 @@ static void s_sweep_for_success_sample_points(uint8_t *reference_data, void *con uint8_t read_data[MSPI_TIMING_TEST_DATA_LEN] = {0}; for (config_idx = 0; config_idx < timing_config->available_config_num; config_idx++) { + out_array[config_idx] = 0; for (int i = 0; i < s_tuning_cfg_drv.sweep_test_nums; i++) { memset(read_data, 0, MSPI_TIMING_TEST_DATA_LEN); #if MSPI_TIMING_FLASH_NEEDS_TUNING @@ -546,7 +544,7 @@ void mspi_timing_change_speed_mode_cache_safe(bool switch_down) /*------------------------------------------------------------------------------ * APIs to inform SPI1 Flash driver of necessary timing configurations *----------------------------------------------------------------------------*/ -bool spi_timing_is_tuned(void) +bool spi_flash_timing_is_tuned(void) { #if MSPI_TIMING_MSPI1_IS_INVOLVED //esp flash driver needs to be notified diff --git a/components/spi_flash/esp_flash_spi_init.c b/components/spi_flash/esp_flash_spi_init.c index f6ddb52b93..575da4e808 100644 --- a/components/spi_flash/esp_flash_spi_init.c +++ b/components/spi_flash/esp_flash_spi_init.c @@ -360,7 +360,7 @@ esp_err_t esp_flash_init_default_chip(void) // For chips need time tuning, get value directely from system here. #if SOC_SPI_MEM_SUPPORT_TIMING_TUNING - if (spi_timing_is_tuned()) { + if (spi_flash_timing_is_tuned()) { cfg.using_timing_tuning = 1; spi_timing_get_flash_timing_param(&cfg.timing_reg); } diff --git a/components/spi_flash/include/esp_private/spi_flash_os.h b/components/spi_flash/include/esp_private/spi_flash_os.h index b7db7b6b60..3d8512c9e9 100644 --- a/components/spi_flash/include/esp_private/spi_flash_os.h +++ b/components/spi_flash/include/esp_private/spi_flash_os.h @@ -83,9 +83,9 @@ esp_err_t esp_flash_init_main(esp_flash_t *chip); void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config); /** - * @brief Get the knowledge if the MSPI timing is tuned or not + * @brief Get the knowledge if the Flash timing is tuned or not */ -bool spi_timing_is_tuned(void); +bool spi_flash_timing_is_tuned(void); /** * @brief Set Flash chip specifically required MSPI register settings here