diff --git a/components/esp32/include/rom/aes.h b/components/esp32/include/rom/aes.h index 950ce2e4af..d81d8f6f9b 100644 --- a/components/esp32/include/rom/aes.h +++ b/components/esp32/include/rom/aes.h @@ -11,6 +11,7 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef _ROM_AES_H_ #define _ROM_AES_H_ @@ -33,8 +34,8 @@ void ets_aes_enable(void); void ets_aes_disable(void); void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap, - bool in_word_swap, bool in_byte_swap, - bool out_word_swap, bool out_byte_swap); + bool in_word_swap, bool in_byte_swap, + bool out_word_swap, bool out_byte_swap); bool ets_aes_setkey_enc(const uint8_t *key, enum AES_BITS bits); diff --git a/components/esp32/include/rom/bigint.h b/components/esp32/include/rom/bigint.h index 2a6c2b82a1..ab4246c6da 100644 --- a/components/esp32/include/rom/bigint.h +++ b/components/esp32/include/rom/bigint.h @@ -11,6 +11,7 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef _ROM_BIGINT_H_ #define _ROM_BIGINT_H_ diff --git a/components/esp32/include/rom/cache.h b/components/esp32/include/rom/cache.h index d5df8d1a6c..fb84bca03c 100644 --- a/components/esp32/include/rom/cache.h +++ b/components/esp32/include/rom/cache.h @@ -11,6 +11,7 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef _ROM_CACHE_H_ #define _ROM_CACHE_H_ @@ -44,7 +45,7 @@ void mmu_init(int cpu_no); * * @param int pod : process identifier. Range 0~7. * - * @param unsigned int vaddr : virtual address in CPU address space. + * @param unsigned int vaddr : virtual address in CPU address space. * Can be IRam0, IRam1, IRom0 and DRom0 memory address. * Should be aligned by psize. * @@ -73,7 +74,7 @@ unsigned int cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsign * * @param int pod : process identifier. Range 0~7. * - * @param unsigned int vaddr : virtual address in CPU address space. + * @param unsigned int vaddr : virtual address in CPU address space. * Can be IRam0, IRam1, IRom0 and DRom0 memory address. * Should be aligned by psize. * @@ -92,7 +93,6 @@ unsigned int cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsign * 4 : mmu table to be written is out of range * 5 : vaddr is out of range */ - unsigned int cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num); /** diff --git a/components/esp32/include/rom/crc.h b/components/esp32/include/rom/crc.h index 509f22cd0b..84e17882de 100644 --- a/components/esp32/include/rom/crc.h +++ b/components/esp32/include/rom/crc.h @@ -11,9 +11,12 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef ROM_CRC_H #define ROM_CRC_H +#include + #ifdef __cplusplus extern "C" { #endif @@ -28,9 +31,9 @@ extern "C" { /* Standard CRC8/16/32 algorithms. */ -// CRC-8 x8+x2+x1+1 0x07 +// CRC-8 x8+x2+x1+1 0x07 // CRC16-CCITT x16+x12+x5+1 1021 ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS -// CRC32: +// CRC32: //G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1 //If your buf is not continuous, you can use the first result to be the second parameter. @@ -39,78 +42,78 @@ extern "C" { * * @param uint32_t crc : init crc value, use 0 at the first use. * - * @param uint8_t const * buf : buffer to start calculate crc. + * @param uint8_t const *buf : buffer to start calculate crc. * * @param uint32_t len : buffer length in byte. * * @return None */ -uint32_t crc32_le(uint32_t crc, uint8_t const * buf, uint32_t len); +uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len); /** * @brief Crc32 value that is in big endian. * * @param uint32_t crc : init crc value, use 0 at the first use. * - * @param uint8_t const * buf : buffer to start calculate crc. + * @param uint8_t const *buf : buffer to start calculate crc. * * @param uint32_t len : buffer length in byte. * * @return None */ -uint32_t crc32_be(uint32_t crc, uint8_t const * buf, uint32_t len); +uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len); /** * @brief Crc16 value that is in little endian. * * @param uint16_t crc : init crc value, use 0 at the first use. * - * @param uint8_t const * buf : buffer to start calculate crc. + * @param uint8_t const *buf : buffer to start calculate crc. * * @param uint32_t len : buffer length in byte. * * @return None */ -uint16_t crc16_le(uint16_t crc, uint8_t const * buf, uint32_t len); +uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len); /** * @brief Crc16 value that is in big endian. * * @param uint16_t crc : init crc value, use 0 at the first use. * - * @param uint8_t const * buf : buffer to start calculate crc. + * @param uint8_t const *buf : buffer to start calculate crc. * * @param uint32_t len : buffer length in byte. * * @return None */ -uint16_t crc16_be(uint16_t crc, uint8_t const * buf, uint32_t len); +uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len); /** * @brief Crc8 value that is in little endian. * * @param uint8_t crc : init crc value, use 0 at the first use. * - * @param uint8_t const * buf : buffer to start calculate crc. + * @param uint8_t const *buf : buffer to start calculate crc. * * @param uint32_t len : buffer length in byte. * * @return None */ -uint8_t crc8_le(uint8_t crc, uint8_t const * buf, uint32_t len); +uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len); /** * @brief Crc8 value that is in big endian. * * @param uint32_t crc : init crc value, use 0 at the first use. * - * @param uint8_t const * buf : buffer to start calculate crc. + * @param uint8_t const *buf : buffer to start calculate crc. * * @param uint32_t len : buffer length in byte. * * @return None */ -uint8_t crc8_be(uint8_t crc, uint8_t const * buf, uint32_t len); +uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len); /** * @} diff --git a/components/esp32/include/rom/efuse.h b/components/esp32/include/rom/efuse.h index 0fa6fb9a40..62692c3098 100644 --- a/components/esp32/include/rom/efuse.h +++ b/components/esp32/include/rom/efuse.h @@ -11,17 +11,20 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef _ROM_EFUSE_H_ #define _ROM_EFUSE_H_ +#include + #ifdef __cplusplus extern "C" { #endif /** \defgroup efuse_APIs efuse APIs * @brief ESP32 efuse read/write APIs - * @attention - * + * @attention + * */ /** @addtogroup efuse_APIs @@ -35,7 +38,7 @@ extern "C" { * * @return null */ -void ets_efuse_read_op(viid); +void ets_efuse_read_op(void); /** * @brief Do a efuse write operation, to update efuse write registers to efuse, then you need call ets_efuse_read_op again. @@ -54,35 +57,33 @@ void ets_efuse_program_op(void); * * @return u32: 1 for 100KHZ. */ -u32 ets_efuse_get_8M_clock(void); +uint32_t ets_efuse_get_8M_clock(void); /** * @brief Read spi pad configuration, show gpio number of flash pad, includes 5 pads. * * @param null * - * @return uint32_t: 0, invalid, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd + * @return uint32_t: 0, invalid, flash pad decided by strapping + * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd */ - uint32_t ets_efuse_get_spiconfig(void); /** * @brief A crc8 algorithm used in efuse check. * - * @param unsigned char const * p : Pointer to original data. + * @param unsigned char const *p : Pointer to original data. * * @param unsigned int len : Data length in byte. * * @return unsigned char: Crc value. */ -unsigned char esp_crc8(unsigned char const * p, unsigned int len); +unsigned char esp_crc8(unsigned char const *p, unsigned int len); /** * @} */ - #ifdef __cplusplus } #endif diff --git a/components/esp32/include/rom/ets_sys.h b/components/esp32/include/rom/ets_sys.h index 04915c1b24..c412c9b41f 100644 --- a/components/esp32/include/rom/ets_sys.h +++ b/components/esp32/include/rom/ets_sys.h @@ -36,10 +36,10 @@ extern "C" { * NOTE * Many functions in this header files can't be run in FreeRTOS. * Please see the comment of the Functions. - * There are also some functions that doesn't work on FreeRTOS + * There are also some functions that doesn't work on FreeRTOS * without listed in the header, such as: * xtos functions start with "_xtos_" in ld file. - * + * *********************************************************************** */ @@ -51,24 +51,23 @@ extern "C" { * @{ */ - typedef enum { - ETS_OK = 0,/**< return successful in ets*/ - ETS_FAILED = 1/**< return failed in ets*/ + ETS_OK = 0, /**< return successful in ets*/ + ETS_FAILED = 1 /**< return failed in ets*/ } ETS_STATUS; typedef uint32_t ETSSignal; typedef uint32_t ETSParam; -typedef struct ETSEventTag ETSEvent;/**< Event transmit/receive in ets*/ +typedef struct ETSEventTag ETSEvent; /**< Event transmit/receive in ets*/ struct ETSEventTag { - ETSSignal sig;/**< Event signal, in same task, different Event with different signal*/ - ETSParam par;/**< Event parameter, sometimes without usage, then will be set as 0*/ + ETSSignal sig; /**< Event signal, in same task, different Event with different signal*/ + ETSParam par; /**< Event parameter, sometimes without usage, then will be set as 0*/ }; -typedef void (*ETSTask)(ETSEvent *e);/**< Type of the Task processer*/ -typedef void (* ets_idle_cb_t)(void *arg);/**< Type of the system idle callback*/ +typedef void (*ETSTask)(ETSEvent *e); /**< Type of the Task processer*/ +typedef void (* ets_idle_cb_t)(void *arg); /**< Type of the system idle callback*/ /** * @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it. @@ -117,7 +116,8 @@ void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen); * @return ETS_OK : post successful * @return ETS_FAILED : post failed */ -ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par); +ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par); + /** * @} */ @@ -130,8 +130,7 @@ ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par); * @{ */ - -extern const char* const exc_cause_table[40];///**< excption cause that defined by the core.*/ +extern const char *const exc_cause_table[40]; ///**< excption cause that defined by the core.*/ /** * @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed. @@ -168,7 +167,7 @@ void ets_set_appcpu_boot_addr(uint32_t start); * * @param uint32_t pos : Flash physical address. * - * @param uint32_t* entry_addr: the pointer of an variable that can store Entry code address. + * @param uint32_t *entry_addr: the pointer of an variable that can store Entry code address. * * @param bool jump : Jump into the code in the function or not. * @@ -184,7 +183,7 @@ ETS_STATUS ets_unpack_flash_code_legacy(uint32_t pos, uint32_t *entry_addr, bool * * @param uint32_t pos : Flash physical address. * - * @param uint32_t* entry_addr: the pointer of an variable that can store Entry code address. + * @param uint32_t *entry_addr: the pointer of an variable that can store Entry code address. * * @param bool jump : Jump into the code in the function or not. * @@ -196,11 +195,11 @@ ETS_STATUS ets_unpack_flash_code_legacy(uint32_t pos, uint32_t *entry_addr, bool * @return ETS_FAILED : unpack failed */ ETS_STATUS ets_unpack_flash_code(uint32_t pos, uint32_t *entry_addr, bool jump, bool sb_need_check, bool config); + /** * @} */ - /** \defgroup ets_printf_apis, ets_printf related apis used in ets * @brief ets printf apis */ @@ -214,7 +213,7 @@ ETS_STATUS ets_unpack_flash_code(uint32_t pos, uint32_t *entry_addr, bool jump, * Can not print float point data format, or longlong data format. * So we maybe only use this in ROM. * - * @param const char* fmt : See printf. + * @param const char *fmt : See printf. * * @param ... : See printf. * @@ -275,7 +274,6 @@ void ets_install_uart_printf(void); * @} */ - /** \defgroup ets_timer_apis, ets_timer related apis used in ets * @brief ets timer apis */ @@ -286,11 +284,11 @@ void ets_install_uart_printf(void); typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/ typedef struct _ETSTIMER_ { - struct _ETSTIMER_ *timer_next;/**< timer linker*/ - uint32_t timer_expire;/**< abstruct time when timer expire*/ - uint32_t timer_period;/**< timer period, 0 means timer is not periodic repeated*/ - ETSTimerFunc *timer_func;/**< timer handler*/ - void *timer_arg;/**< timer handler argument*/ + struct _ETSTIMER_ *timer_next; /**< timer linker*/ + uint32_t timer_expire; /**< abstruct time when timer expire*/ + uint32_t timer_period; /**< timer period, 0 means timer is not periodic repeated*/ + ETSTimerFunc *timer_func; /**< timer handler*/ + void *timer_arg; /**< timer handler argument*/ } ETSTimer; /** @@ -393,7 +391,7 @@ void ets_update_cpu_frequency(uint32_t ticks_per_us); * * @return uint32_t : CPU ticks per us record in ets. */ -uint32_t ets_get_cpu_frequency(); +uint32_t ets_get_cpu_frequency(void); /** * @brief Get xtal_freq/analog_8M*256 value calibrated in rtc module. @@ -402,27 +400,25 @@ uint32_t ets_get_cpu_frequency(); * * @return uint32_t : xtal_freq/analog_8M*256. */ -uint32_t ets_get_xtal_scale(); +uint32_t ets_get_xtal_scale(void); /** * @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store. * * @param None * - * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register. + * @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register. * clock = (REG_READ(RTC_STORE5) & 0xffff) << 12; - * else if analog_8M in efuse + * else if analog_8M in efuse * clock = ets_get_xtal_scale() * 15625 * ets_efuse_get_8M_clock() / 40; * else clock = 26M. */ -uint32_t ets_get_detected_xtal_freq(); +uint32_t ets_get_detected_xtal_freq(void); /** * @} */ - - /** \defgroup ets_intr_apis, ets interrupt configure related apis * @brief ets intr apis */ @@ -506,7 +502,7 @@ void ets_waiti0(void); /** * @brief Attach an CPU interrupt to a hardware source. * We have 4 steps to use an interrupt: - * 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM); + * 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM); * 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL); * 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM); * 4.Enable interrupt in the module. @@ -548,7 +544,7 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num); #define ETS_TG0_T0_INTR_ATTACH(func, arg) \ ETS_ISR_ATTACH(ETS_TG0_T0_INUM, (func), (void *)(arg)) - + #define ETS_GPIO_INTR_ATTACH(func, arg) \ ETS_ISR_ATTACH(ETS_GPIO_INUM, (func), (void *)(arg)) @@ -557,7 +553,7 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num); #define ETS_WDT_INTR_ATTACH(func, arg) \ ETS_ISR_ATTACH(ETS_WDT_INUM, (func), (void *)(arg)) - + #define ETS_SLC_INTR_ATTACH(func, arg) \ ETS_ISR_ATTACH(ETS_SLC_INUM, (func), (void *)(arg)) @@ -578,7 +574,7 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num); #define ETS_GPIO_INTR_DISABLE() \ ETS_INTR_DISABLE(ETS_GPIO_INUM) - + #define ETS_WDT_INTR_ENABLE() \ ETS_INTR_ENABLE(ETS_WDT_INUM) @@ -596,19 +592,19 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num); #define ETS_SLC_INTR_DISABLE() \ ETS_INTR_DISABLE(ETS_SLC_INUM) - #endif + /** * @} */ - #ifndef MAC2STR #define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] #define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" #endif #define ETS_MEM_BAR() asm volatile ( "" : : : "memory" ) + /** * @} */ diff --git a/components/esp32/include/rom/gpio.h b/components/esp32/include/rom/gpio.h index fee7aff2a6..a6ca66f1de 100644 --- a/components/esp32/include/rom/gpio.h +++ b/components/esp32/include/rom/gpio.h @@ -33,7 +33,6 @@ extern "C" { * @{ */ - #define GPIO_REG_READ(reg) READ_PERI_REG(reg) #define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val) #define GPIO_PIN_COUNT 40 @@ -46,14 +45,14 @@ extern "C" { #define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0) -typedef enum{ - GPIO_PIN_INTR_DISABLE = 0, - GPIO_PIN_INTR_POSEDGE = 1, - GPIO_PIN_INTR_NEGEDGE = 2, - GPIO_PIN_INTR_ANYEGDE = 3, - GPIO_PIN_INTR_LOLEVEL = 4, - GPIO_PIN_INTR_HILEVEL = 5 -}GPIO_INT_TYPE; +typedef enum { + GPIO_PIN_INTR_DISABLE = 0, + GPIO_PIN_INTR_POSEDGE = 1, + GPIO_PIN_INTR_NEGEDGE = 2, + GPIO_PIN_INTR_ANYEGDE = 3, + GPIO_PIN_INTR_LOLEVEL = 4, + GPIO_PIN_INTR_HILEVEL = 5 +} GPIO_INT_TYPE; #define GPIO_OUTPUT_SET(gpio_no, bit_value) \ ((gpio_no < 32) ? gpio_output_set(bit_value<BIT(0). - * There is no particular ordering guaranteed; so if the order of writes is significant, + * There is no particular ordering guaranteed; so if the order of writes is significant, * calling code should divide a single call into multiple calls. * * @param uint32_t set_mask : the gpios that need high level. @@ -94,7 +93,7 @@ void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mas /** * @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0). - * There is no particular ordering guaranteed; so if the order of writes is significant, + * There is no particular ordering guaranteed; so if the order of writes is significant, * calling code should divide a single call into multiple calls. * * @param uint32_t set_mask : the gpios that need high level. @@ -111,18 +110,18 @@ void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enabl /** * @brief Sample the value of GPIO input pins(0-31) and returns a bitmask. - * + * * @param None - * + * * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0. */ uint32_t gpio_input_get(void); /** * @brief Sample the value of GPIO input pins(32-39) and returns a bitmask. - * + * * @param None - * + * * @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32. */ uint32_t gpio_input_get_high(void); @@ -131,11 +130,11 @@ uint32_t gpio_input_get_high(void); * @brief Register an application-specific interrupt handler for GPIO pin interrupts. * Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack. * Please do not call this function in SDK. - * + * * @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler - * + * * @param void *arg : gpio application-specific interrupt handler argument. - * + * * @return None */ void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg); @@ -143,9 +142,9 @@ void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg); /** * @brief Get gpio interrupts which happens but not processed. * Please do not call this function in SDK. - * + * * @param None - * + * * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0. */ uint32_t gpio_intr_pending(void); @@ -153,9 +152,9 @@ uint32_t gpio_intr_pending(void); /** * @brief Get gpio interrupts which happens but not processed. * Please do not call this function in SDK. - * + * * @param None - * + * * @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32. */ uint32_t gpio_intr_pending_high(void); @@ -163,9 +162,9 @@ uint32_t gpio_intr_pending_high(void); /** * @brief Ack gpio interrupts to process pending interrupts. * Please do not call this function in SDK. - * + * * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0. - * + * * @return None */ void gpio_intr_ack(uint32_t ack_mask); @@ -173,9 +172,9 @@ void gpio_intr_ack(uint32_t ack_mask); /** * @brief Ack gpio interrupts to process pending interrupts. * Please do not call this function in SDK. - * + * * @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32. - * + * * @return None */ void gpio_intr_ack_high(uint32_t ack_mask); @@ -183,11 +182,11 @@ void gpio_intr_ack_high(uint32_t ack_mask); /** * @brief Set GPIO to wakeup the ESP32. * Please do not call this function in SDK. - * + * * @param uint32_t i: gpio number. - * + * * @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used - * + * * @return None */ void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); @@ -195,97 +194,97 @@ void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state); /** * @brief disable GPIOs to wakeup the ESP32. * Please do not call this function in SDK. - * + * * @param None - * + * * @return None */ -void gpio_pin_wakeup_disable(); +void gpio_pin_wakeup_disable(void); /** * @brief set gpio input to a signal, one gpio can input to several signals. - * + * * @param uint32_t gpio : gpio number, 0~0x27 * gpio == 0x30, input 0 to signal * gpio == 0x34, ??? * gpio == 0x38, input 1 to signal * * @param uint32_t signal_idx : signal index. - * - * @param bool inv : the signal is inv or not - * + * + * @param bool inv : the signal is inv or not + * * @return None */ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv); /** * @brief set signal output to gpio, one signal can output to several gpios. - * + * * @param uint32_t gpio : gpio number, 0~0x27 * * @param uint32_t signal_idx : signal index. * signal_idx == 0x100, cancel output put to the gpio - * - * @param bool out_inv : the signal output is inv or not - * - * @param bool oen_inv : the signal output enable is inv or not - * + * + * @param bool out_inv : the signal output is inv or not + * + * @param bool oen_inv : the signal output enable is inv or not + * * @return None */ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv); /** * @brief Select pad as a gpio function from IOMUX. - * + * * @param uint32_t gpio_num : gpio number, 0~0x27 - * + * * @return None */ void gpio_pad_select_gpio(uint8_t gpio_num); /** * @brief Set pad driver capability. - * + * * @param uint32_t gpio_num : gpio number, 0~0x27 - * + * * @param uint8_t drv : 0-3 - * + * * @return None */ void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv); /** * @brief Pull up the pad from gpio number. - * + * * @param uint32_t gpio_num : gpio number, 0~0x27 - * + * * @return None */ void gpio_pad_pullup(uint8_t gpio_num); /** * @brief Pull down the pad from gpio number. - * + * * @param uint32_t gpio_num : gpio number, 0~0x27 - * + * * @return None */ void gpio_pad_pulldown(uint8_t gpio_num); /** * @brief Unhold the pad from gpio number. - * + * * @param uint32_t gpio_num : gpio number, 0~0x27 - * + * * @return None */ void gpio_pad_unhold(uint8_t gpio_num); /** * @brief Hold the pad from gpio number. - * + * * @param uint32_t gpio_num : gpio number, 0~0x27 - * + * * @return None */ void gpio_pad_hold(uint8_t gpio_num); diff --git a/components/esp32/include/rom/rtc.h b/components/esp32/include/rom/rtc.h index b5c6abe81c..d8c0c789a3 100644 --- a/components/esp32/include/rom/rtc.h +++ b/components/esp32/include/rom/rtc.h @@ -40,12 +40,12 @@ extern "C" { * Please do not use reserved or used rtc memory or registers. * * * ************************************************************************************* - * RTC Memory & Store Register usage + * RTC Memory & Store Register usage ************************************************************************************* * rtc memory addr type size usage * 0x3ff61000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry - * 0x3ff61000+SIZE_CP Slow 7936-SIZE_CP - * 0x3ff62f00 Slow 256 Reserved + * 0x3ff61000+SIZE_CP Slow 6144-SIZE_CP + * 0x3ff62800 Slow 2048 Reserved * * 0x3ff80000(0x400c0000) Fast 8192 deep sleep entry code * @@ -87,7 +87,7 @@ typedef enum { RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/ EXT_CPU_RESET = 14, /**<14, for APP CPU, reseted by PRO CPU*/ RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/ - RTCWDT_RTC_RESET = 16 /**<16, RTC Watch dog reset digital core and rtc module*/ + RTCWDT_RTC_RESET = 16 /**<16, RTC Watch dog reset digital core and rtc module*/ } RESET_REASON; typedef enum { @@ -136,7 +136,7 @@ typedef enum { SDIO_IDLE_INT_EN = SDIO_IDLE_INT, RTC_WDT_INT_EN = RTC_WDT_INT, RTC_TIME_VALID_INT_EN = RTC_TIME_VALID_INT -}RTC_INT_EN; +} RTC_INT_EN; /** * @brief Get the reset reason for CPU. diff --git a/components/esp32/include/rom/secure_boot.h b/components/esp32/include/rom/secure_boot.h index 56952381e6..cfeda08933 100644 --- a/components/esp32/include/rom/secure_boot.h +++ b/components/esp32/include/rom/secure_boot.h @@ -11,6 +11,7 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef _ROM_SECURE_BOOT_H_ #define _ROM_SECURE_BOOT_H_ diff --git a/components/esp32/include/rom/spi_flash.h b/components/esp32/include/rom/spi_flash.h index 7206d013e9..ec71cfe85e 100644 --- a/components/esp32/include/rom/spi_flash.h +++ b/components/esp32/include/rom/spi_flash.h @@ -11,6 +11,7 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. + #ifndef _ROM_SPI_FLASH_H_ #define _ROM_SPI_FLASH_H_ @@ -36,31 +37,31 @@ extern "C" { /************************************************************* * Note ************************************************************* - * 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is - * used as an SPI master to access Flash and ext-SRAM by - * Cache module. It will support Decryto read for Flash, - * read/write for ext-SRAM. And SPI1 is also used as an - * SPI master for Flash read/write and ext-SRAM read/write. + * 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is + * used as an SPI master to access Flash and ext-SRAM by + * Cache module. It will support Decryto read for Flash, + * read/write for ext-SRAM. And SPI1 is also used as an + * SPI master for Flash read/write and ext-SRAM read/write. * It will support Encrypto write for Flash. * 2. As an SPI master, SPI support Highest clock to 80M, - * however, Flash with 80M Clock should be configured - * for different Flash chips. If you want to use 80M - * clock We should use the SPI that is certified by - * Espressif. However, the certification is not started + * however, Flash with 80M Clock should be configured + * for different Flash chips. If you want to use 80M + * clock We should use the SPI that is certified by + * Espressif. However, the certification is not started * at the time, so please use 40M clock at the moment. - * 3. SPI Flash can use 2 lines or 4 lines mode. If you - * use 2 lines mode, you can save two pad SPIHD and - * SPIWP for gpio. ESP32 support configured SPI pad for - * Flash, the configuration is stored in efuse and flash. + * 3. SPI Flash can use 2 lines or 4 lines mode. If you + * use 2 lines mode, you can save two pad SPIHD and + * SPIWP for gpio. ESP32 support configured SPI pad for + * Flash, the configuration is stored in efuse and flash. * However, the configurations of pads should be certified - * by Espressif. If you use this function, please use 40M + * by Espressif. If you use this function, please use 40M * clock at the moment. - * 4. ESP32 support to use Common SPI command to configure + * 4. ESP32 support to use Common SPI command to configure * Flash to QIO mode, if you failed to configure with fix * command. With Common SPI Command, ESP32 can also provide * a way to use same Common SPI command groups on different * Flash chips. - * 5. This functions are not protected by packeting, Please use the + * 5. This functions are not protected by packeting, Please use the ************************************************************* */ @@ -131,7 +132,7 @@ typedef enum { SPI_FLASH_RESULT_TIMEOUT } SpiFlashOpResult; -typedef struct{ +typedef struct { uint32_t deviceId; uint32_t chip_size; // chip size in bytes uint32_t block_size; @@ -151,7 +152,7 @@ typedef struct { /** * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). * @@ -163,11 +164,11 @@ void spi_dummy_len_fix(uint8_t spi, uint8_t freqdiv); /** * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint8_t wp_gpio_num: WP gpio number. * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd * * @return None @@ -176,27 +177,27 @@ void SelectSpiQIO(uint8_t wp_gpio_num, uint32_t ishspi); /** * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint8_t wp_gpio_num: WP gpio number. * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd * - * @param uint8_t* drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. + * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid + * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. * Values usually read from falsh by rom code, function usually callde by rom code. * if value with bit(3) set, the value is valid, bit[2:0] is the real value. * * @return None */ -void SetSpiDrvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t* drvs); +void SetSpiDrvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); /** * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd * * @return None @@ -205,9 +206,9 @@ void SelectSpiFunction(uint32_t ishspi); /** * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd * * @param uint8_t legacy: In legacy mode, more SPI command is used in line. @@ -216,64 +217,61 @@ void SelectSpiFunction(uint32_t ishspi); */ void spi_flash_attach(uint32_t ishspi, bool legacy); - -//void spi_cache_sram_init(); - /** * @brief SPI Read Flash status register. We use CMD 0x05. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * - * @param SpiFlashChip * spi : The information for Flash, which is exported from ld file. + * @param SpiFlashChip *spi : The information for Flash, which is exported from ld file. * - * @param uint32_t* status : The pointer to which to return the Flash status value. + * @param uint32_t *status : The pointer to which to return the Flash status value. * * @return SPI_FLASH_RESULT_OK : read OK. * SPI_FLASH_RESULT_ERR : read error. * SPI_FLASH_RESULT_TIMEOUT : read timeout. */ -SpiFlashOpResult SPI_read_status(SpiFlashChip * spi, uint32_t * status); +SpiFlashOpResult SPI_read_status(SpiFlashChip *spi, uint32_t *status); /** * @brief SPI Read Flash status register high 16 bit. We use CMD 0x35. * Please do not call this function in SDK. * - * @param SpiFlashChip * spi : The information for Flash, which is exported from ld file. + * @param SpiFlashChip *spi : The information for Flash, which is exported from ld file. * - * @param uint32_t* status : The pointer to which to return the Flash status value. + * @param uint32_t *status : The pointer to which to return the Flash status value. * * @return SPI_FLASH_RESULT_OK : read OK. * SPI_FLASH_RESULT_ERR : read error. * SPI_FLASH_RESULT_TIMEOUT : read timeout. */ -SpiFlashOpResult SPI_read_status_high(SpiFlashChip * spi, uint32_t * status); +SpiFlashOpResult SPI_read_status_high(SpiFlashChip *spi, uint32_t *status); /** * @brief Write status to Falsh status register. * Please do not call this function in SDK. * - * @param SpiFlashChip * spi : The information for Flash, which is exported from ld file. + * @param SpiFlashChip *spi : The information for Flash, which is exported from ld file. * - * @param uint32_t status_value : Value to . + * @param uint32_t status_value : Value to . * * @return SPI_FLASH_RESULT_OK : write OK. * SPI_FLASH_RESULT_ERR : write error. * SPI_FLASH_RESULT_TIMEOUT : write timeout. */ -SpiFlashOpResult SPI_write_status(SpiFlashChip * spi, uint32_t status_value); +SpiFlashOpResult SPI_write_status(SpiFlashChip *spi, uint32_t status_value); /** - * @brief Use a command to Read Flash status register. + * @brief Use a command to Read Flash status register. * Please do not call this function in SDK. * - * @param SpiFlashChip * spi : The information for Flash, which is exported from ld file. + * @param SpiFlashChip *spi : The information for Flash, which is exported from ld file. * - * @param uint32_t* status : The pointer to which to return the Flash status value. + * @param uint32_t*status : The pointer to which to return the Flash status value. * * @return SPI_FLASH_RESULT_OK : read OK. * SPI_FLASH_RESULT_ERR : read error. * SPI_FLASH_RESULT_TIMEOUT : read timeout. */ -SpiFlashOpResult SPI_user_command_read(uint32_t * status, uint8_t cmd); +SpiFlashOpResult SPI_user_command_read(uint32_t *status, uint8_t cmd); /** * @brief Config SPI Flash read mode when init. @@ -319,13 +317,13 @@ SpiFlashOpResult SPIClkConfig(uint8_t freqdiv, uint8_t spi); * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. * Please do not call this function in SDK. * - * @param SpiCommonCmd * cmd : A struct to show the action of a command. + * @param SpiCommonCmd *cmd : A struct to show the action of a command. * * @return uint16_t 0 : do not send command any more. * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. + * n > 1 : skip (n - 1) commands. */ -uint16_t SPI_Common_Command(SpiCommonCmd * cmd); +uint16_t SPI_Common_Command(SpiCommonCmd *cmd); /** * @brief Unlock SPI write protect. @@ -337,7 +335,7 @@ uint16_t SPI_Common_Command(SpiCommonCmd * cmd); * SPI_FLASH_RESULT_ERR : Unlock error. * SPI_FLASH_RESULT_TIMEOUT : Unlock timeout. */ -SpiFlashOpResult SPIUnlock(); +SpiFlashOpResult SPIUnlock(void); /** * @brief SPI write protect. @@ -349,7 +347,7 @@ SpiFlashOpResult SPIUnlock(); * SPI_FLASH_RESULT_ERR : Lock error. * SPI_FLASH_RESULT_TIMEOUT : Lock timeout. */ -SpiFlashOpResult SPILock(); +SpiFlashOpResult SPILock(void); /** * @brief Update SPI Flash parameter. @@ -425,11 +423,11 @@ SpiFlashOpResult SPIEraseArea(uint32_t start_addr, uint32_t area_len); /** * @brief Write Data to Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. * - * @param const uint32_t* src : The pointer to data which is to write. + * @param const uint32_t *src : The pointer to data which is to write. * * @param uint32_t len : Length to write, should be 4 bytes aligned. * @@ -437,15 +435,15 @@ SpiFlashOpResult SPIEraseArea(uint32_t start_addr, uint32_t area_len); * SPI_FLASH_RESULT_ERR : Write error. * SPI_FLASH_RESULT_TIMEOUT : Write timeout. */ -SpiFlashOpResult SPIWrite(uint32_t dest_addr, const uint32_t* src, int32_t len); +SpiFlashOpResult SPIWrite(uint32_t dest_addr, const uint32_t *src, int32_t len); /** * @brief Read Data from Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. * - * @param uint32_t* data : The buf to read the data. + * @param uint32_t *dest : The buf to read the data. * * @param uint32_t len : Length to read, should be 4 bytes aligned. * @@ -453,49 +451,49 @@ SpiFlashOpResult SPIWrite(uint32_t dest_addr, const uint32_t* src, int32_t len); * SPI_FLASH_RESULT_ERR : Read error. * SPI_FLASH_RESULT_TIMEOUT : Read timeout. */ -SpiFlashOpResult SPIRead(uint32_t src_addr, uint32_t* dest, int32_t len); +SpiFlashOpResult SPIRead(uint32_t src_addr, uint32_t *dest, int32_t len); /** * @brief SPI1 go into encrypto mode. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param None * * @return None */ -void SPI_Write_Encrypt_Enable(); +void SPI_Write_Encrypt_Enable(void); /** * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. * - * @param uint32_t* data : The pointer to data which is to write. + * @param uint32_t *data : The pointer to data which is to write. * * @return SPI_FLASH_RESULT_OK : Prepare OK. * SPI_FLASH_RESULT_ERR : Prepare error. * SPI_FLASH_RESULT_TIMEOUT : Prepare timeout. */ -SpiFlashOpResult SPI_Prepare_Encrypt_Data(uint32_t flash_addr, uint32_t* data); +SpiFlashOpResult SPI_Prepare_Encrypt_Data(uint32_t flash_addr, uint32_t *data); /** * @brief SPI1 go out of encrypto mode. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param None * * @return None */ -void SPI_Write_Encrypt_Disable(); +void SPI_Write_Encrypt_Disable(void); /** * @brief Encrpto writing data to flash, you should Erase it yourself if need. - * Please do not call this function in SDK. + * Please do not call this function in SDK. * * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. * - * @param uint32_t* data : The pointer to data which is to write. + * @param uint32_t *data : The pointer to data which is to write. * * @param uint32_t len : Length to write, should be 32 bytes aligned. * @@ -503,7 +501,7 @@ void SPI_Write_Encrypt_Disable(); * SPI_FLASH_RESULT_ERR : Encrypto write error. * SPI_FLASH_RESULT_TIMEOUT : Encrypto write timeout. */ -SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, uint32_t* data, uint32_t len); +SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, uint32_t *data, uint32_t len); /** * @} diff --git a/components/esp32/include/rom/uart.h b/components/esp32/include/rom/uart.h old mode 100755 new mode 100644 index ee0e01d3cf..8e3125133c --- a/components/esp32/include/rom/uart.h +++ b/components/esp32/include/rom/uart.h @@ -60,9 +60,9 @@ extern "C" { #define UART_RCV_ERR_FLAG BIT7 //send and receive message frame head -#define FRAME_FLAG 0x7E +#define FRAME_FLAG 0x7E -typedef enum{ +typedef enum { UART_LINE_STATUS_INT_FLAG = 0x06, UART_RCV_FIFO_INT_FLAG = 0x04, UART_RCV_TMOUT_INT_FLAG = 0x0C, @@ -90,9 +90,9 @@ typedef enum { } UartStopBitsNum; typedef enum { - NONE_BITS = 0, - ODD_BITS = 2, - EVEN_BITS = 3 + NONE_BITS = 0, + ODD_BITS = 2, + EVEN_BITS = 3 } UartParityMode; @@ -121,7 +121,7 @@ typedef enum { typedef enum { EMPTY, UNDER_WRITE, - WRITE_OVER + WRITE_OVER } RcvMsgBuffState; typedef struct { @@ -129,9 +129,9 @@ typedef struct { uint8_t *pRcvMsgBuff; uint8_t *pWritePos; uint8_t *pReadPos; - uint8_t TrigLvl; //JLU: may need to pad + uint8_t TrigLvl; RcvMsgBuffState BuffState; -}RcvMsgBuff; +} RcvMsgBuff; typedef struct { uint32_t TrxBuffSize; @@ -146,7 +146,7 @@ typedef enum { RCV_ESC_CHAR, } RcvMsgState; -typedef struct{ +typedef struct { UartBautRate baut_rate; UartBitsNum4Char data_bits; UartExistParity exist_parity; @@ -169,7 +169,7 @@ typedef struct{ * * @return None */ -void uartAttach(); +void uartAttach(void); /** * @brief Init uart0 or uart1 for UART download booting mode. @@ -269,12 +269,12 @@ void uart_tx_wait_idle(uint8_t uart_no); * @brief Get an input char from message channel. * Please do not call this function in SDK. * - * @param uint8_t* pRxChar : the pointer to store the char. + * @param uint8_t *pRxChar : the pointer to store the char. * * @return OK for successful. * FAIL for failed. */ -STATUS uart_rx_one_char(uint8_t* pRxChar); +STATUS uart_rx_one_char(uint8_t *pRxChar); /** * @brief Get an input char to message channel, wait until successful. @@ -290,47 +290,47 @@ char uart_rx_one_char_block(void); * @brief Get an input string line from message channel. * Please do not call this function in SDK. * - * @param uint8_t* pString : the pointer to store the string. + * @param uint8_t *pString : the pointer to store the string. * * @param uint8_t MaxStrlen : the max string length, incude '\0'. * * @return OK. */ -STATUS UartRxString(uint8_t* pString, uint8_t MaxStrlen); +STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen); /** * @brief Process uart recevied information in the interrupt handler. * Please do not call this function in SDK. * - * @param void * para : the message receive buffer. + * @param void *para : the message receive buffer. * * @return None */ -void uart_rx_intr_handler(void * para); +void uart_rx_intr_handler(void *para); /** * @brief Get an char from receive buffer. * Please do not call this function in SDK. * - * @param RcvMsgBuff* pRxBuff : the pointer to the struct that include receive buffer. + * @param RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer. * - * @param uint8_t* pRxByte : the pointer to store the char. + * @param uint8_t *pRxByte : the pointer to store the char. * * @return OK for successful. * FAIL for failed. */ -STATUS uart_rx_readbuff( RcvMsgBuff* pRxBuff, uint8_t* pRxByte); +STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte); /** * @brief Get all chars from receive buffer. * Please do not call this function in SDK. * - * @param uint8_t * pCmdLn : the pointer to store the string. + * @param uint8_t *pCmdLn : the pointer to store the string. * * @return OK for successful. * FAIL for failed. */ -STATUS UartGetCmdLn(uint8_t * pCmdLn); +STATUS UartGetCmdLn(uint8_t *pCmdLn); /** * @brief Get uart configuration struct. @@ -340,13 +340,13 @@ STATUS UartGetCmdLn(uint8_t * pCmdLn); * * @return UartDevice * : uart configuration struct pointer. */ -UartDevice * GetUartDevice(); +UartDevice *GetUartDevice(void); /** - * @brief Send an packet to download tool, with ESC char. + * @brief Send an packet to download tool, with SLIP escaping. * Please do not call this function in SDK. * - * @param uint8_t * p : the pointer to output string. + * @param uint8_t *p : the pointer to output string. * * @param int len : the string length. * @@ -355,10 +355,10 @@ UartDevice * GetUartDevice(); void send_packet(uint8_t *p, int len); /** - * @brief Receive an packet from download tool, with ESC char. + * @brief Receive an packet from download tool, with SLIP escaping. * Please do not call this function in SDK. * - * @param uint8_t * p : the pointer to input string. + * @param uint8_t *p : the pointer to input string. * * @param int len : If string length > len, the string will be truncated. * @@ -369,12 +369,11 @@ void send_packet(uint8_t *p, int len); */ int recv_packet(uint8_t *p, int len, uint8_t is_sync); - /** - * @brief Send an packet to download tool, with ESC char. + * @brief Send an packet to download tool, with SLIP escaping. * Please do not call this function in SDK. * - * @param uint8_t * pData : the pointer to input string. + * @param uint8_t *pData : the pointer to input string. * * @param uint16_t DataLen : the string length. * @@ -383,12 +382,11 @@ int recv_packet(uint8_t *p, int len, uint8_t is_sync); */ STATUS SendMsg(uint8_t *pData, uint16_t DataLen); - /** - * @brief Receive an packet from download tool, with ESC char. + * @brief Receive an packet from download tool, with SLIP escaping. * Please do not call this function in SDK. * - * @param uint8_t * pData : the pointer to input string. + * @param uint8_t *pData : the pointer to input string. * * @param uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated. * diff --git a/components/esp32/include/soc/io_mux_reg.h b/components/esp32/include/soc/io_mux_reg.h index 7be453e095..e5027a71d3 100644 --- a/components/esp32/include/soc/io_mux_reg.h +++ b/components/esp32/include/soc/io_mux_reg.h @@ -105,7 +105,7 @@ #define PERIPHS_IO_MUX_MTDI_U (DR_REG_IO_MUX_BASE +0x34) #define FUNC_MTDI_EMAC_TXD3 5 #define FUNC_MTDI_SD_DATA2 4 -#define FUNC_MTDI_HS2_DATA2 3 +#define FUNC_MTDI_HS2_DATA2 3 #define FUNC_MTDI_GPIO12 2 #define FUNC_MTDI_HSPIQ 1 #define FUNC_MTDI_MTDI 0