kopia lustrzana https://github.com/cariboulabs/cariboulite
210 wiersze
6.9 KiB
C
210 wiersze
6.9 KiB
C
#ifndef __CARIBOU_FPGA_H__
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#define __CARIBOU_FPGA_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdio.h>
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#include <stdint.h>
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#include "io_utils/io_utils.h"
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#include "io_utils/io_utils_spi.h"
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#include "caribou_programming/caribou_prog.h"
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/**
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* @brief Tha manufacturer code - used to verify the FPGA's programming
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*/
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#define CARIBOU_SDR_MANU_CODE 0x1
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#pragma pack(1)
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/**
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* @brief Firmware versions and inner modules information
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*/
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typedef struct
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{
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uint8_t sys_ver;
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uint8_t sys_manu_id;
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uint8_t sys_ctrl_mod_ver;
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uint8_t io_ctrl_mod_ver;
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uint8_t smi_ctrl_mod_ver;
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} caribou_fpga_versions_st;
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/**
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* @brief Firmware interface generic error codes
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*/
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typedef enum
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{
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caribou_fpga_ec_okay = 0x00,
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caribou_fpga_ec_write_attempt_to_readonly = 0x01,
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} caribou_fpga_ec_en; // error codes
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/**
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* @brief RF front end modes of operations
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*/
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typedef enum
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{
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caribou_fpga_io_ctrl_rfm_low_power = 0,
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caribou_fpga_io_ctrl_rfm_bypass = 1,
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caribou_fpga_io_ctrl_rfm_rx_lowpass = 2,
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caribou_fpga_io_ctrl_rfm_rx_hipass = 3,
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caribou_fpga_io_ctrl_rfm_tx_lowpass = 4,
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caribou_fpga_io_ctrl_rfm_tx_hipass = 5,
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} caribou_fpga_io_ctrl_rfm_en;
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/**
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* @brief FPGA status - either not programmed or programmed with
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* a valid firmware
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*/
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typedef enum
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{
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caribou_fpga_status_not_programmed = 0,
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caribou_fpga_status_operational = 1,
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} caribou_fpga_status_en;
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/**
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* @brief RFFE controlling digital pins specifically controlled
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* when in debug mode (read anytime)
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*/
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typedef struct
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{
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uint8_t mixer_en : 1; // LSB
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uint8_t lna_rx_shdn : 1;
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uint8_t lna_tx_shdn : 1;
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uint8_t trvc2 : 1;
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uint8_t trvc1_b : 1;
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uint8_t trvc1 : 1;
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uint8_t rx_h_tx_l_b : 1;
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uint8_t rx_h_tx_l : 1; // MSB
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} caribou_fpga_rf_pin_st;
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/**
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* @brief SMI fifo status struct
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*/
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typedef struct
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{
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uint8_t rx_fifo_empty : 1; // LSB
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uint8_t tx_fifo_full : 1;
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uint8_t smi_channel: 1;
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uint8_t i_smi_test : 1;
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uint8_t reserved : 4; // MSB
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} caribou_fpga_smi_fifo_status_st;
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/**
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* @brief SMI channel select
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*/
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typedef enum
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{
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caribou_fpga_smi_channel_0 = 0,
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caribou_fpga_smi_channel_1 = 1,
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} caribou_fpga_smi_channel_en;
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/**
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* @brief Syncronization bit (metadata) source. Either software
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* setting using "caribou_fpga_set_sys_ctrl_soft_sync_value"
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* or by using an external pulse on the PMOD 6/7 pins.
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* If no change is needed on a specific sync source,
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* "caribou_fpga_sync_src_no_change" should be used
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*/
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typedef enum
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{
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caribou_fpga_sync_src_soft = 0,
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caribou_fpga_sync_src_pmod = 1,
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caribou_fpga_sync_src_no_change = 2,
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} caribou_fpga_sync_source_en;
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#pragma pack()
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/**
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* @brief Firmware control and programming device context
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*/
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typedef struct
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{
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// pinout
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int reset_pin;
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int soft_reset_pin;
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int cs_pin;
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// spi device
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int spi_dev;
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int spi_channel;
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// programming
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caribou_prog_st prog_dev;
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caribou_fpga_status_en status;
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caribou_fpga_versions_st versions;
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// internal controls
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io_utils_spi_st* io_spi;
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int io_spi_handle;
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int initialized;
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} caribou_fpga_st;
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/**
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* @brief initialize FPGA device driver
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*
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* @param dev pointer to device context - should be preinitialized with pinout and spi info
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* @param io_spi spi device
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* @return int success (0) / failure (-1)
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*/
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int caribou_fpga_init(caribou_fpga_st* dev, io_utils_spi_st* io_spi);
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int caribou_fpga_close(caribou_fpga_st* dev);
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int caribou_fpga_soft_reset(caribou_fpga_st* dev);
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int caribou_fpga_hard_reset(caribou_fpga_st* dev);
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int caribou_fpga_hard_reset_keep(caribou_fpga_st* dev, bool reset);
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// programming
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int caribou_fpga_get_status(caribou_fpga_st* dev, caribou_fpga_status_en *stat);
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int caribou_fpga_program_to_fpga(caribou_fpga_st* dev, unsigned char *buffer, size_t len, bool force_prog);
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int caribou_fpga_program_to_fpga_from_file(caribou_fpga_st* dev, char *filename, bool force_prog);
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// System Controller
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int caribou_fpga_get_versions (caribou_fpga_st* dev, caribou_fpga_versions_st *vers);
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void caribou_fpga_print_versions (caribou_fpga_st* dev);
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int caribou_fpga_get_errors (caribou_fpga_st* dev, uint8_t *err_map);
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char* caribou_fpga_get_mode_name (caribou_fpga_io_ctrl_rfm_en mode);
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int caribou_fpga_set_debug_modes (caribou_fpga_st* dev, bool dbg_fifo_push, bool dbg_fifo_pull, bool dbg_smi);
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int caribou_fpga_set_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t gap);
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int caribou_fpga_get_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t *gap);
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int caribou_fpga_set_sys_ctrl_sync_source (caribou_fpga_st* dev, caribou_fpga_sync_source_en rx_09,
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caribou_fpga_sync_source_en rx_24,
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caribou_fpga_sync_source_en tx_09,
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caribou_fpga_sync_source_en tx_24);
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int caribou_fpga_get_sys_ctrl_sync_source (caribou_fpga_st* dev, caribou_fpga_sync_source_en *rx_09,
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caribou_fpga_sync_source_en *rx_24,
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caribou_fpga_sync_source_en *tx_09,
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caribou_fpga_sync_source_en *tx_24);
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int caribou_fpga_set_sys_ctrl_soft_sync_value (caribou_fpga_st* dev, uint8_t rx_09,
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uint8_t rx_24,
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uint8_t tx_09,
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uint8_t tx_24);
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// I/O Controller
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int caribou_fpga_set_io_ctrl_mode (caribou_fpga_st* dev, uint8_t debug_mode, caribou_fpga_io_ctrl_rfm_en rfm);
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int caribou_fpga_get_io_ctrl_mode (caribou_fpga_st* dev, uint8_t *debug_mode, caribou_fpga_io_ctrl_rfm_en *rfm);
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int caribou_fpga_set_io_ctrl_dig (caribou_fpga_st* dev, int led0, int led1);
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int caribou_fpga_get_io_ctrl_dig (caribou_fpga_st* dev, int *led0, int *led1, int *btn, int *cfg);
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int caribou_fpga_set_io_ctrl_pmod_dir (caribou_fpga_st* dev, uint8_t dir);
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int caribou_fpga_get_io_ctrl_pmod_dir (caribou_fpga_st* dev, uint8_t *dir);
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int caribou_fpga_set_io_ctrl_pmod_val (caribou_fpga_st* dev, uint8_t val);
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int caribou_fpga_get_io_ctrl_pmod_val (caribou_fpga_st* dev, uint8_t *val);
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int caribou_fpga_set_io_ctrl_rf_state (caribou_fpga_st* dev, caribou_fpga_rf_pin_st *pins);
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int caribou_fpga_get_io_ctrl_rf_state (caribou_fpga_st* dev, caribou_fpga_rf_pin_st *pins);
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// SMI Controller
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int caribou_fpga_get_smi_ctrl_fifo_status (caribou_fpga_st* dev, caribou_fpga_smi_fifo_status_st *status);
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int caribou_fpga_set_smi_channel (caribou_fpga_st* dev, caribou_fpga_smi_channel_en channel);
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int caribou_fpga_set_smi_ctrl_data_direction (caribou_fpga_st* dev, uint8_t dir);
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#ifdef __cplusplus
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}
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#endif
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#endif // __CARIBOU_FPGA_H__
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