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baza: mirror:7c6f853dc109ea0493bce8652f9531c416967600
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mirror:main
mirror:gr-cariboulite_tag_samples
mirror:adding_metadata_to_gr
mirror:meexmachina-patch-1
mirror:fixing_gr_cariboulite
mirror:bug_fixes_integration_tx
mirror:develop_R1
mirror:develop
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porównaj: mirror:4577e41b615dac4173ef767d4ebf37079c181a9c
Gałęzie Tagi
mirror:main
mirror:gr-cariboulite_tag_samples
mirror:adding_metadata_to_gr
mirror:meexmachina-patch-1
mirror:fixing_gr_cariboulite
mirror:bug_fixes_integration_tx
mirror:develop_R1
mirror:develop

3 Commity
7c6f853dc1 ... 4577e41b61

Autor SHA1 Wiadomość Data
matteo serva 4577e41b61 Revert "moved buffers initialization" 
This reverts commit baccfb4805.
 2024-03-13 21:41:38 +01:00
matteo serva 26fe48f53d fixed driver lockup at channel 0 RX. The fpga firmware 
was using the smi address pins to determine which channel can write the complex_fifo.
The read side of the complex fifo is connected to the DREQ pin of the SMI interface on the raspberry.
The address pins on the smi interface are at logic 1 when no transfer is in progress.

This caused a deadlock condition: the SMI address pin is at 1, so the fifo cannot be filled, so the DREQ cannot be asserted and the SMI cannot start reading data.
 2024-03-13 20:42:30 +01:00
matteo serva baccfb4805 moved buffers initialization 2024-03-13 20:22:36 +01:00
2 zmienionych plików z 1378 dodań i 1378 usunięć
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4
firmware/top.v
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@ -346,7 +346,7 @@ module top (
wire w_rx_fifo_empty;
wire channel;
assign channel = i_smi_a3;
//assign channel = i_smi_a3;
complex_fifo #(
.ADDR_WIDTH(10), // 1024 samples
@ -445,7 +445,7 @@ module top (
.i_smi_data_in(w_smi_data_input),
.o_smi_read_req(w_smi_read_req),
.o_smi_write_req(w_smi_write_req),
.o_channel(/*channel*/),
.o_channel(channel),
.o_dir (/*w_smi_data_direction*/),
.i_smi_test(1'b0/*w_debug_smi_test*/),
.o_cond_tx(),

2752
software/libcariboulite/src/cariboulite_fpga_firmware.h
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