kopia lustrzana https://github.com/cariboulabs/cariboulite
merging changes from dev branch
rodzic
d0805f51c9
commit
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README.md
17
README.md
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@ -1,3 +1,20 @@
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# MODIFIED CARIBOULITE
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This is a non-official branch of cariboulite.
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Features:
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- performance upgrades
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- transmission of arbitrary waveforms
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The guide on how to use this version is in docs/notes/tutorial.txt
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___
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_
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___
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_
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___
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_
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# CaribouLite
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CaribouLite is an affordable, educational, open-source SDR evaluation platform and a HAT for the Raspberry-Pi family of boards (40-pin versions only). It is built for makers, hackers, and researchers and was designed to complement the current SDR (Software Defined Radio) eco-systems offering with a scalable, standalone dual-channel software-defined radio.
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@ -20,6 +20,7 @@
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#define IOC_SYS_CTRL_SYS_SOFT_RST 4
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#define IOC_SYS_CTRL_DEBUG_MODES 5
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#define IOC_SYS_CTRL_SYS_TX_SAMPLE_GAP 6
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#define IOC_SYS_CTRL_SYS_CTRL_WORD 3
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#define IOC_IO_CTRL_MODE 1
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#define IOC_IO_CTRL_DIG_PIN 2
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@ -384,6 +385,21 @@ int caribou_fpga_get_errors (caribou_fpga_st* dev, uint8_t *err_map)
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return caribou_fpga_spi_transfer (dev, (uint8_t*)(&oc), err_map);
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}
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int caribou_fpga_get_debug (caribou_fpga_st* dev, uint8_t *err_map)
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{
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CARIBOU_FPGA_CHECK_DEV(dev,"caribou_fpga_get_errors");
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CARIBOU_FPGA_CHECK_PTR_NOT_NULL(err_map,"caribou_fpga_get_errors","err_map");
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caribou_fpga_opcode_st oc =
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{
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.rw = caribou_fpga_rw_read,
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.mid = caribou_fpga_mid_res,
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.ioc = IOC_SYS_CTRL_SYS_ERR_STAT
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};
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*err_map = 0;
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return caribou_fpga_spi_transfer (dev, (uint8_t*)(&oc), err_map);
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}
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//--------------------------------------------------------------
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int caribou_fpga_set_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t gap)
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{
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@ -397,6 +413,18 @@ int caribou_fpga_set_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t gap)
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return caribou_fpga_spi_transfer (dev, (uint8_t*)(&oc), &gap);
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}
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int caribou_fpga_set_sys_ctrl_tx_control_word (caribou_fpga_st* dev, uint8_t word)
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{
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CARIBOU_FPGA_CHECK_DEV(dev,"caribou_fpga_set_sys_ctrl_tx_control_word");
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caribou_fpga_opcode_st oc =
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{
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.rw = caribou_fpga_rw_write,
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.mid = caribou_fpga_mid_sys_ctrl,
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.ioc = IOC_SYS_CTRL_SYS_CTRL_WORD,
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};
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return caribou_fpga_spi_transfer (dev, (uint8_t*)(&oc), &word);
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}
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//--------------------------------------------------------------
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int caribou_fpga_get_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t *gap)
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{
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@ -153,6 +153,7 @@ int caribou_fpga_set_debug_modes (caribou_fpga_st* dev, bool dbg_fifo_push, bool
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int caribou_fpga_set_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t gap);
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int caribou_fpga_get_sys_ctrl_tx_sample_gap (caribou_fpga_st* dev, uint8_t *gap);
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int caribou_fpga_set_sys_ctrl_tx_control_word (caribou_fpga_st* dev, uint8_t word);
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// I/O Controller
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int caribou_fpga_set_io_ctrl_mode (caribou_fpga_st* dev, uint8_t debug_mode, caribou_fpga_io_ctrl_rfm_en rfm);
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@ -175,6 +176,8 @@ int caribou_fpga_get_smi_ctrl_fifo_status (caribou_fpga_st* dev, caribou_fpga_sm
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int caribou_fpga_set_smi_channel (caribou_fpga_st* dev, caribou_fpga_smi_channel_en channel);
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int caribou_fpga_set_smi_ctrl_data_direction (caribou_fpga_st* dev, uint8_t dir);
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int caribou_fpga_get_debug (caribou_fpga_st* dev, uint8_t *err_map);
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#ifdef __cplusplus
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}
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#endif
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Plik diff jest za duży
Load Diff
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@ -25,6 +25,7 @@ static float sample_rate_middles[] = {3000, 1666, 1166, 900, 733, 583, 450};
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static float rx_bandwidth_middles[] = {225, 281, 356, 450, 562, 706, 893, 1125, 1406, 1781, 2250};
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static float tx_bandwidth_middles[] = {90, 112, 142, 180, 225, 282, 357, 450, 562, 712, 900};
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int cariboulite_radio_set_modem_state(cariboulite_radio_state_st* radio, cariboulite_radio_state_cmd_en state);
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void cariboulite_radio_debug(cariboulite_radio_state_st* radio)
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{
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@ -34,8 +35,8 @@ void cariboulite_radio_debug(cariboulite_radio_state_st* radio)
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at86rf215_iq_interface_config_st cfg;
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at86rf215_get_iq_if_cfg(&radio->sys->modem,&cfg,1);
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uint8_t debug_word = 0;
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//caribou_fpga_get_debug (&radio->sys->fpga, &debug_word);
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uint8_t debug_word;
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caribou_fpga_get_debug (&radio->sys->fpga, &debug_word);
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printf("debug word vale %02X\n",(int)debug_word);
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}
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@ -1080,7 +1081,7 @@ static int cariboulite_radio_tx_prep(cariboulite_radio_state_st* radio)
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int cariboulite_radio_activate_channel(cariboulite_radio_state_st* radio,
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cariboulite_channel_dir_en dir,
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bool activate)
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{
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{
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int ret = 0;
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radio->channel_direction = dir;
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radio->active = activate;
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@ -1088,6 +1089,7 @@ int cariboulite_radio_activate_channel(cariboulite_radio_state_st* radio,
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ZF_LOGD("Activating channel %d, dir = %s, activate = %d", radio->type, radio->channel_direction==cariboulite_channel_dir_rx?"RX":"TX", activate);
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// then deactivate the modem's stream
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cariboulite_radio_set_modem_state(radio, cariboulite_radio_state_cmd_trx_off);
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.radio24_mode = at86rf215_iq_if_mode,
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.clock_skew = at86rf215_iq_clock_data_skew_4_906ns,
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};
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at86rf215_setup_iq_if(&radio->sys->modem, &modem_iq_config);
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at86rf215_setup_iq_if(&radio->sys->modem, &modem_iq_config);
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// if its an LO frequency output from the mixer - no need for modem output
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// LO applicable only to the channel with the mixer
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if (radio->lo_output &&
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1, 0x3F);
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// transition to state TX
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cariboulite_radio_set_modem_state(radio, cariboulite_radio_state_cmd_tx);
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//cariboulite_radio_set_modem_state(radio, cariboulite_radio_state_cmd_tx);
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}
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else
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{
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// apply the state
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caribou_smi_set_driver_streaming_state(&radio->sys->smi, smi_stream_tx_channel);
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// ACTIVATION STEPS
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//caribou_fpga_set_sys_ctrl_tx_control_word(&radio->sys->fpga, 0x0); // send zero frames to the radio
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if(cariboulite_radio_tx_prep(radio))
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{
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return -1;
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}
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}
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usleep(100); // wait at least tx_start_delay
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caribou_fpga_set_sys_ctrl_tx_control_word(&radio->sys->fpga, 0x01);
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}
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}
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return 0;
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