diff --git a/.gitignore b/.gitignore index 30f4015..b643efb 100644 --- a/.gitignore +++ b/.gitignore @@ -2,5 +2,12 @@ /**/build/* /**/nbproject/* !/**/nbproject/*.xml -/**/dist/* +/**/[Ff]ree/production/* +/**/[Pp]ro/production/* /**/.generated_files/* + +# Uncomment these to include hex/elf files +!/**/[Ff]ree/production/*.hex +#!/**/[Ff]ree/production/*.elf +!/**/[Pp]ro/production/*.hex +#!/**/[Pp]ro/production/*.elf \ No newline at end of file diff --git a/.main-meta/main.json b/.main-meta/main.json index 6344750..9848f16 100644 --- a/.main-meta/main.json +++ b/.main-meta/main.json @@ -4,8 +4,8 @@ "content": { "metaDataVersion": "1.3.0", "name": "com.microchip.mcu8.mplabx.project.avr128db48-basic-uart-comms-mcc", - "version": " ", - "displayName": "", + "version": "1.0.0", + "displayName": "AVR128DB48 Basic Uart Comms", "projectName": "avr128db48-basic-uart-comms-mcc", "shortDescription": "Project is anAVR128DB48 lab covering UART communications", "ide": { @@ -19,12 +19,12 @@ } ], "dfp": { - "name": "", - "semverRange": "" + "name": "AVR-Dx_DFP", + "semverRange": "^2.3.272" }, "configurator": { - "name": "", - "semverRange": "" + "name": "MCC", + "semverRange": ">=5.5.7" }, "device": { "metaDataVersion": "1.0.0", @@ -36,9 +36,9 @@ "versionRange": "*" } }, - "author": "Prasad Aradhya", - "peripherals": [], - "keywords": [], + "author": "Microchip", + "peripherals": ["USART"], + "keywords": ["USART","UART","MCC","Melody", "INT"], "additionalData": { "longDescription": { "metaDataVersion": "1.0.0", diff --git a/README.md b/README.md index b04b024..f562c5e 100644 --- a/README.md +++ b/README.md @@ -2,41 +2,220 @@ [![MCHP](images/microchip.png)](https://www.microchip.com) -# Update the title for avr128db48-basic-uart-comms-mcc here - +# Basic Bidirectional UART Communication Using the AVR128DB48 +## Overview +This project uses the MPLAB® Code Configurator (MCC) Melody graphical programming tool to configure the AVR128DB48 device populating a Curiosity Nano (Cnano) board to receive and output single ASCII characters over the integrated Serial/CDC port. When the switch on the Cnano board is pressed, a pin change interrupt is triggered and the ASCII character 'S' is transmitted over the Universal Asynchronous Receiver Transmitter (UART), converted to the USB protocol and then displayed in the MPLAB Data Visualizer terminal window. When the ASCII character 'T' (note the capitalization) is entered in the Data Visualizer terminal window, the value is transmitted over USB and then converted to the UART protocol. A UART Receive interrupt will then be triggered and the LED on the Cnano board will toggle ON/OFF. Note that any other character will not generate the interrupt. + +![Basic Bidirectionsl UART Communications](images/mainImage.png) + +**Note:** The following project can be used as a reference for most AVR® devices with some modification. + ## Related Documentation +- [Get Started Now With AVR® Microcontrollers (MCUs)](https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/avr-mcus/get-started-now?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_avrdb&utm_content=avr128db48-basic-uart-comms-mplab-mcc-github&utm_bu=MCU08) - Includes tool installation and other introductory resources +- [AVR128DB48 Device Homepage](https://www.microchip.com/en-us/product/AVR128DB48?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_avrdb&utm_content=avr128db48-basic-uart-comms-mplab-mcc-github&utm_bu=MCU08) - Includes data sheet and other related documentation +- [Universal Asynchronous Receiver and Transmitter (UART) Peripheral Homepage](https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/core-independent-and-analog-peripherals/communication-connectivity-peripherals/uart-peripherals?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_avrdb&utm_content=avr128db48-basic-uart-comms-mplab-mcc-github&utm_bu=MCU08) - Includes additional reference documentation +- [MCC Melody API Reference for AVR MCU Families Version 14](https://onlinedocs.microchip.com/oxy/GUID-41EA2496-1EE8-4319-A387-9EC9318EF178-en-US-14/GUID-F7F7BDF5-134D-4F8A-B6A7-D368C8DDA312.html) ## Software Used - +- [MPLAB® X IDE 6.1.0](https://www.microchip.com/en-us/tools-resources/develop/mplab-x-ide?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_avrdb&utm_content=avr128db48-basic-uart-comms-mplab-mcc-github&utm_bu=MCU08) or newer +- [MPLAB® XC8 2.41.0](https://www.microchip.com/en-us/tools-resources/develop/mplab-xc-compilers?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_avrdb&utm_content=avr128db48-basic-uart-comms-mplab-mcc-github&utm_bu=MCU08) or newer -- MPLAB® X IDE 6.1.0 or newer [(MPLAB® X IDE 6.1)](https://www.microchip.com/en-us/development-tools-tools-and-software/mplab-x-ide?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_MPAE_Examples&utm_content=avr128db48-basic-uart-comms-mcc-github) -- MPLAB® XC8 2.41.0 or newer compiler [(MPLAB® XC8 2.41)](https://www.microchip.com/en-us/development-tools-tools-and-software/mplab-xc-compilers?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_MPAE_Examples&utm_content=avr128db48-basic-uart-comms-mcc-github) ## Hardware Used - +- [AVR128DB48 Curiosity Nano Evaluation Kit for AVR MCU version](https://www.microchip.com/en-us/development-tool/EV35L43A?utm_source=GitHub&utm_medium=TextLink&utm_campaign=MCU8_MMTCha_avrdb&utm_content=avr128db48-basic-uart-comms-mplab-mcc-github&utm_bu=MCU08) -## Setup +## Hardware Configuration Using the MCC Melody + +Create a new project inside of MPLAB X IDE and open the MPLAB Code Configurator (MCC) Melody plug-in by either clicking the icon at the top of the IDE or by selecting `Tools>Embedded>MPLAB Code Configurator v.x: Open/Close`. + +Once inside the MCC Melody plug-in, add an instance of the UART peripheral from the Device Resources: + +![Add UART Peripherals](images/addUART.png) + +Once added, configure the UART as follows: + +Next, configure the UART by selecting the UART(None) instance in either the **Project Resources** panel or the **Builder** tab to open the **Easy View** window. + +![Select UART(None)](images/selectUART(None).png) + +The AVR128DB48 populating the Cnano board features five USART peripherals. The correct UART must be selected as the hardware that converts the UART signal to and from USB connects to specific pins on the device. Determining which UART and pins to use can be found in the AVR128DB48 Cnano schematic. A link to the schematic is available in the **Kit Window** which should open whenever a Cnano board is connected to the computer and MPLAB X IDE is open or by selecting *Window>Kit Window* inside of the IDE. + + +![Curiosity Nano Kit Window](images/curiosityNanoKitWindow.png) + +The first page of the schematic features a connection interface diagram including the UART and associated pins needed to interface with the integrated Serial/CDC port. In this instance, connect USART3 to pins RB4 for the transmit signal (TX) and RB5 for the receive signal (RX). + +![Curiosity Nano Kit Window](images/curiosityNanoConnections.png) + +Also note that the integrated LED is connected to pin PB3 and the switch is connected to pin PB2. + +Inside **Easy View** select USART3 from the UART PLIB Selector. + + +![Select USART3](images/selectUSART3.png) + + +The image below presents how the **Builder** window will look: + +![USART3 Builder](images/usart3PLIB.png) + +Select the USART3 driver either from the **Project Resources** panel or from the **Builder** window to open the **Easy View** settings in the **USART3** tab. + +![Open USART3 Easy View](images/openingUSART3EasyView.png) + +Inside **Easy View** enable interrupts in the Interrupt Settings section by toggling the Interrupt Driven slider to the ON position and leaving all other settings at their default: + + +![Enable USART3 Interrupts](images/enableUSART3Interrupts.png) + +Select the **USART3PLIB** instance in the **Builder** window to open its **Easy View** and ensure that both Receive and Transmit interrupts have been enabled: + + +![USART3 PLIB Interrupts](images/USART3PLIBInterrupts.png) + +In the **Pin Grid View** pane at the bottom of the Melody interface, connect the USART3 RX2 signal to pin RB5 (package pin #17) and the USART3 TX2 signal to pin RB4 (package pin #16) by clicking the lock icon associated with them: + + +![USART3 Pin Grid View Configuration](images/USART3PinGridView.png) + +Next, configure the pins associated with the Curiosity Nano switch and LED. + +In the **Pin Grid View** pane, connect pin PB2 (package pin #6) that is connected to the switch (SW0) on the Curiosity Nano board as a GPIO input, and pin PB3 (package pin #7) connected to the LED (LED0) as an output by clicking the appropriate grid square for the associated signal: + + +![Connecting Switch and LED pins](images/connectSW0andLED0.png) + + +Go to *Project Resources>System>Pins* to open the associated **Easy View**. + + +![Select Pins](images/selectPins.png) + + In the Custom Name column, rename pin PB2 to "SW0" and pin PB3 to "LED". This will make it easier to navigate and use the generated API. + + +![Rename Pins](images/renamePins.png) + +Note from the Curiosity Nano schematics that the SW0 is active LOW and connected directly to pin PB2 through a current limiting resistor. To eliminate unknown states, the switch pin will need to have a pull-up resistor. The AVR128DB48 device family features integrated *Weak PullUps* which can be enabled by checking the box for the associated pin in the Weak Pullup column of the **Easy View**: + + +![Enabling Weak Pullups](images/enableWeakPullups.png) + +An Input/Sense Configuration (ISC) will be generated when the voltage on the pin associated with SW0 changes. Since the switch on the Curiosity Nano board is active LOW, this means that the switch resting state will be HIGH until pressed. Therefore, the Input/Sense Configuration column setting for the SW0 pin is configured to trigger on the Sense Falling Edge transition of the pin voltage using the drop-down menu: + + +![Enabling Sense Falling Edge](images/negativeISC.png) + +Finally, enable global interrupts to use interrupts on the AVR128DB48, by navigating to *Project Resources>Interrupt Manager*. + +![Interrupt Manager](images/openInterruptManager.png) + +Then select 'Global Interrupt Enable'. + +![Select Global Interrupt Enable](images/selectGIE.png) + + +Click the **Generate** button in the **Project Resources** to generate the API based on the above configurations: + + +![Generate Code](images/generateAPI.png) + + +## Using Interrupts in Generated API + +Navigate to the **Projects** tab in MPLAB X IDE. Locate the `USART3.c` source file by expanding the folders `basicUARTcomms_AVRDB>Source Files>MCC Generated Files>uart>src>usart3.c`. Double click `usart3.c` to open and do the following: + +Scroll down to `USART3_ReceiveISR()`. When the UART detects a received value on its receive (RX) pin, an interrupt will be generated and this section of code will be executed: + + +![USART3 Receive ISR](images/USART3receiveISR.png) + +Inside of the Interrupt Service Routine (ISR), locate the section that reads the received value. This is done using the `regValue` variable to read the contents of the USART3 Receive Register (U2RXB) . + + +![Locating the reg_value Variable](images/locating_regValue.png) + +**Note:** Reading the U2RXB register clears the value inside of the register. + +This variable checks the value received. If it is the character "T", it toggles the LED ON/OFF, but if it isn't, nothing happens. To do this, use the regValue variable along a generated macro called `LED_Toggle()`, based on the unique name given to pin PB3 in the previous section, inside of an `if` statement, as follows: + +` if(regValue == 'T')LED_Toggle();` + +Add the above code immediately below the `regValue = U2RXB;` in the receive ISR: + + +![Using the LED_Toggle() Macro](images/togglingTheLED.png) + + +**Note:** The `LED_Toggle()` macro can be viewed in the `pins.h` header file located in `basicUARTcomms_AVRDB>Header Files>MCC Generated Files>system>pins.h`: + + +![Locating the LED_Toggle Macro](images/locatingLED_Toggle.png) + +Next, configure the SW0 interrupt to transmit the character 'S' over the UART when pressed. Navigate to the `pins.c` file in `basicUARTcomms_AVRDB>Source Files>MCC Generated Files>system>src>pins.c`. Scroll through the file to locate the `SW0_DefaultInterruptHandler()` ISR named after the custom name added to pin PB2 in the previous section: + +![Locating the SW0 ISR](images/SW0_ISR.png) + +Inside the ISR, add the following code to transmit the character 'S' using the `USART3_Write()` when the SW0 is pressed below the commented section: + +` USART3_Write('S');` + + +![Adding the USART3_Write()](images/addingUARTWrite.png) + +To use the `USART3_Write()`, the `USART3.h` file must be added. Scroll to the top of the `pins.c` source file and add the following code immediately below the `#include "../pins.h"` include: + + +` #include "../../uart/USART3.h"` + + +![Including USART3.h](images/includeUSART3header.png) + + + + +Finally, program the AVR128DB48 by hitting the **Make and Program Device Main Project** button at the top of the IDE: + + +![Make and Program Device](images/makeANDprogram.png) - ## Operation - +The Data Visualizer MPLAB X IDE plugin will verify the operation of the project. + + + +Click the **Data Visualizer** button at the top of the IDE to open: + + +![Open Data Visualizer](images/openDataVisualizer.png) + +The Data Visualizer displays the AVR128DB48 Curiosity Nano board and associated COM port. Note that your COM port number may differ from what is shown below. + + +![Data Visualizer](images/dataVisualizer.png) + +The terminal window will be the only one used so the rest can be closed as shown below. Begin communication between the COM port and terminal by hovering the COM port instance and selecting the **Display as text in the terminal** button: + + +![Select Terminal](images/selectTerminal.png) + + +Verify that the USART3 receive interrupt is working by clicking inside of the terminal window and entering the character 'T'. This action toggles the LED on the Curiosity Nano board ON/OFF. Entering any other character should have no effect + +Verify the SW0 interrupt on change by pressing the switch on the Curiosity Nano board. The character 'S' will show as output to the terminal. + + +![Verify Demo](images/verify.gif) + ## Summary - +This example demonstrates basic UART transmit and receive functionality using an AVR128DB48 microcontroller and MPLAB X with MCC melody. diff --git a/basicUARTcomms_AVRDB.X/Makefile b/basicUARTcomms_AVRDB.X/Makefile new file mode 100644 index 0000000..fca8e2c --- /dev/null +++ b/basicUARTcomms_AVRDB.X/Makefile @@ -0,0 +1,113 @@ +# +# There exist several targets which are by default empty and which can be +# used for execution of your targets. These targets are usually executed +# before and after some main targets. They are: +# +# .build-pre: called before 'build' target +# .build-post: called after 'build' target +# .clean-pre: called before 'clean' target +# .clean-post: called after 'clean' target +# .clobber-pre: called before 'clobber' target +# .clobber-post: called after 'clobber' target +# .all-pre: called before 'all' target +# .all-post: called after 'all' target +# .help-pre: called before 'help' target +# .help-post: called after 'help' target +# +# Targets beginning with '.' are not intended to be called on their own. +# +# Main targets can be executed directly, and they are: +# +# build build a specific configuration +# clean remove built files from a configuration +# clobber remove all built files +# all build all configurations +# help print help mesage +# +# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and +# .help-impl are implemented in nbproject/makefile-impl.mk. +# +# Available make variables: +# +# CND_BASEDIR base directory for relative paths +# CND_DISTDIR default top distribution directory (build artifacts) +# CND_BUILDDIR default top build directory (object files, ...) +# CONF name of current configuration +# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration) +# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration) +# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration) +# CND_PACKAGE_DIR_${CONF} directory of package (current configuration) +# CND_PACKAGE_NAME_${CONF} name of package (current configuration) +# CND_PACKAGE_PATH_${CONF} path to package (current configuration) +# +# NOCDDL + + +# Environment +MKDIR=mkdir +CP=cp +CCADMIN=CCadmin +RANLIB=ranlib + + +# build +build: .build-post + +.build-pre: +# Add your pre 'build' code here... + +.build-post: .build-impl +# Add your post 'build' code here... + + +# clean +clean: .clean-post + +.clean-pre: +# Add your pre 'clean' code here... +# WARNING: the IDE does not call this target since it takes a long time to +# simply run make. Instead, the IDE removes the configuration directories +# under build and dist directly without calling make. +# This target is left here so people can do a clean when running a clean +# outside the IDE. + +.clean-post: .clean-impl +# Add your post 'clean' code here... + + +# clobber +clobber: .clobber-post + +.clobber-pre: +# Add your pre 'clobber' code here... + +.clobber-post: .clobber-impl +# Add your post 'clobber' code here... + + +# all +all: .all-post + +.all-pre: +# Add your pre 'all' code here... + +.all-post: .all-impl +# Add your post 'all' code here... + + +# help +help: .help-post + +.help-pre: +# Add your pre 'help' code here... + +.help-post: .help-impl +# Add your post 'help' code here... + + + +# include project implementation makefile +include nbproject/Makefile-impl.mk + +# include project make variables +include nbproject/Makefile-variables.mk diff --git a/basicUARTcomms_AVRDB.X/basicUARTcomms_AVRDB.mc3 b/basicUARTcomms_AVRDB.X/basicUARTcomms_AVRDB.mc3 new file mode 100644 index 0000000..86096cf --- /dev/null +++ b/basicUARTcomms_AVRDB.X/basicUARTcomms_AVRDB.mc3 @@ -0,0 +1,220 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Application Builder + class com.microchip.mcc.melody.module.FrameworkModule + + + CLKCTRL + class com.microchip.mcc.melody.hw.module.HardwareModule + + + CPUINT + class com.microchip.mcc.melody.hw.module.HardwareModule + + + Configuration Bits + class com.microchip.mcc.melody.hw.module.HardwareModule + + + MAIN MANAGER + class com.microchip.mcc.melody.hw.module.HardwareModule + + + Pin Manager + class com.microchip.mcc.melody.hw.module.HardwareModule + + + USART3 + class com.microchip.mcc.melody.hw.module.HardwareModule + + + meta + class com.microchip.mcc.melody.hw.module.HardwareModule + + + module0 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module1 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module14 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module2 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module3 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module4 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module5 + class com.microchip.mcc.melody.script.module.ScriptModule + + + module59 + class com.microchip.mcc.melody.script.module.ScriptModule + + + + + + + + + {"mccDevice":{"loc":"0 0","pos":"0 0"},"systemGroup":{"loc":"171 0","pos":"171 0"},"module14":{"loc":"285.5 -157.48984375","pos":"285.5 -157.48984375"},"module59":{"loc":"505.5 -154.5","pos":"505.5 -154.5"}} + + + + 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files/microchip/xc8/v2.41/avr/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega4/memx-const\libc.a(exit.o) + 0x00000000000005d6 __simulator_exit diff --git a/basicUARTcomms_AVRDB.X/dist/default/production/memoryfile.xml b/basicUARTcomms_AVRDB.X/dist/default/production/memoryfile.xml new file mode 100644 index 0000000..33ac89c --- /dev/null +++ b/basicUARTcomms_AVRDB.X/dist/default/production/memoryfile.xml @@ -0,0 +1,17 @@ + + + + + bytes + 131072 + 1496 + 129576 + + + bytes + 16384 + 47 + 16337 + + + diff --git a/basicUARTcomms_AVRDB.X/main.c b/basicUARTcomms_AVRDB.X/main.c new file mode 100644 index 0000000..a22e806 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/main.c @@ -0,0 +1,47 @@ + /* + * MAIN Generated Driver File + * + * @file main.c + * + * @defgroup main MAIN + * + * @brief This is the generated driver implementation file for the MAIN driver. + * + * @version MAIN Driver Version 1.0.0 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ +#include "mcc_generated_files/system/system.h" + +/* + Main application +*/ + +int main(void) +{ + SYSTEM_Initialize(); + + + while(1) + { + } +} \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/ccp.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/ccp.h new file mode 100644 index 0000000..9045036 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/ccp.h @@ -0,0 +1,72 @@ +/** + * CCP Header File + * + * @file ccp.h + * + * @ingroup config_bitsdriver + * + * @brief This file contains the Configuration Change Protection (CCP) header file for the Configuration bits driver. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef CPU_CCP_H +#define CPU_CCP_H + +#include "../system/utils/compiler.h" +#include "../system/protected_io.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Writes to a CCP-protected 8-bit I/O register. + * @param addr Address of the I/O register. + * @param value Value to be written. + * NOTE: Using IAR Embedded workbench, the choice of memory model has an impact on calling convention. + * Memory model must be defined in the Assembler preprocessor directives to be visible to the preprocessor. + */ +static inline void ccp_write_io(void *addr, uint8_t value) +{ + protected_write_io(addr, CCP_IOREG_gc, value); +} + +/** + * @brief Writes to a CCP-protected 8-bit SPM register. + * @param addr Address of the SPM register. + * @param value Value to be written. + * NOTE: Using IAR Embedded workbench, the choice of memory model has an impacton calling convention. + * Memory model must be defined in the Assembler preprocessor directives to be visible to the preprocessor. + */ +static inline void ccp_write_spm(void *addr, uint8_t value) +{ + protected_write_io(addr, CCP_SPM_gc, value); +} + +#ifdef __cplusplus +} +#endif + +#endif /* CPU_CCP_H */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/clock.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/clock.h new file mode 100644 index 0000000..a970d5b --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/clock.h @@ -0,0 +1,69 @@ +/** + * CLKCTRL Generated Driver API Header File + * + * @file clkctrl.h + * + * @defgroup clkctrl CLKCTRL + * + * @brief This header file provides APIs for the CLKCTRL driver. + * + * @version CLKCTRL Driver Version 1.0.2 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef CLOCK_H +#define CLOCK_H + +#ifndef F_CPU +#define F_CPU 4000000UL +#endif + +#include "ccp.h" + +#define CLKCTRL_TIMEBASE_VALUE ((uint8_t)ceil(F_CPU * 0.000001)) + +/** + * @ingroup clkctrl + * @brief Initialize CLKCTRL module + * @param none + * @return none + */ +void CLOCK_Initialize(void); + +/** + * @ingroup clkctrl + * @brief Enable Clock Failure Detection on main clock + * @param CLKCTRL_CFDSRC_t cfd_source - main clock source for CFD + * @return none + */ +void CFD_Enable(CLKCTRL_CFDSRC_t cfd_source); + +/** + * @ingroup clkctrl + * @brief Disable Clock Failure Detection on main clock + * @param none + * @return none + */ +void CFD_Disable(); + +#endif // CLOCK_H \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/config_bits.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/config_bits.h new file mode 100644 index 0000000..32755f2 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/config_bits.h @@ -0,0 +1,42 @@ +/** + * CONFIGURATION BITS Generated Driver Header File + * + * @file config_bits.h + * + * @defgroup config_bitsdriver Configuration Bits Driver + * + * @brief This file contains the generated header file for the Configuration bits driver. + * + * @version Driver Version 1.0.0 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef CONFIG_BITS_H +#define CONFIG_BITS_H + +#include "../system/clock.h" + +#endif //CONFIG_BITS_H +/** + End of File +*/ \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/interrupt.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/interrupt.h new file mode 100644 index 0000000..2dc2f85 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/interrupt.h @@ -0,0 +1,57 @@ +/** + * Interrupt Manager Generated Driver API Header File. + * + * @file interrupt.h + * + * @defgroup interrupt INTERRUPT + * + * @brief This file contains the API prototype for the Interrupt Manager. + * + * @version Interrupt Manager Driver Version 1.0.0 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef INTERRUPT_H +#define INTERRUPT_H + +#include "../system/utils/compiler.h" +#include "ccp.h" +#include "../system/utils/atomic.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @ingroup interrupt + * @brief Initializes the Interrupt module. + * @retval 0 - Initialization is successful. + */ +int8_t CPUINT_Initialize(); + +#ifdef __cplusplus +} +#endif + +#endif /* INTERRUPT_H */ \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/pins.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/pins.h new file mode 100644 index 0000000..5a00946 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/pins.h @@ -0,0 +1,208 @@ +/** + * Generated Pins header File + * + * @file pins.h + * + * @defgroup pinsdriver Pins Driver + * + * @brief This is generated driver header for pins. + * This header file provides APIs for all pins selected in the GUI. + * + * @version Driver Version 1.1.0 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef PINS_H_INCLUDED +#define PINS_H_INCLUDED + +#include +#include "./port.h" + +//get/set IO_PB1 aliases +#define IO_PB1_SetHigh() do { PORTB_OUTSET = 0x2; } while(0) +#define IO_PB1_SetLow() do { PORTB_OUTCLR = 0x2; } while(0) +#define IO_PB1_Toggle() do { PORTB_OUTTGL = 0x2; } while(0) +#define IO_PB1_GetValue() (VPORTB.IN & (0x1 << 1)) +#define IO_PB1_SetDigitalInput() do { PORTB_DIRCLR = 0x2; } while(0) +#define IO_PB1_SetDigitalOutput() do { PORTB_DIRSET = 0x2; } while(0) +#define IO_PB1_SetPullUp() do { PORTB_PIN1CTRL |= PORT_PULLUPEN_bm; } while(0) +#define IO_PB1_ResetPullUp() do { PORTB_PIN1CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define IO_PB1_SetInverted() do { PORTB_PIN1CTRL |= PORT_INVEN_bm; } while(0) +#define IO_PB1_ResetInverted() do { PORTB_PIN1CTRL &= ~PORT_INVEN_bm; } while(0) +#define IO_PB1_DisableInterruptOnChange() do { PORTB.PIN1CTRL = (PORTB.PIN1CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define IO_PB1_EnableInterruptForBothEdges() do { PORTB.PIN1CTRL = (PORTB.PIN1CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define IO_PB1_EnableInterruptForRisingEdge() do { PORTB.PIN1CTRL = (PORTB.PIN1CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define IO_PB1_EnableInterruptForFallingEdge() do { PORTB.PIN1CTRL = (PORTB.PIN1CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define IO_PB1_DisableDigitalInputBuffer() do { PORTB.PIN1CTRL = (PORTB.PIN1CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define IO_PB1_EnableInterruptForLowLevelSensing() do { PORTB.PIN1CTRL = (PORTB.PIN1CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) +#define PB1_SetInterruptHandler IO_PB1_SetInterruptHandler + +//get/set IO_PB0 aliases +#define IO_PB0_SetHigh() do { PORTB_OUTSET = 0x1; } while(0) +#define IO_PB0_SetLow() do { PORTB_OUTCLR = 0x1; } while(0) +#define IO_PB0_Toggle() do { PORTB_OUTTGL = 0x1; } while(0) +#define IO_PB0_GetValue() (VPORTB.IN & (0x1 << 0)) +#define IO_PB0_SetDigitalInput() do { PORTB_DIRCLR = 0x1; } while(0) +#define IO_PB0_SetDigitalOutput() do { PORTB_DIRSET = 0x1; } while(0) +#define IO_PB0_SetPullUp() do { PORTB_PIN0CTRL |= PORT_PULLUPEN_bm; } while(0) +#define IO_PB0_ResetPullUp() do { PORTB_PIN0CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define IO_PB0_SetInverted() do { PORTB_PIN0CTRL |= PORT_INVEN_bm; } while(0) +#define IO_PB0_ResetInverted() do { PORTB_PIN0CTRL &= ~PORT_INVEN_bm; } while(0) +#define IO_PB0_DisableInterruptOnChange() do { PORTB.PIN0CTRL = (PORTB.PIN0CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define IO_PB0_EnableInterruptForBothEdges() do { PORTB.PIN0CTRL = (PORTB.PIN0CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define IO_PB0_EnableInterruptForRisingEdge() do { PORTB.PIN0CTRL = (PORTB.PIN0CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define IO_PB0_EnableInterruptForFallingEdge() do { PORTB.PIN0CTRL = (PORTB.PIN0CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define IO_PB0_DisableDigitalInputBuffer() do { PORTB.PIN0CTRL = (PORTB.PIN0CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define IO_PB0_EnableInterruptForLowLevelSensing() do { PORTB.PIN0CTRL = (PORTB.PIN0CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) +#define PB0_SetInterruptHandler IO_PB0_SetInterruptHandler + +//get/set SW0 aliases +#define SW0_SetHigh() do { PORTB_OUTSET = 0x4; } while(0) +#define SW0_SetLow() do { PORTB_OUTCLR = 0x4; } while(0) +#define SW0_Toggle() do { PORTB_OUTTGL = 0x4; } while(0) +#define SW0_GetValue() (VPORTB.IN & (0x1 << 2)) +#define SW0_SetDigitalInput() do { PORTB_DIRCLR = 0x4; } while(0) +#define SW0_SetDigitalOutput() do { PORTB_DIRSET = 0x4; } while(0) +#define SW0_SetPullUp() do { PORTB_PIN2CTRL |= PORT_PULLUPEN_bm; } while(0) +#define SW0_ResetPullUp() do { PORTB_PIN2CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define SW0_SetInverted() do { PORTB_PIN2CTRL |= PORT_INVEN_bm; } while(0) +#define SW0_ResetInverted() do { PORTB_PIN2CTRL &= ~PORT_INVEN_bm; } while(0) +#define SW0_DisableInterruptOnChange() do { PORTB.PIN2CTRL = (PORTB.PIN2CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define SW0_EnableInterruptForBothEdges() do { PORTB.PIN2CTRL = (PORTB.PIN2CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define SW0_EnableInterruptForRisingEdge() do { PORTB.PIN2CTRL = (PORTB.PIN2CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define SW0_EnableInterruptForFallingEdge() do { PORTB.PIN2CTRL = (PORTB.PIN2CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define SW0_DisableDigitalInputBuffer() do { PORTB.PIN2CTRL = (PORTB.PIN2CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define SW0_EnableInterruptForLowLevelSensing() do { PORTB.PIN2CTRL = (PORTB.PIN2CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) +#define PB2_SetInterruptHandler SW0_SetInterruptHandler + +//get/set LED aliases +#define LED_SetHigh() do { PORTB_OUTSET = 0x8; } while(0) +#define LED_SetLow() do { PORTB_OUTCLR = 0x8; } while(0) +#define LED_Toggle() do { PORTB_OUTTGL = 0x8; } while(0) +#define LED_GetValue() (VPORTB.IN & (0x1 << 3)) +#define LED_SetDigitalInput() do { PORTB_DIRCLR = 0x8; } while(0) +#define LED_SetDigitalOutput() do { PORTB_DIRSET = 0x8; } while(0) +#define LED_SetPullUp() do { PORTB_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0) +#define LED_ResetPullUp() do { PORTB_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define LED_SetInverted() do { PORTB_PIN3CTRL |= PORT_INVEN_bm; } while(0) +#define LED_ResetInverted() do { PORTB_PIN3CTRL &= ~PORT_INVEN_bm; } while(0) +#define LED_DisableInterruptOnChange() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define LED_EnableInterruptForBothEdges() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define LED_EnableInterruptForRisingEdge() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define LED_EnableInterruptForFallingEdge() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define LED_DisableDigitalInputBuffer() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define LED_EnableInterruptForLowLevelSensing() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) +#define PB3_SetInterruptHandler LED_SetInterruptHandler + +/** + * @ingroup pinsdriver + * @brief GPIO and peripheral I/O initialization + * @param none + * @return none + */ +void PIN_MANAGER_Initialize(); + +/** + * @ingroup pinsdriver + * @brief Default Interrupt Handler for IO_PB1 pin. + * This is a predefined interrupt handler to be used together with the IO_PB1_SetInterruptHandler() method. + * This handler is called every time the IO_PB1 ISR is executed. + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param none + * @return none + */ +void IO_PB1_DefaultInterruptHandler(void); + +/** + * @ingroup pinsdriver + * @brief Interrupt Handler Setter for IO_PB1 pin input-sense-config functionality. + * Allows selecting an interrupt handler for IO_PB1 at application runtime + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param InterruptHandler function pointer. + * @return none + */ +void IO_PB1_SetInterruptHandler(void (* interruptHandler)(void)) ; + +/** + * @ingroup pinsdriver + * @brief Default Interrupt Handler for IO_PB0 pin. + * This is a predefined interrupt handler to be used together with the IO_PB0_SetInterruptHandler() method. + * This handler is called every time the IO_PB0 ISR is executed. + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param none + * @return none + */ +void IO_PB0_DefaultInterruptHandler(void); + +/** + * @ingroup pinsdriver + * @brief Interrupt Handler Setter for IO_PB0 pin input-sense-config functionality. + * Allows selecting an interrupt handler for IO_PB0 at application runtime + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param InterruptHandler function pointer. + * @return none + */ +void IO_PB0_SetInterruptHandler(void (* interruptHandler)(void)) ; + +/** + * @ingroup pinsdriver + * @brief Default Interrupt Handler for SW0 pin. + * This is a predefined interrupt handler to be used together with the SW0_SetInterruptHandler() method. + * This handler is called every time the SW0 ISR is executed. + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param none + * @return none + */ +void SW0_DefaultInterruptHandler(void); + +/** + * @ingroup pinsdriver + * @brief Interrupt Handler Setter for SW0 pin input-sense-config functionality. + * Allows selecting an interrupt handler for SW0 at application runtime + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param InterruptHandler function pointer. + * @return none + */ +void SW0_SetInterruptHandler(void (* interruptHandler)(void)) ; + +/** + * @ingroup pinsdriver + * @brief Default Interrupt Handler for LED pin. + * This is a predefined interrupt handler to be used together with the LED_SetInterruptHandler() method. + * This handler is called every time the LED ISR is executed. + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param none + * @return none + */ +void LED_DefaultInterruptHandler(void); + +/** + * @ingroup pinsdriver + * @brief Interrupt Handler Setter for LED pin input-sense-config functionality. + * Allows selecting an interrupt handler for LED at application runtime + * @pre PIN_MANAGER_Initialize() has been called at least once + * @param InterruptHandler function pointer. + * @return none + */ +void LED_SetInterruptHandler(void (* interruptHandler)(void)) ; +#endif /* PINS_H_INCLUDED */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/port.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/port.h new file mode 100644 index 0000000..541c6b2 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/port.h @@ -0,0 +1,1320 @@ +/** + * Generated Ports header File + * + * @file port.h + * + * @ingroup pinsdriver + * + * @brief This Source file provides APIs. + * + * @version Driver Version 1.0.1 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef PORT_INCLUDED +#define PORT_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +#include "utils/compiler.h" + +/* @ingroup pinsdriver + * @enum port_pull_mode + * Defines the pullup modes. + */ +enum port_pull_mode { + PORT_PULL_OFF, + PORT_PULL_UP, +}; + +/* @ingroup pinsdriver + * @enum port_dir + * Defines the port directions. + */ +enum port_dir { + PORT_DIR_IN, + PORT_DIR_OUT, + PORT_DIR_OFF, +}; + +/** + * @ingroup pinsdriver + * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used. + * @param pin The pin number within port + * @param pull_mode Pin pull mode + * @return none + */ +static inline void PORTA_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin inverted mode, Configure pin invert I/O or not. + * @param pin The pin number within port + * @param inverted Pin inverted mode + * @return none + */ +static inline void PORTA_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * @param The pin number within port + * @param isc PORT_ISC_t + * @return none + */ +static inline void PORTA_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * @ingroup pinsdriver + * @brief Set port data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * @param dir port_dir + * @return none + */ +static inline void PORTA_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTA.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTA.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTA + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param pin The pin number within port + * @param dir port_dir + * @return none + */ +static inline void PORTA_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTA.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTA.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTA + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on the pins defined by the bit mask. + * + * @param mask Bit mask where 1 means apply port level to the corresponding + * pin + * @param level -boolean value that defines the logic state of the pin level + * false = Pin levels set to "low" state + * @return none + */ +static inline void PORTA_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTA.OUT |= mask; + } else { + VPORTA.OUT &= ~mask; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on a pin. + * + * @param pin The pin number within port + * @param level -boolean value that defines the logic state of the pin level + * @return none + */ +static inline void PORTA_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTA.OUT |= (1 << pin); + } else { + VPORTA.OUT &= ~(1 << pin); + } +} + +/** + * @ingroup pinsdriver + * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask. + * + * @param mask Bit mask where 1 means toggle pin level to the corresponding + * pin + * @return none + */ +static inline void PORTA_toggle_port_level(const uint8_t mask) +{ + PORTA.OUTTGL = mask; +} + +/** + * @ingroup pinsdriver + * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask. + * + * @param pin The pin number within port + * @return none + */ +static inline void PORTA_toggle_pin_level(const uint8_t pin) +{ + PORTA.OUTTGL = 1 << pin; +} + +/** + * @ingroup pinsdriver + * @brief Get input level on pins, Read the input level on pins connected to a port. + * + * @param none + * @return none + */ +static inline uint8_t PORTA_get_port_level() +{ + return VPORTA.IN; +} + +/** + * @ingroup pinsdriver + * @brief Get level on pin, Reads the level on pins connected to a port. + * + * @param pin The pin number within port + * @return none + */ +static inline bool PORTA_get_pin_level(const uint8_t pin) +{ + return VPORTA.IN & (1 << pin); +} + +/** + * @ingroup pinsdriver + * @brief Write value to Port, Write directly to the port OUT register. + * + * @param value Value to write to the port register + * @return none + */ +static inline void PORTA_write_port(const uint8_t value) +{ + VPORTA.OUT = value; +} + +/** + * @ingroup pinsdriver + * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used. + * @param pin The pin number within port + * @param pull_mode Pin pull mode + * @return none + */ +static inline void PORTB_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTB + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin inverted mode, Configure pin invert I/O or not. + * @param pin The pin number within port + * @param inverted Pin inverted mode + * @return none + */ +static inline void PORTB_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTB + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * @param The pin number within port + * @param isc PORT_ISC_t + * @return none + */ +static inline void PORTB_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTB + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * @ingroup pinsdriver + * @brief Set port data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * @param dir port_dir + * @return none + */ +static inline void PORTB_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTB.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTB.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTB + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param pin The pin number within port + * @param dir port_dir + * @return none + */ +static inline void PORTB_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTB.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTB.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTB + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on the pins defined by the bit mask. + * + * @param mask Bit mask where 1 means apply port level to the corresponding + * pin + * @param level -boolean value that defines the logic state of the pin level + * false = Pin levels set to "low" state + * @return none + */ +static inline void PORTB_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTB.OUT |= mask; + } else { + VPORTB.OUT &= ~mask; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on a pin. + * + * @param pin The pin number within port + * @param level -boolean value that defines the logic state of the pin level + * @return none + */ +static inline void PORTB_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTB.OUT |= (1 << pin); + } else { + VPORTB.OUT &= ~(1 << pin); + } +} + +/** + * @ingroup pinsdriver + * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask. + * + * @param mask Bit mask where 1 means toggle pin level to the corresponding + * pin + * @return none + */ +static inline void PORTB_toggle_port_level(const uint8_t mask) +{ + PORTB.OUTTGL = mask; +} + +/** + * @ingroup pinsdriver + * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask. + * + * @param pin The pin number within port + * @return none + */ +static inline void PORTB_toggle_pin_level(const uint8_t pin) +{ + PORTB.OUTTGL = 1 << pin; +} + +/** + * @ingroup pinsdriver + * @brief Get input level on pins, Read the input level on pins connected to a port. + * + * @param none + * @return none + */ +static inline uint8_t PORTB_get_port_level() +{ + return VPORTB.IN; +} + +/** + * @ingroup pinsdriver + * @brief Get level on pin, Reads the level on pins connected to a port. + * + * @param pin The pin number within port + * @return none + */ +static inline bool PORTB_get_pin_level(const uint8_t pin) +{ + return VPORTB.IN & (1 << pin); +} + +/** + * @ingroup pinsdriver + * @brief Write value to Port, Write directly to the port OUT register. + * + * @param value Value to write to the port register + * @return none + */ +static inline void PORTB_write_port(const uint8_t value) +{ + VPORTB.OUT = value; +} + +/** + * @ingroup pinsdriver + * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used. + * @param pin The pin number within port + * @param pull_mode Pin pull mode + * @return none + */ +static inline void PORTC_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin inverted mode, Configure pin invert I/O or not. + * @param pin The pin number within port + * @param inverted Pin inverted mode + * @return none + */ +static inline void PORTC_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * @param The pin number within port + * @param isc PORT_ISC_t + * @return none + */ +static inline void PORTC_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * @ingroup pinsdriver + * @brief Set port data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * @param dir port_dir + * @return none + */ +static inline void PORTC_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTC.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTC.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTC + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param pin The pin number within port + * @param dir port_dir + * @return none + */ +static inline void PORTC_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTC.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTC.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTC + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on the pins defined by the bit mask. + * + * @param mask Bit mask where 1 means apply port level to the corresponding + * pin + * @param level -boolean value that defines the logic state of the pin level + * false = Pin levels set to "low" state + * @return none + */ +static inline void PORTC_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTC.OUT |= mask; + } else { + VPORTC.OUT &= ~mask; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on a pin. + * + * @param pin The pin number within port + * @param level -boolean value that defines the logic state of the pin level + * @return none + */ +static inline void PORTC_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTC.OUT |= (1 << pin); + } else { + VPORTC.OUT &= ~(1 << pin); + } +} + +/** + * @ingroup pinsdriver + * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask. + * + * @param mask Bit mask where 1 means toggle pin level to the corresponding + * pin + * @return none + */ +static inline void PORTC_toggle_port_level(const uint8_t mask) +{ + PORTC.OUTTGL = mask; +} + +/** + * @ingroup pinsdriver + * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask. + * + * @param pin The pin number within port + * @return none + */ +static inline void PORTC_toggle_pin_level(const uint8_t pin) +{ + PORTC.OUTTGL = 1 << pin; +} + +/** + * @ingroup pinsdriver + * @brief Get input level on pins, Read the input level on pins connected to a port. + * + * @param none + * @return none + */ +static inline uint8_t PORTC_get_port_level() +{ + return VPORTC.IN; +} + +/** + * @ingroup pinsdriver + * @brief Get level on pin, Reads the level on pins connected to a port. + * + * @param pin The pin number within port + * @return none + */ +static inline bool PORTC_get_pin_level(const uint8_t pin) +{ + return VPORTC.IN & (1 << pin); +} + +/** + * @ingroup pinsdriver + * @brief Write value to Port, Write directly to the port OUT register. + * + * @param value Value to write to the port register + * @return none + */ +static inline void PORTC_write_port(const uint8_t value) +{ + VPORTC.OUT = value; +} + +/** + * @ingroup pinsdriver + * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used. + * @param pin The pin number within port + * @param pull_mode Pin pull mode + * @return none + */ +static inline void PORTD_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin inverted mode, Configure pin invert I/O or not. + * @param pin The pin number within port + * @param inverted Pin inverted mode + * @return none + */ +static inline void PORTD_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * @param The pin number within port + * @param isc PORT_ISC_t + * @return none + */ +static inline void PORTD_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * @ingroup pinsdriver + * @brief Set port data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * @param dir port_dir + * @return none + */ +static inline void PORTD_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTD.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTD.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTD + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param pin The pin number within port + * @param dir port_dir + * @return none + */ +static inline void PORTD_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTD.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTD.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTD + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on the pins defined by the bit mask. + * + * @param mask Bit mask where 1 means apply port level to the corresponding + * pin + * @param level -boolean value that defines the logic state of the pin level + * false = Pin levels set to "low" state + * @return none + */ +static inline void PORTD_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTD.OUT |= mask; + } else { + VPORTD.OUT &= ~mask; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on a pin. + * + * @param pin The pin number within port + * @param level -boolean value that defines the logic state of the pin level + * @return none + */ +static inline void PORTD_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTD.OUT |= (1 << pin); + } else { + VPORTD.OUT &= ~(1 << pin); + } +} + +/** + * @ingroup pinsdriver + * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask. + * + * @param mask Bit mask where 1 means toggle pin level to the corresponding + * pin + * @return none + */ +static inline void PORTD_toggle_port_level(const uint8_t mask) +{ + PORTD.OUTTGL = mask; +} + +/** + * @ingroup pinsdriver + * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask. + * + * @param pin The pin number within port + * @return none + */ +static inline void PORTD_toggle_pin_level(const uint8_t pin) +{ + PORTD.OUTTGL = 1 << pin; +} + +/** + * @ingroup pinsdriver + * @brief Get input level on pins, Read the input level on pins connected to a port. + * + * @param none + * @return none + */ +static inline uint8_t PORTD_get_port_level() +{ + return VPORTD.IN; +} + +/** + * @ingroup pinsdriver + * @brief Get level on pin, Reads the level on pins connected to a port. + * + * @param pin The pin number within port + * @return none + */ +static inline bool PORTD_get_pin_level(const uint8_t pin) +{ + return VPORTD.IN & (1 << pin); +} + +/** + * @ingroup pinsdriver + * @brief Write value to Port, Write directly to the port OUT register. + * + * @param value Value to write to the port register + * @return none + */ +static inline void PORTD_write_port(const uint8_t value) +{ + VPORTD.OUT = value; +} + +/** + * @ingroup pinsdriver + * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used. + * @param pin The pin number within port + * @param pull_mode Pin pull mode + * @return none + */ +static inline void PORTE_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTE + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin inverted mode, Configure pin invert I/O or not. + * @param pin The pin number within port + * @param inverted Pin inverted mode + * @return none + */ +static inline void PORTE_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTE + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * @param The pin number within port + * @param isc PORT_ISC_t + * @return none + */ +static inline void PORTE_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTE + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * @ingroup pinsdriver + * @brief Set port data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * @param dir port_dir + * @return none + */ +static inline void PORTE_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTE.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTE.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTE + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param pin The pin number within port + * @param dir port_dir + * @return none + */ +static inline void PORTE_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTE.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTE.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTE + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on the pins defined by the bit mask. + * + * @param mask Bit mask where 1 means apply port level to the corresponding + * pin + * @param level -boolean value that defines the logic state of the pin level + * false = Pin levels set to "low" state + * @return none + */ +static inline void PORTE_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTE.OUT |= mask; + } else { + VPORTE.OUT &= ~mask; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on a pin. + * + * @param pin The pin number within port + * @param level -boolean value that defines the logic state of the pin level + * @return none + */ +static inline void PORTE_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTE.OUT |= (1 << pin); + } else { + VPORTE.OUT &= ~(1 << pin); + } +} + +/** + * @ingroup pinsdriver + * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask. + * + * @param mask Bit mask where 1 means toggle pin level to the corresponding + * pin + * @return none + */ +static inline void PORTE_toggle_port_level(const uint8_t mask) +{ + PORTE.OUTTGL = mask; +} + +/** + * @ingroup pinsdriver + * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask. + * + * @param pin The pin number within port + * @return none + */ +static inline void PORTE_toggle_pin_level(const uint8_t pin) +{ + PORTE.OUTTGL = 1 << pin; +} + +/** + * @ingroup pinsdriver + * @brief Get input level on pins, Read the input level on pins connected to a port. + * + * @param none + * @return none + */ +static inline uint8_t PORTE_get_port_level() +{ + return VPORTE.IN; +} + +/** + * @ingroup pinsdriver + * @brief Get level on pin, Reads the level on pins connected to a port. + * + * @param pin The pin number within port + * @return none + */ +static inline bool PORTE_get_pin_level(const uint8_t pin) +{ + return VPORTE.IN & (1 << pin); +} + +/** + * @ingroup pinsdriver + * @brief Write value to Port, Write directly to the port OUT register. + * + * @param value Value to write to the port register + * @return none + */ +static inline void PORTE_write_port(const uint8_t value) +{ + VPORTE.OUT = value; +} + +/** + * @ingroup pinsdriver + * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used. + * @param pin The pin number within port + * @param pull_mode Pin pull mode + * @return none + */ +static inline void PORTF_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin inverted mode, Configure pin invert I/O or not. + * @param pin The pin number within port + * @param inverted Pin inverted mode + * @return none + */ +static inline void PORTF_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * @param The pin number within port + * @param isc PORT_ISC_t + * @return none + */ +static inline void PORTF_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * @ingroup pinsdriver + * @brief Set port data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * @param dir port_dir + * @return none + */ +static inline void PORTF_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTF.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTF.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTF + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * @param pin The pin number within port + * @param dir port_dir + * @return none + */ +static inline void PORTF_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTF.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTF.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTF + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on the pins defined by the bit mask. + * + * @param mask Bit mask where 1 means apply port level to the corresponding + * pin + * @param level -boolean value that defines the logic state of the pin level + * false = Pin levels set to "low" state + * @return none + */ +static inline void PORTF_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTF.OUT |= mask; + } else { + VPORTF.OUT &= ~mask; + } +} + +/** + * @ingroup pinsdriver + * @brief Set port level, Sets output level on a pin. + * + * @param pin The pin number within port + * @param level -boolean value that defines the logic state of the pin level + * @return none + */ +static inline void PORTF_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTF.OUT |= (1 << pin); + } else { + VPORTF.OUT &= ~(1 << pin); + } +} + +/** + * @ingroup pinsdriver + * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask. + * + * @param mask Bit mask where 1 means toggle pin level to the corresponding + * pin + * @return none + */ +static inline void PORTF_toggle_port_level(const uint8_t mask) +{ + PORTF.OUTTGL = mask; +} + +/** + * @ingroup pinsdriver + * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask. + * + * @param pin The pin number within port + * @return none + */ +static inline void PORTF_toggle_pin_level(const uint8_t pin) +{ + PORTF.OUTTGL = 1 << pin; +} + +/** + * @ingroup pinsdriver + * @brief Get input level on pins, Read the input level on pins connected to a port. + * + * @param none + * @return none + */ +static inline uint8_t PORTF_get_port_level() +{ + return VPORTF.IN; +} + +/** + * @ingroup pinsdriver + * @brief Get level on pin, Reads the level on pins connected to a port. + * + * @param pin The pin number within port + * @return none + */ +static inline bool PORTF_get_pin_level(const uint8_t pin) +{ + return VPORTF.IN & (1 << pin); +} + +/** + * @ingroup pinsdriver + * @brief Write value to Port, Write directly to the port OUT register. + * + * @param value Value to write to the port register + * @return none + */ +static inline void PORTF_write_port(const uint8_t value) +{ + VPORTF.OUT = value; +} +#ifdef __cplusplus +} +#endif + +#endif /* PORT_INCLUDED */ \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/protected_io.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/protected_io.h new file mode 100644 index 0000000..586576b --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/protected_io.h @@ -0,0 +1,80 @@ +/** + * protected_io Header File + * + * @file protected_io.h + * + * @defgroup doc_driver_system_protected_io Protected IO + * + * @brief This file contains the generated prtected_io header file for the CONFIGURATION BITS. + * + * @version Driver Version 1.0.0 + * + *@{ +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef PROTECTED_IO_H +#define PROTECTED_IO_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(__DOXYGEN__) +//! \name IAR Memory Model defines. +//@{ + +/** + * @def CONFIG_MEMORY_MODEL_TINY + * @brief Configuration symbol to enable 8 bit pointers. + */ +#define CONFIG_MEMORY_MODEL_TINY + +/** + * @def CONFIG_MEMORY_MODEL_SMALL + * @brief Configuration symbol to enable 16 bit pointers. + * NOTE: If no memory model is defined, SMALL is default. + */ +#define CONFIG_MEMORY_MODEL_SMALL + +/** + * @def CONFIG_MEMORY_MODEL_LARGE + * @brief Configuration symbol to enable 24 bit pointers. + */ +#define CONFIG_MEMORY_MODEL_LARGE + +//@} +#endif + +/** + * @brief Writes to an 8-bit I/O register protected by CCP or a protection bit. + * @param addr Address of the I/O register. + * @param magic CCP magic value or Mask for protection bit. + * @param value Value to be written. + * NOTE: Using IAR Embedded workbench, the choice of memory model has an impact on calling convention. + * Memory model must be defined in the Assembler preprocessor directives to be visible to the preprocessor. + */ +extern void protected_write_io(void *addr, uint8_t magic, uint8_t value); + +/** @} */ + +#endif /* PROTECTED_IO_H */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/clock.c b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/clock.c new file mode 100644 index 0000000..63ef8c4 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/clock.c @@ -0,0 +1,99 @@ +/** + * CLKCTRL Generated Driver File + * + * @file clkctrl.c + * + * @ingroup clkctrl + * + * @brief This file contains the driver code for CLKCTRL module. + * + * version CLKCTRL Driver Version 1.1.3 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#include "../clock.h" + +void CLOCK_Initialize(void) +{ + // Set the CLKCTRL module to the options selected in the user interface. + + //CLKOUT disabled; CLKSEL Internal high-frequency oscillator; + ccp_write_io((void*)&(CLKCTRL.MCLKCTRLA),0x0); + + //PDIV 2X; PEN disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKCTRLB),0x0); + + //EXTS disabled; OSC32KS disabled; OSCHFS disabled; PLLS disabled; SOSC disabled; XOSC32KS disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKSTATUS),0x0); + + //RUNSTDBY disabled; + ccp_write_io((void*)&(CLKCTRL.OSC32KCTRLA),0x0); + + //AUTOTUNE disabled; FRQSEL 4 MHz system clock (default); RUNSTDBY disabled; + ccp_write_io((void*)&(CLKCTRL.OSCHFCTRLA),0xC); + + //TUNE 0x0; + ccp_write_io((void*)&(CLKCTRL.OSCHFTUNE),0x0); + + //MULFAC PLL is disabled; RUNSTDBY disabled; SOURCE OSCHF; + ccp_write_io((void*)&(CLKCTRL.PLLCTRLA),0x0); + + //CSUT 1k cycles; ENABLE disabled; LPMODE disabled; RUNSTDBY disabled; SEL disabled; + ccp_write_io((void*)&(CLKCTRL.XOSC32KCTRLA),0x0); + + //CFDEN disabled; CFDSRC CLKMAIN; CFDTST disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKCTRLC),0x0); + + //CFD disabled; INTTYPE INT; + ccp_write_io((void*)&(CLKCTRL.MCLKINTCTRL),0x0); + + //CFD disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKINTFLAGS),0x0); + + //CSUTHF 256; ENABLE disabled; FRQRANGE 8M; RUNSTBY disabled; SELHF XTAL; + ccp_write_io((void*)&(CLKCTRL.XOSCHFCTRLA),0x0); + + + // System clock stability check by polling the status register. + while(!(CLKCTRL.MCLKSTATUS & CLKCTRL_OSCHFS_bm)); + + + // System clock stability check by polling the PLL status. +} + +void CFD_Enable(CLKCTRL_CFDSRC_t cfd_source) +{ + /* Enable Clock Failure Detection on main clock */ + ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, cfd_source | CLKCTRL_CFDEN_bm); +} + +void CFD_Disable() +{ + /* Disable Clock Failure Detection on main clock */ + ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, CLKCTRL.MCLKCTRLC & ~CLKCTRL_CFDEN_bm); +} + + +/** + End of File +*/ \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/config_bits.c b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/config_bits.c new file mode 100644 index 0000000..bdc42b4 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/config_bits.c @@ -0,0 +1,47 @@ +/** + * CONFIGURATION BITS Generated Driver Source File + * + * @file config_bits.c + * + * @ingroup config_bitsdriver + * + * @brief This file contains the generated Device Configuration Bits file. + * + * @version Driver Version 1.0.2 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#include + +/** + * Configures the Fuse bits. + */ +FUSES = +{ + .BODCFG = ACTIVE_DISABLE_gc | LVL_BODLEVEL0_gc | SAMPFREQ_128Hz_gc | SLEEP_DISABLE_gc, + .BOOTSIZE = 0x0, + .CODESIZE = 0x0, + .OSCCFG = CLKSEL_OSCHF_gc, + .SYSCFG0 = CRCSEL_CRC16_gc | CRCSRC_NOCRC_gc | RSTPINCFG_GPIO_gc, + .SYSCFG1 = MVSYSCFG_DUAL_gc | SUT_0MS_gc, + .WDTCFG = PERIOD_OFF_gc | WINDOW_OFF_gc, +}; diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/interrupt.c b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/interrupt.c new file mode 100644 index 0000000..6d9cbc3 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/interrupt.c @@ -0,0 +1,53 @@ +/** + * Interrupt Manager Generated Driver File. + * + * @file interrupt.c + * + * @ingroup interrupt + * + * @brief This file contains the API implementation for the Interrupt Manager. + * + * @version Interrupt Manager Driver Version 1.0.0 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#include "../interrupt.h" + +int8_t CPUINT_Initialize() +{ + /* IVSEL and CVT are Configuration Change Protected */ + + //CVT disabled; IVSEL disabled; LVL0RR disabled; + ccp_write_io((void*)&(CPUINT.CTRLA),0x0); + + //LVL0PRI 0; + CPUINT.LVL0PRI = 0x0; + + //LVL1VEC 0; + CPUINT.LVL1VEC = 0x0; + + ENABLE_INTERRUPTS(); + + return 0; +} \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/pins.c b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/pins.c new file mode 100644 index 0000000..6a1c0c2 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/pins.c @@ -0,0 +1,239 @@ +/** + * Generated Driver File + * + * @file pins.c + * + * @ingroup pinsdriver + * + * @brief This is generated driver implementation for pins. + * This file provides implementations for pin APIs for all pins selected in the GUI. + * + * @version Driver Version 1.1.0 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#include "../pins.h" +#include "../../uart/usart3.h" + +static void (*IO_PB1_InterruptHandler)(void); +static void (*IO_PB0_InterruptHandler)(void); +static void (*SW0_InterruptHandler)(void); +static void (*LED_InterruptHandler)(void); + +void PIN_MANAGER_Initialize() +{ + /* DIR Registers Initialization */ + PORTA.DIR = 0x0; + PORTB.DIR = 0x9; + PORTC.DIR = 0x0; + PORTD.DIR = 0x0; + PORTE.DIR = 0x0; + PORTF.DIR = 0x0; + + /* OUT Registers Initialization */ + PORTA.OUT = 0x0; + PORTB.OUT = 0x1; + PORTC.OUT = 0x0; + PORTD.OUT = 0x0; + PORTE.OUT = 0x0; + PORTF.OUT = 0x0; + + /* PINxCTRL registers Initialization */ + PORTA.PIN0CTRL = 0x0; + PORTA.PIN1CTRL = 0x0; + PORTA.PIN2CTRL = 0x0; + PORTA.PIN3CTRL = 0x0; + PORTA.PIN4CTRL = 0x0; + PORTA.PIN5CTRL = 0x0; + PORTA.PIN6CTRL = 0x0; + PORTA.PIN7CTRL = 0x0; + PORTB.PIN0CTRL = 0x0; + PORTB.PIN1CTRL = 0x0; + PORTB.PIN2CTRL = 0xB; + PORTB.PIN3CTRL = 0x0; + PORTB.PIN4CTRL = 0x0; + PORTB.PIN5CTRL = 0x0; + PORTB.PIN6CTRL = 0x0; + PORTB.PIN7CTRL = 0x0; + PORTC.PIN0CTRL = 0x0; + PORTC.PIN1CTRL = 0x0; + PORTC.PIN2CTRL = 0x0; + PORTC.PIN3CTRL = 0x0; + PORTC.PIN4CTRL = 0x0; + PORTC.PIN5CTRL = 0x0; + PORTC.PIN6CTRL = 0x0; + PORTC.PIN7CTRL = 0x0; + PORTD.PIN0CTRL = 0x0; + PORTD.PIN1CTRL = 0x0; + PORTD.PIN2CTRL = 0x0; + PORTD.PIN3CTRL = 0x0; + PORTD.PIN4CTRL = 0x0; + PORTD.PIN5CTRL = 0x0; + PORTD.PIN6CTRL = 0x0; + PORTD.PIN7CTRL = 0x0; + PORTE.PIN0CTRL = 0x0; + PORTE.PIN1CTRL = 0x0; + PORTE.PIN2CTRL = 0x0; + PORTE.PIN3CTRL = 0x0; + PORTE.PIN4CTRL = 0x0; + PORTE.PIN5CTRL = 0x0; + PORTE.PIN6CTRL = 0x0; + PORTE.PIN7CTRL = 0x0; + PORTF.PIN0CTRL = 0x0; + PORTF.PIN1CTRL = 0x0; + PORTF.PIN2CTRL = 0x0; + PORTF.PIN3CTRL = 0x0; + PORTF.PIN4CTRL = 0x0; + PORTF.PIN5CTRL = 0x0; + PORTF.PIN6CTRL = 0x0; + PORTF.PIN7CTRL = 0x0; + + /* PORTMUX Initialization */ + PORTMUX.ACROUTEA = 0x0; + PORTMUX.CCLROUTEA = 0x0; + PORTMUX.EVSYSROUTEA = 0x0; + PORTMUX.SPIROUTEA = 0x0; + PORTMUX.TCAROUTEA = 0x0; + PORTMUX.TCBROUTEA = 0x0; + PORTMUX.TCDROUTEA = 0x0; + PORTMUX.TWIROUTEA = 0x0; + PORTMUX.USARTROUTEA = 0x0; + PORTMUX.USARTROUTEB = 0x0; + PORTMUX.ZCDROUTEA = 0x0; + + // register default ISC callback functions at runtime; use these methods to register a custom function + IO_PB1_SetInterruptHandler(IO_PB1_DefaultInterruptHandler); + IO_PB0_SetInterruptHandler(IO_PB0_DefaultInterruptHandler); + SW0_SetInterruptHandler(SW0_DefaultInterruptHandler); + LED_SetInterruptHandler(LED_DefaultInterruptHandler); +} + +/** + Allows selecting an interrupt handler for IO_PB1 at application runtime +*/ +void IO_PB1_SetInterruptHandler(void (* interruptHandler)(void)) +{ + IO_PB1_InterruptHandler = interruptHandler; +} + +void IO_PB1_DefaultInterruptHandler(void) +{ + // add your IO_PB1 interrupt custom code + // or set custom function using IO_PB1_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for IO_PB0 at application runtime +*/ +void IO_PB0_SetInterruptHandler(void (* interruptHandler)(void)) +{ + IO_PB0_InterruptHandler = interruptHandler; +} + +void IO_PB0_DefaultInterruptHandler(void) +{ + // add your IO_PB0 interrupt custom code + // or set custom function using IO_PB0_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for SW0 at application runtime +*/ +void SW0_SetInterruptHandler(void (* interruptHandler)(void)) +{ + SW0_InterruptHandler = interruptHandler; +} + +void SW0_DefaultInterruptHandler(void) +{ + // add your SW0 interrupt custom code + // or set custom function using SW0_SetInterruptHandler() + UART3_Write('S'); +} +/** + Allows selecting an interrupt handler for LED at application runtime +*/ +void LED_SetInterruptHandler(void (* interruptHandler)(void)) +{ + LED_InterruptHandler = interruptHandler; +} + +void LED_DefaultInterruptHandler(void) +{ + // add your LED interrupt custom code + // or set custom function using LED_SetInterruptHandler() +} +ISR(PORTA_PORT_vect) +{ + /* Clear interrupt flags */ + VPORTA.INTFLAGS = 0xff; +} + +ISR(PORTB_PORT_vect) +{ + // Call the interrupt handler for the callback registered at runtime + if(VPORTB.INTFLAGS & PORT_INT1_bm) + { + IO_PB1_InterruptHandler(); + } + if(VPORTB.INTFLAGS & PORT_INT0_bm) + { + IO_PB0_InterruptHandler(); + } + if(VPORTB.INTFLAGS & PORT_INT2_bm) + { + SW0_InterruptHandler(); + } + if(VPORTB.INTFLAGS & PORT_INT3_bm) + { + LED_InterruptHandler(); + } + /* Clear interrupt flags */ + VPORTB.INTFLAGS = 0xff; +} + +ISR(PORTC_PORT_vect) +{ + /* Clear interrupt flags */ + VPORTC.INTFLAGS = 0xff; +} + +ISR(PORTD_PORT_vect) +{ + /* Clear interrupt flags */ + VPORTD.INTFLAGS = 0xff; +} + +ISR(PORTE_PORT_vect) +{ + /* Clear interrupt flags */ + VPORTE.INTFLAGS = 0xff; +} + +ISR(PORTF_PORT_vect) +{ + /* Clear interrupt flags */ + VPORTF.INTFLAGS = 0xff; +} + +/** + End of File +*/ \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/protected_io.S b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/protected_io.S new file mode 100644 index 0000000..fa51ec8 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/protected_io.S @@ -0,0 +1,90 @@ +/** + * protected_io Source Code File + * + * @file protected_io.S + * + * @ingroup config_bitsdriver + * + * @brief This file contains the generated protected_io source code file for the CONFIGURATION BITS. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#include "../utils/assembler.h" + +/* + * GNU and IAR use different calling conventions. Since this is + * a very small and simple function to begin with, it's easier + * to implement it twice than to deal with the differences + * within a single implementation. + */ + + PUBLIC_FUNCTION(protected_write_io) + +#if defined(__GNUC__) + +#ifdef RAMPZ + out _SFR_IO_ADDR(RAMPZ), r1 // Clear bits 23:16 of Z +#endif + movw r30, r24 // Load addr into Z + out CCP, r22 // Start CCP handshake + st Z, r20 // Write value to I/O register + ret // Return to caller + +#elif defined(__IAR_SYSTEMS_ASM__) + +# if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \ + && !defined(CONFIG_MEMORY_MODEL_LARGE) +# define CONFIG_MEMORY_MODEL_SMALL +# endif +# if defined(CONFIG_MEMORY_MODEL_LARGE) + ldi r20, 0 + out RAMPZ, r20 // Reset bits 23:16 of Z + movw r30, r16 // Load addr into Z +# elif defined(CONFIG_MEMORY_MODEL_TINY) + ldi r31, 0 // Reset bits 8:15 of Z + mov r30, r16 // Load addr into Z +# else + movw r30, r16 // Load addr into Z +# endif +# if defined(CONFIG_MEMORY_MODEL_TINY) + out CCP, r17 // Start CCP handshake + st Z, r18 // Write value to I/O register +# elif defined(CONFIG_MEMORY_MODEL_SMALL) + out CCP, r18 // Start CCP handshake + st Z, r19 // Write value to I/O register +# elif defined(CONFIG_MEMORY_MODEL_LARGE) + out CCP, r19 // Start CCP handshake + st Z, r20 // Write value to I/O register +# else +# error Unknown memory model in use, no idea how registers should be accessed +# endif + ret +#else +# error Unknown assembler +#endif + + END_FUNC(protected_write_io) + END_FILE() + diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/system.c b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/system.c new file mode 100644 index 0000000..5c8a6de --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/src/system.c @@ -0,0 +1,43 @@ +/** + * System Driver Source File + * + * @file system.c + * + * @ingroup systemdriver + * + * @brief This file contains the API implementation for the System driver. + * + * @version Driver Version 1.0.1 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#include "../system.h" + + +void SYSTEM_Initialize(void) +{ + CLOCK_Initialize(); + PIN_MANAGER_Initialize(); + USART3_Initialize(); + CPUINT_Initialize(); +} + diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/system.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/system.h new file mode 100644 index 0000000..8512903 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/system.h @@ -0,0 +1,61 @@ +/** + * System Driver Header File + * + * @file system.h + * + * @defgroup systemdriver System Driver + * + * @brief This file contains the API prototypes for the System driver. + * + * @version Driver Version 1.0.1 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef MCC_H +#define MCC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "../system/utils/compiler.h" +#include "config_bits.h" +#include "../system/clock.h" +#include "../system/pins.h" +#include "../uart/usart3.h" +#include "../system/interrupt.h" +/** + * @ingroup systemdriver + * @brief Initializes the system module. This routine must be called only once during the system initialization and before any other routine is called. + * @param None. + * @return None. +*/ +void SYSTEM_Initialize(void); + +#ifdef __cplusplus +} +#endif +#endif /* MCC_H */ +/** + End of File +*/ \ No newline at end of file diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler.h new file mode 100644 index 0000000..2ce5066 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler.h @@ -0,0 +1,49 @@ +/** + * Assembler Header File + * + * @file assembler.h + * + * @ingroup config_bitsdriver + * + * @brief This file contains the assembler header file for the configuration bits driver. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef ASSEMBLER_H_INCLUDED +#define ASSEMBLER_H_INCLUDED + +#if !defined(__ASSEMBLER__) && !defined(__IAR_SYSTEMS_ASM__) && !defined(__DOXYGEN__) +#error This file may only be included from assembly files +#endif + +#if defined(__ASSEMBLER__) +#include "assembler/gas.h" +#include +#elif defined(__IAR_SYSTEMS_ASM__) +#include "assembler/iar.h" +#include +#endif + +#endif /* ASSEMBLER_H_INCLUDED */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler/gas.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler/gas.h new file mode 100644 index 0000000..fc78ad7 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler/gas.h @@ -0,0 +1,120 @@ +/** + * GAS Header File + * + * @file gas.h + * + * @ingroup config_bitsdriver + * + * @brief This file contains the generated GAS header file for the Configuration bits driver. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef ASSEMBLER_GAS_H_INCLUDED +#define ASSEMBLER_GAS_H_INCLUDED + +#ifndef __DOXYGEN__ + +/* clang-format off */ + + /* IAR doesn't accept dots in macro names */ + .macro ld_addr, reg, sym + lda.w \reg, \sym + .endm + + /* Define a function \a name that is either globally visible or only + * file-local. + */ + .macro gas_begin_func name, is_public + .if \is_public + .global \name + .endif + #ifdef __XC8 + .section .text.\name, code + #else + .section .text.\name, "ax", @progbits + #endif + .type \name, @function + \name : + .endm + + /* Define a function \a name that is either globally visible or only + * file-local in a given segment. + */ + .macro gas_begin_func_segm name, is_public, segment + .if \is_public + .global \name + .endif + .section .\segment, "ax", @progbits + .type \name, @function + \name : + .endm + + /* Define \a name as a weak alias for the function \a strong_name */ + .macro gas_weak_function_alias name, strong_name + .global \name + .weak \name + .type \name, @function + .set \name, \strong_name + .endm + + /* Define a weak function called \a name */ + .macro gas_weak_function name + .weak \name + gas_begin_func \name 1 + .endm + +#define REPEAT(count) .rept count +#define END_REPEAT() .endr +#define FILL_BYTES(count) .fill count +#define SET_LOC(offset) .org offset +#define L(name) .L##name +#define EXTERN_SYMBOL(name) + +#define TEXT_SECTION(name) \ + .section name, "ax", @progbits +#define RODATA_SECTION(name) \ + .section name, "a", @progbits +#define DATA_SECTION(name) \ + .section name, "aw", @progbits +#define BSS_SECTION(name) \ + .section name, "aw", @nobits + +#define FUNCTION(name) gas_begin_func name 0 +#define PUBLIC_FUNCTION(name) gas_begin_func name 1 +#define PUBLIC_FUNCTION_SEGMENT(name, segment) \ + gas_begin_func_segm name 1 segment +#define WEAK_FUNCTION(name) gas_weak_function name +#define WEAK_FUNCTION_ALIAS(name, strong_name) \ + gas_weak_function_alias name strong_name +#define END_FUNC(name) \ + .size name, . - name + +#define END_FILE() + +/* clang-format on */ + +#endif /* __DOXYGEN__ */ + +#endif /* ASSEMBLER_GAS_H_INCLUDED */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler/iar.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler/iar.h new file mode 100644 index 0000000..d4ba634 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/assembler/iar.h @@ -0,0 +1,104 @@ +/** + * IAR Header File + * + * @file iar.h + * + * @ingroup config_bitsdriver + * + * @brief This file contains the generated IAR header file for the Configuration bits driver. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef ASSEMBLER_IAR_H_INCLUDED +#define ASSEMBLER_IAR_H_INCLUDED + +/* clang-format off */ + +ld_addr MACRO reg, sym + mov reg, LWRD sym + orh reg, HWRD sym + ENDM + +call MACRO sym + rcall sym + ENDM + +iar_begin_func MACRO name, sect, is_public, is_weak + MODULE name + RSEG CODE:CODE:NOROOT(1) + IF is_weak == 1 + PUBWEAK name + ELSEIF is_public + PUBLIC name + ENDIF +name: + ENDM + +iar_begin_func_segm MACRO name, sect, is_public, is_weak, segment + MODULE name + RSEG segment:CODE:NOROOT(1) + IF is_weak == 1 + PUBWEAK name + ELSEIF is_public + PUBLIC name + ENDIF +name: + ENDM + +iar_weak_alias MACRO name, strong_name + PUBWEAK name +name: + rjmp strong_name + ENDM + +#define lo(x) LWRD x +#define hi(x) HWRD x + +#define REPEAT(count) REPT count +#define END_REPEAT() ENDR +#define SET_LOC(offset) ORG offset +#define END_FILE() END + +#define FILL_BYTES(count) DS8 count + +#define L(name) name +#define EXTERN_SYMBOL(name) EXTERN name +#define FUNCTION(name) iar_begin_func name, text_##name, 0, 0 +#define PUBLIC_FUNCTION(name) iar_begin_func name, text_##name, 1, 0 +#define PUBLIC_FUNCTION_SEGMENT(name, segment) \ + iar_begin_func_segm name, text_##name, 1, 0, segment +#define WEAK_FUNCTION(name) iar_begin_func name, text_##name, 1, 1 +#define WEAK_FUNCTION_ALIAS(name, strong_name) \ + iar_weak_alias name, strong_name +#define END_FUNC(name) ENDMOD + +#define TEXT_SECTION(name) RSEG name:CODE:NOROOT +#define RODATA_SECTION(name) RSEG name:CONST:NOROOT +#define DATA_SECTION(name) RSEG name:DATA:NOROOT +#define BSS_SECTION(name) RSEG name:DATA:NOROOT + +/* clang-format on */ + +#endif /* ASSEMBLER_IAR_H_INCLUDED */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/atomic.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/atomic.h new file mode 100644 index 0000000..c298b95 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/atomic.h @@ -0,0 +1,87 @@ +/** + * CONFIGURATION BITS Generated Atomic Header File + * + * @file atomic.h + * + * @defgroup doc_driver_utils_atomic Atomic memory access and critical sections + * + * @brief This file contains the atomic memory access and critical sections header file for the configuration bits driver. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef ATOMIC_H +#define ATOMIC_H + +/* clang-format off */ + +#if defined(__GNUC__) || defined (__DOXYGEN__) + +/** + * @brief Enters critical region. Saves the contents of the status register, including the Global Interrupt Enable bit, so that it can be restored upon leaving the critical region. + * Thereafter, clears the Global Interrupt Enable Bit.This macro takes a parameter P that is unused for the GCC compiler,but necessary for code compatibility with the IAR compiler. + * The IAR compiler declares a variable with the name of the parameter forholding the SREG value. + * Compilation will fail when the variable declared in the macro is not unique within the scope that the critical region is declared within. + * @param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG. + */ + +#define ENTER_CRITICAL(UNUSED) __asm__ __volatile__ ( \ + "in __tmp_reg__, __SREG__" "\n\t" \ + "cli" "\n\t" \ + "push __tmp_reg__" "\n\t" \ + ::: "memory" \ + ) + +/** + * @brief Exits a critical region. Restores the contents of the status register, including the Global Interrupt Enable bit, as it was when entering the critical region. + * This macro takes a parameter P that is unused for the GCC compiler, but necessary for code compatibility with the IAR compiler. + * The IAR compiler uses this parameter as the name of a variable that holds the SREG value. + * The parameter must be identical to the parameter used in the corresponding ENTER_CRITICAL(). + * @param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG + */ + +#define EXIT_CRITICAL(UNUSED) __asm__ __volatile__ ( \ + "pop __tmp_reg__" "\n\t" \ + "out __SREG__, __tmp_reg__" "\n\t" \ + ::: "memory" \ + ) + +#define DISABLE_INTERRUPTS() __asm__ __volatile__ ( "cli" ::: "memory") +#define ENABLE_INTERRUPTS() __asm__ __volatile__ ( "sei" ::: "memory") + +#elif defined(__ICCAVR__) + +#define ENTER_CRITICAL(P) unsigned char P = __save_interrupt();__disable_interrupt(); +#define EXIT_CRITICAL(P) __restore_interrupt(P); + +#define DISABLE_INTERRUPTS() __disable_interrupt(); +#define ENABLE_INTERRUPTS() __enable_interrupt(); + +#else +# error Unsupported compiler. +#endif + +/* clang-format on */ + +#endif /* ATOMIC_H */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/compiler.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/compiler.h new file mode 100644 index 0000000..fba02a0 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/compiler.h @@ -0,0 +1,72 @@ +/** + * Compiler Header File + * + * @file compiler.h + * + * @defgroup doc_driver_utils_compiler Compiler abstraction + * + * @brief This file contains the compiler abstraction layer and code utilities for 8-bit AVR. This module provides various abstraction layers and utilities to make code compatible between different compilers. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + + +#ifndef UTILS_COMPILER_H +#define UTILS_COMPILER_H + +#if defined(__GNUC__) +#include +#include +#if defined(__XC8__) +#include +#endif +#elif defined(__ICCAVR__) +#define ENABLE_BIT_DEFINITIONS 1 +#include +#include + +#ifndef CCP_IOREG_gc +#define CCP_IOREG_gc 0xD8 /* CPU_CCP_IOREG_gc */ +#endif +#ifndef CCP_SPM_gc +#define CCP_SPM_gc 0x9D /* CPU_CCP_SPM_gc */ +#endif + +#else +#error Unsupported compiler. +#endif + +#include +#include +#include +#include + +#include "interrupt_avr8.h" + +/** + * @def UNUSED + * @brief Marking \a v as a unused parameter or value. + */ +#define UNUSED(v) (void)(v) + +#endif /* UTILS_COMPILER_H */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/interrupt_avr8.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/interrupt_avr8.h new file mode 100644 index 0000000..83b3c62 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/interrupt_avr8.h @@ -0,0 +1,88 @@ +/** + * interrupt_avr8 Header File + * + * @file interrupt_avr8.h + * + * @defgroup doc_driver_utils_interrupts ISR abstraction + * + * @brief Interrupt-related functionality. + * + * @version Driver Version 1.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef UTILS_INTERRUPT_AVR8_H +#define UTILS_INTERRUPT_AVR8_H + +/** + * \weakgroup interrupt_group + * + * @{ + */ + +#ifdef ISR_CUSTOM_H +#include ISR_CUSTOM_H +#else + +/** + * @def ISR + * @brief Define service routine for specified interrupt vector. + * @code + ISR(FOO_vect) + { + ... + } + * @endcode + * + * @param vect Interrupt vector name as found in the device header files. + */ +#if defined(__DOXYGEN__) +#define ISR(vect) +#elif defined(__GNUC__) +#include +#elif defined(__ICCAVR__) +#define __ISR(x) _Pragma(#x) +#define ISR(vect) __ISR(vector = vect) __interrupt void handler_##vect(void) +#endif +#endif // ISR_CUSTOM_H + +#ifdef __GNUC__ +#define cpu_irq_enable() sei() +#define cpu_irq_disable() cli() +#else +#define cpu_irq_enable() __enable_interrupt() +#define cpu_irq_disable() __disable_interrupt() +#endif + +//! @} + +/** + * \weakgroup interrupt_deprecated_group + * @{ + */ +// Deprecated definitions. +#define Enable_global_interrupt() cpu_irq_enable() +#define Disable_global_interrupt() cpu_irq_disable() +#define Is_global_interrupt_enabled() cpu_irq_is_enabled() +//! @} + +#endif /* UTILS_INTERRUPT_AVR8_H */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/utils.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/utils.h new file mode 100644 index 0000000..eaf3b81 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/utils.h @@ -0,0 +1,52 @@ +/** + * utils Header File + * + * @file system.h + * + * @defgroup doc_driver_utils AVR Code utility functions + * + * @brief This file contains the compiler abstraction layer and code utilities for AVR.This module provides various abstraction layers and utilities to make code compatible between different compilers. + * + * @version Driver Version 1.0.1 + * \{ + * +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef UTILS_H_INCLUDED +#define UTILS_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Retrieve array size + */ +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif /* UTILS_H_INCLUDED */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/utils_assert.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/utils_assert.h new file mode 100644 index 0000000..a278db5 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/system/utils/utils_assert.h @@ -0,0 +1,60 @@ +/** + * utils_assert Header File + * + * @file utils_assert.h + * + * @defgroup doc_driver_utils_assert Functionality for assert + * + * @brief This file contains the generated utils_assert header file for the configuration bits driver. + * + * @version Driver Version 1.0.1 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef _ASSERT_H_INCLUDED +#define _ASSERT_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** + * @brief Assert macro + * Macro used to throw asserts. It can be mapped to different function based on debug level. + * @param[in] condition A condition to be checked; assert is thrown if the given condition is false. + */ + +#ifdef DEBUG +#define ASSERT(condition) \ + if (!(condition)) \ + while (true) \ + ; +#else +#define ASSERT(condition) ((void)0) +#endif + +#ifdef __cplusplus +} +#endif +#endif /* _ASSERT_H_INCLUDED */ diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/src/usart3.c b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/src/usart3.c new file mode 100644 index 0000000..f27a54e --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/src/usart3.c @@ -0,0 +1,391 @@ +/** + * USART3 Generated Driver API Header File + * + * @file usart3.c + * + * @ingroup usart3 + * + * @brief This is the generated driver implementation file for the USART3 driver using + * + * @version USART3 Driver Version 2.0.3 +*/ + +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include "../usart3.h" + +/** + Section: Macro Declarations +*/ + +#define USART3_RX_BUFFER_SIZE (8) //buffer size should be 2^n +#define USART3_RX_BUFFER_MASK (USART3_RX_BUFFER_SIZE - 1) + + + +/** + Section: Driver Interface + */ + +const uart_drv_interface_t UART3 = { + .Initialize = &USART3_Initialize, + .Deinitialize = &USART3_Deinitialize, + .Read = &USART3_Read, + .Write = &USART3_Write, + .IsRxReady = &USART3_IsRxReady, + .IsTxReady = &USART3_IsTxReady, + .IsTxDone = &USART3_IsTxDone, + .TransmitEnable = &USART3_TransmitEnable, + .TransmitDisable = &USART3_TransmitDisable, + .AutoBaudSet = &USART3_AutoBaudSet, + .AutoBaudQuery = &USART3_AutoBaudQuery, + .BRGCountSet = NULL, + .BRGCountGet = NULL, + .BaudRateSet = NULL, + .BaudRateGet = NULL, + .AutoBaudEventEnableGet = NULL, + .ErrorGet = &USART3_ErrorGet, + .TxCompleteCallbackRegister = NULL, + .RxCompleteCallbackRegister = &USART3_RxCompleteCallbackRegister, + .TxCollisionCallbackRegister = NULL, + .FramingErrorCallbackRegister = &USART3_FramingErrorCallbackRegister, + .OverrunErrorCallbackRegister = &USART3_OverrunErrorCallbackRegister, + .ParityErrorCallbackRegister = &USART3_ParityErrorCallbackRegister, + .EventCallbackRegister = NULL, +}; + +/** + Section: USART3 variables +*/ +static volatile uint8_t usart3RxHead = 0; +static volatile uint8_t usart3RxTail = 0; +static volatile uint8_t usart3RxBuffer[USART3_RX_BUFFER_SIZE]; +static volatile usart3_status_t usart3RxStatusBuffer[USART3_RX_BUFFER_SIZE]; +volatile uint8_t usart3RxCount; +static volatile usart3_status_t usart3RxLastError; + +/** + Section: USART3 APIs +*/ +void (*USART3_FramingErrorHandler)(void); +void (*USART3_OverrunErrorHandler)(void); +void (*USART3_ParityErrorHandler)(void); +void (*USART3_RxInterruptHandler)(void); +static void (*USART3_RxCompleteInterruptHandler)(void); + +static void USART3_DefaultFramingErrorCallback(void); +static void USART3_DefaultOverrunErrorCallback(void); +static void USART3_DefaultParityErrorCallback(void); +void USART3_ReceiveISR(void); + + + +/** + Section: USART3 APIs +*/ + +void USART3_Initialize(void) +{ + USART3_RxInterruptHandler = USART3_ReceiveISR; + // Set the USART3 module to the options selected in the user interface. + + //BAUD 1666; + USART3.BAUD = (uint16_t)USART3_BAUD_RATE(9600); + + // ABEIE disabled; DREIE disabled; LBME disabled; RS485 DISABLE; RXCIE enabled; RXSIE enabled; TXCIE disabled; + USART3.CTRLA = 0x90; + + // MPCM disabled; ODME disabled; RXEN enabled; RXMODE NORMAL; SFDEN disabled; TXEN enabled; + USART3.CTRLB = 0xC0; + + // CMODE Asynchronous Mode; UCPHA enabled; UDORD disabled; CHSIZE Character size: 8 bit; PMODE No Parity; SBMODE 1 stop bit; + USART3.CTRLC = 0x3; + + //DBGRUN disabled; + USART3.DBGCTRL = 0x0; + + //IREI disabled; + USART3.EVCTRL = 0x0; + + //RXPL 0x0; + USART3.RXPLCTRL = 0x0; + + //TXPL 0x0; + USART3.TXPLCTRL = 0x0; + + USART3_FramingErrorCallbackRegister(USART3_DefaultFramingErrorCallback); + USART3_OverrunErrorCallbackRegister(USART3_DefaultOverrunErrorCallback); + USART3_ParityErrorCallbackRegister(USART3_DefaultParityErrorCallback); + usart3RxLastError.status = 0; + usart3RxHead = 0; + usart3RxTail = 0; + usart3RxCount = 0; + USART3.CTRLA |= USART_RXCIE_bm; + +} + +void USART3_Deinitialize(void) +{ + USART3.CTRLA &= ~(USART_RXCIE_bm); + USART3.BAUD = 0x00; + USART3.CTRLA = 0x00; + USART3.CTRLB = 0x00; + USART3.CTRLC = 0x00; + USART3.DBGCTRL = 0x00; + USART3.EVCTRL = 0x00; + USART3.RXPLCTRL = 0x00; + USART3.TXPLCTRL = 0x00; +} + +void USART3_Enable(void) +{ + USART3.CTRLB |= USART_RXEN_bm | USART_TXEN_bm; +} + +void USART3_Disable(void) +{ + USART3.CTRLB &= ~(USART_RXEN_bm | USART_TXEN_bm); +} + +void USART3_TransmitEnable(void) +{ + USART3.CTRLB |= USART_TXEN_bm; +} + +void USART3_TransmitDisable(void) +{ + USART3.CTRLB &= ~(USART_TXEN_bm); +} + +void USART3_ReceiveEnable(void) +{ + USART3.CTRLB |= USART_RXEN_bm ; +} + +void USART3_ReceiveDisable(void) +{ + USART3.CTRLB &= ~(USART_RXEN_bm); +} + +void USART3_AutoBaudSet(bool enable) +{ + if(enable) + { + USART3.CTRLB |= USART_RXMODE_gm & (0x02 << USART_RXMODE_gp); + USART3.STATUS |= USART_WFB_bm ; + } + else + { + USART3.CTRLB &= ~(USART_RXMODE_gm); + USART3.STATUS &= ~(USART_BDF_bm); + } +} + +bool USART3_AutoBaudQuery(void) +{ + return (bool)(USART3.STATUS & USART_BDF_bm) ; +} + +bool USART3_IsAutoBaudDetectError(void) +{ + return (bool)(USART3.STATUS & USART_ISFIF_bm) ; +} + +void USART3_AutoBaudDetectErrorReset(void) +{ + USART3.STATUS |= USART_ISFIF_bm ; + USART3_AutoBaudSet(false); + USART3_ReceiveDisable(); + asm("nop"); + asm("nop"); + asm("nop"); + asm("nop"); + USART3_ReceiveEnable(); + USART3_AutoBaudSet(true); +} + +void USART3_ReceiveInterruptEnable(void) +{ + USART3.CTRLA |= USART_RXCIE_bm ; +} +void USART3_ReceiveInterruptDisable(void) +{ + USART3.CTRLA &= ~(USART_RXCIE_bm); +} + +bool USART3_IsRxReady(void) +{ + return (usart3RxCount ? true : false); +} + +bool USART3_IsTxReady(void) +{ + return (bool)(USART3.STATUS & USART_DREIF_bm); +} + +bool USART3_IsTxDone(void) +{ + return (bool)(USART3.STATUS & USART_TXCIF_bm); +} + +size_t USART3_ErrorGet(void) +{ + usart3RxLastError.status = usart3RxStatusBuffer[(usart3RxTail + 1) & USART3_RX_BUFFER_MASK].status; + return usart3RxLastError.status; +} + +uint8_t USART3_Read(void) +{ + uint8_t readValue = 0; + uint8_t tempRxTail; + + readValue = usart3RxBuffer[usart3RxTail]; + tempRxTail = (usart3RxTail + 1) & USART3_RX_BUFFER_MASK; // Buffer size of RX should be in the 2^n + usart3RxTail = tempRxTail; + USART3.CTRLA &= ~(USART_RXCIE_bm); + if(usart3RxCount != 0) + { + usart3RxCount--; + } + USART3.CTRLA |= USART_RXCIE_bm; + + + return readValue; +} + +/* Interrupt service routine for RX complete */ +ISR(USART3_RXC_vect) +{ + USART3_ReceiveISR(); +} + +void USART3_ReceiveISR(void) +{ + uint8_t regValue; + uint8_t tempRxHead; + + usart3RxStatusBuffer[usart3RxHead].status = 0; + + if(USART3.RXDATAH & USART_FERR_bm) + { + usart3RxStatusBuffer[usart3RxHead].ferr = 1; + if(NULL != USART3_FramingErrorHandler) + { + USART3_FramingErrorHandler(); + } + } + if(USART3.RXDATAH & USART_PERR_bm) + { + usart3RxLastError.perr = 1; + if(NULL != USART3_ParityErrorHandler) + { + USART3_ParityErrorHandler(); + } + } + if(USART3.RXDATAH & USART_BUFOVF_bm) + { + usart3RxStatusBuffer[usart3RxHead].oerr = 1; + if(NULL != USART3_OverrunErrorHandler) + { + USART3_OverrunErrorHandler(); + } + } + + regValue = USART3.RXDATAL; + if(regValue == 'T')LED_Toggle(); + + tempRxHead = (usart3RxHead + 1) & USART3_RX_BUFFER_MASK;// Buffer size of RX should be in the 2^n + if (tempRxHead == usart3RxTail) { + // ERROR! Receive buffer overflow + } + else + { + // Store received data in buffer + usart3RxBuffer[usart3RxHead] = regValue; + usart3RxHead = tempRxHead; + + usart3RxCount++; + } + if (USART3_RxCompleteInterruptHandler != NULL) + { + (*USART3_RxCompleteInterruptHandler)(); + } + +} + +void USART3_Write(uint8_t txData) +{ + USART3.TXDATAL = txData; // Write the data byte to the USART. +} +static void USART3_DefaultFramingErrorCallback(void) +{ + +} + +static void USART3_DefaultOverrunErrorCallback(void) +{ + +} + +static void USART3_DefaultParityErrorCallback(void) +{ + +} + +void USART3_FramingErrorCallbackRegister(void (* callbackHandler)(void)) +{ + if(NULL != callbackHandler) + { + USART3_FramingErrorHandler = callbackHandler; + } +} + +void USART3_OverrunErrorCallbackRegister(void (* callbackHandler)(void)) +{ + if(NULL != callbackHandler) + { + USART3_OverrunErrorHandler = callbackHandler; + } +} + +void USART3_ParityErrorCallbackRegister(void (* callbackHandler)(void)) +{ + if(NULL != callbackHandler) + { + USART3_ParityErrorHandler = callbackHandler; + } +} + +void USART3_RxCompleteCallbackRegister(void (* callbackHandler)(void)) +{ + if(NULL != callbackHandler) + { + USART3_RxCompleteInterruptHandler = callbackHandler; + } +} + + + diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/uart_drv_interface.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/uart_drv_interface.h new file mode 100644 index 0000000..9475e50 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/uart_drv_interface.h @@ -0,0 +1,90 @@ +/** + * UART Generated Driver Interface Header File + * + * @file uart_drv_interface.h + * + * @defgroup uart_drv_interface UART_DRV_INTERFACE + * + * @brief This file contains APIs for UART module. + * + * @version UART Driver Version 2.0.1 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef UART_DRV_INTERFACE_H +#define UART_DRV_INTERFACE_H + +/** + Section: Included Files +*/ +#include +#include +#include "uart_types.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + Section: Data Type Definitions +*/ + +/** + @ingroup UART + @struct uart_drv_interface_t + @brief Structure containing the function pointers of UART driver. +*/ +typedef struct { +void (*Initialize)(void); +void (*Deinitialize)(void); +uint8_t (*Read)(void); +void (*Write)(uint8_t); +bool (*IsRxReady)(void); +bool (*IsTxReady)(void); +bool (*IsTxDone)(void); +void (*TransmitEnable)(void); +void (*TransmitDisable)(void); +void (*AutoBaudSet)(bool enable); +bool (*AutoBaudQuery)(void); +bool (*AutoBaudEventEnableGet)(void); +void (*BRGCountSet)(uint32_t brgValue); +uint32_t (*BRGCountGet)(void); +void (*BaudRateSet)(uint32_t baudRate); +uint32_t (*BaudRateGet)(void); +size_t (*ErrorGet)(void); +void (*TxCompleteCallbackRegister)(void (*CallbackHandler) (void)); +void (*RxCompleteCallbackRegister)(void (*CallbackHandler) (void)); +void (*TxCollisionCallbackRegister)(void (*CallbackHandler) (void)); +void (*FramingErrorCallbackRegister)(void (*CallbackHandler) (void)); +void (*OverrunErrorCallbackRegister)(void (*CallbackHandler) (void)); +void (*ParityErrorCallbackRegister)(void (*CallbackHandler) (void)); +void (*EventCallbackRegister)(void (*CallbackHandler) (void)); +}uart_drv_interface_t; + + +#ifdef __cplusplus +} +#endif + +#endif /* UART_DRV_INTERFACE_H */ + diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/uart_types.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/uart_types.h new file mode 100644 index 0000000..29328e6 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/uart_types.h @@ -0,0 +1,81 @@ +/** + * UART Generated Driver Interface Header File + * + * @file uart_types.h + * + * @defgroup uart_types UART_TYPES + * + * @brief This file contains APIs for UART module. + * + * @version UART Driver Version 2.0.0 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef UART_TYPES_H +#define UART_TYPES_H + +/** + Section: Included Files +*/ +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + Section: Data Type Definitions +*/ + +/** +@ingroup uartdriver +@enum UART_STANDARD_BAUDS +@brief This Enum can be used to set UART standard +baud-rates using \ref UARTx_BRGSet function e.g. \ref UART1_BRGSet. +*/ +enum UART_STANDARD_BAUDS{ +UART_110 = 0, +UART_300 = 1, +UART_600 = 2, +UART_1200 = 3, +UART_2400 = 4, +UART_4800 = 5, +UART_9600 = 6, +UART_14400 = 7, +UART_19200 = 8, +UART_38400 = 9, +UART_57600 = 10, +UART_115200 = 11, +UART_230400 = 12, +UART_460800 = 13, +UART_921600 = 14, +}; + + +#ifdef __cplusplus +} +#endif + +#endif /* UART_TYPES_H */ + diff --git a/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/usart3.h b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/usart3.h new file mode 100644 index 0000000..03dc6d0 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/mcc_generated_files/uart/usart3.h @@ -0,0 +1,334 @@ +/** + * USART3 Generated Driver API Header File + * + * @file usart3.h + * + * @defgroup usart3 USART3 + * + * @brief This file contains API prototypes and other datatypes for USART3 module. + * + * @version USART3 Driver Version 2.0.3 +*/ +/* +© [2023] Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip + software and any derivatives exclusively with Microchip products. + You are responsible for complying with 3rd party license terms + applicable to your use of 3rd party software (including open source + software) that may accompany Microchip software. SOFTWARE IS ?AS IS.? + NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS + SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, + MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT + WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY + KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF + MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE + FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S + TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT + EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR + THIS SOFTWARE. +*/ + +#ifndef USART3_H +#define USART3_H + +/** + Section: Included Files + */ + +#include +#include +#include +#include "../system/system.h" +#include "uart_drv_interface.h" + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/* Normal Mode, Baud register value */ +#define USART3_BAUD_RATE(BAUD_RATE) (((float)4000000 * 64 / (16 * (float)BAUD_RATE)) + 0.5) + +#define UART3_interface UART3 + + +#define UART3_Initialize USART3_Initialize +#define UART3_Deinitialize USART3_Deinitialize +#define UART3_Write USART3_Write +#define UART3_Read USART3_Read +#define UART3__IsRxReady USART3_IsRxReady +#define UART3_IsTxReady USART3_IsTxReady +#define UART3_IsTxDone USART3_IsTxDone + +#define UART3_TransmitEnable USART3_TransmitEnable +#define UART3_TransmitDisable USART3_TransmitDisable +#define UART3_AutoBaudSet USART3_AutoBaudSet +#define UART3_AutoBaudQuery USART3_AutoBaudQuery +#define UART3_BRGCountSet (NULL) +#define UART3_BRGCountGet (NULL) +#define UART3_BaudRateSet (NULL) +#define UART3_BaudRateGet (NULL) +#define UART3__AutoBaudEventEnableGet (NULL) +#define UART3_ErrorGet USART3_ErrorGet + +#define UART3_TxCompleteCallbackRegister (NULL) +#define UART3_RxCompleteCallbackRegister USART3_RxCompleteCallbackRegister +#define UART3_TxCollisionCallbackRegister (NULL) +#define UART3_FramingErrorCallbackRegister USART3_FramingErrorCallbackRegister +#define UART3_OverrunErrorCallbackRegister USART3_OverrunErrorCallbackRegister +#define UART3_ParityErrorCallbackRegister USART3_ParityErrorCallbackRegister +#define UART3_EventCallbackRegister (NULL) + + +/** + @ingroup usart3 + @struct usart3_status_t + @breif This is an instance of USART3_STATUS for USART3 module + */ +typedef union { + struct { + uint8_t perr : 1; /** + + + + + + + + mcc_generated_files/system/utils/assembler/iar.h + mcc_generated_files/system/utils/assembler/gas.h + + mcc_generated_files/system/utils/utils.h + mcc_generated_files/system/utils/compiler.h + mcc_generated_files/system/utils/atomic.h + mcc_generated_files/system/utils/interrupt_avr8.h + mcc_generated_files/system/utils/assembler.h + mcc_generated_files/system/utils/utils_assert.h + + mcc_generated_files/system/port.h + mcc_generated_files/system/config_bits.h + mcc_generated_files/system/clock.h + mcc_generated_files/system/interrupt.h + mcc_generated_files/system/pins.h + mcc_generated_files/system/protected_io.h + mcc_generated_files/system/system.h + mcc_generated_files/system/ccp.h + + + mcc_generated_files/uart/uart_types.h + mcc_generated_files/uart/usart3.h + mcc_generated_files/uart/uart_drv_interface.h + + + + + + + + + + mcc_generated_files/system/src/clock.c + mcc_generated_files/system/src/pins.c + mcc_generated_files/system/src/config_bits.c + mcc_generated_files/system/src/system.c + mcc_generated_files/system/src/protected_io.S + mcc_generated_files/system/src/interrupt.c + + + + + mcc_generated_files/uart/src/usart3.c + + + + main.c + + + Makefile + basicUARTcomms_AVRDB.mc3 + + + Makefile + + + + localhost + AVR128DB48 + + + nEdbgTool + XC8 + 2.41 + 3 + + + + + + + + + + + + + + + false + false + + + + + + + false + false + + false + + false + false + false + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/basicUARTcomms_AVRDB.X/nbproject/project.xml b/basicUARTcomms_AVRDB.X/nbproject/project.xml new file mode 100644 index 0000000..0cdfb69 --- /dev/null +++ b/basicUARTcomms_AVRDB.X/nbproject/project.xml @@ -0,0 +1,23 @@ + + + com.microchip.mplab.nbide.embedded.makeproject + + + basicUARTcomms_AVRDB + c0b474c4-0f73-451b-b928-0422652066dc + 0 + ISO-8859-1 + + + + + default + 2 + + + + false + + + + diff --git a/images/SW0_ISR.png b/images/SW0_ISR.png new file mode 100644 index 0000000..4bc2e1c Binary files /dev/null and b/images/SW0_ISR.png differ diff --git a/images/USART3PLIBInterrupts.png b/images/USART3PLIBInterrupts.png new file mode 100644 index 0000000..8493845 Binary files /dev/null and b/images/USART3PLIBInterrupts.png differ diff --git a/images/USART3PinGridView.png b/images/USART3PinGridView.png new file mode 100644 index 0000000..e324b92 Binary files /dev/null and b/images/USART3PinGridView.png differ diff --git a/images/USART3receiveISR.png b/images/USART3receiveISR.png new file mode 100644 index 0000000..521ce7e Binary files /dev/null and b/images/USART3receiveISR.png differ diff --git a/images/addUART.png b/images/addUART.png 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