diff --git a/.main-meta/main.json b/.main-meta/main.json index 61bdc7a..423d6cc 100644 --- a/.main-meta/main.json +++ b/.main-meta/main.json @@ -5,26 +5,26 @@ "metaDataVersion": "1.1.0", "name": "com.microchip.mcu8.mplabx.project.avr128da48-cnano-ws2812-mplab-mcc", "version": "1.0.0", - "displayName": " ", + "displayName": "AVR128DA48 RGB lighting with WS2812 using SPI and CCL", "projectName": "avr128da48-cnano-ws2812-mplab-mcc", - "shortDescription": "", + "shortDescription": "This repository contains an MCC generated code example that interfaces the WS2812 RGB LED with AVR128DA48 microcontroller using CCL, SPI, TCA and EVSYS.", "ide": { "name": "MPLAB X", - "semverRange": "" + "semverRange": ">=5.40.0" }, "compiler": [ { "name": "XC8", - "semverRange": "" + "semverRange": "^2.30.0" } ], "dfp": { - "name": "", - "semverRange": "" + "name": "AVR-Dx", + "semverRange": "1.6.88" }, "configurator": { - "name": "", - "semverRange": "" + "name": "MCC", + "semverRange": "4.0.1" }, "device": { "metaDataVersion": "1.0.0", @@ -32,16 +32,16 @@ "content": { "metaDataVersion": "1.0.0", "category": "com.microchip.device", - "name": "", + "name": "AVR128DA48", "versionRange": "*" } }, - "author": "", + "author": "Microchip", "subcategories": [ ], - "peripherals": [ + "peripherals": [ "SPI", "CCL", "TCA", "EVSYS" ], - "keywords": [ + "keywords": [ "WS2812", "RGB LED", "LED stripe", "RGB", "lighting" ], "additionalData": { "longDescription": { diff --git a/README.md b/README.md index 18d5de3..7d8226a 100644 --- a/README.md +++ b/README.md @@ -1,41 +1,110 @@ -[![MCHP](images/microchip.png)](https://www.microchip.com) +[![MCHP](images/Microchip.png)](https://www.microchip.com) -# Update the title for avr128da48-cnano-ws2812-mplab-mcc here +# AVR128DA48 RGB lighting with WS2812 using SPI and CCL - +This repository provides an MPLAB® X project with an MPLAB® Code Configurator (MCC) generated code example for interfacing the CCL and SPI peripherals with the WS2812 LED. +
The messages compatible with the WS2812 LED are formed from ones and zeros with a specific duration and form. The application translates the messages sent by SPI into messages intelligible by WS2812, using CCL. +
Furthermore, it creates a light game on a WS2812 LED band. +
The peripherals used are: +- Serial Peripheral Interface (SPI) +- Configurable Custom Logic (CCL) +- Timer/Counter Type A (TCA) +- Event System (EVSYS) ## Related Documentation +More details and code examples on the AVR128DA48 can be found at the following links: +- [AVR128DA48 Product Page](https://www.microchip.com/wwwproducts/en/AVR128DA48) +- [AVR128DA48 Code Examples on GitHub](https://github.com/microchip-pic-avr-examples?q=avr128da48) +- [AVR128DA48 Project Examples in START](https://start.atmel.com/#examples/AVR128DA48CuriosityNano) +- [WS2812 Datasheet](https://cdn-shop.adafruit.com/datasheets/WS2812.pdf) - ## Software Used +- MPLAB® X IDE 5.40 or newer [(microchip.com/mplab/mplab-x-ide)](http://www.microchip.com/mplab/mplab-x-ide) +- MPLAB® XC8 2.30 or a newer compiler [(microchip.com/mplab/compilers)](http://www.microchip.com/mplab/compilers) +- MPLAB® Code Configurator (MCC) 4.0.1 or newer [(microchip.com/mplab/mplab-code-configurator)](https://www.microchip.com/mplab/mplab-code-configurator) +- MPLAB® Code Configurator (MCC) Device Libraries 8-bit AVR MCUs 2.5.0 or newer [(microchip.com/mplab/mplab-code-configurator)](https://www.microchip.com/mplab/mplab-code-configurator) +- AVR-Dx 1.6.88 or newer Device Pack - ## Hardware Used - - +- AVR128DA48 Curiosity Nano [(DM164151)](https://www.microchip.com/Developmenttools/ProductDetails/DM164151) +- LED Stripe WS2812 +- 12V Charger/Voltage Source for the LEDs ## Setup +The AVR128DA48 Curiosity Nano Development Board is used as test platform. +
- +The following configurations must be made for this project: + +System clock: 24 MHz + +SPI0: +- Mode: Host +- Clock frequency: 750 kHz + +LUT0: +- IN0: TCA0-WO0 +- IN1: SPI-CLK +- IN2: TCA0-WO2 +- TRUTH table: 0xE0 +- Clock source: CLKPER + +TCA0: +- Single-slope PWM mode +- Compare channel 0: enabled +- Compare channel 2: enabled +- Channel 0 waveform duty cycle: 0.4% +- Channel 2 waveform duty cycle: 0.7% +- Period: 100 us + +EVSYS: +- Event Generators: + - SPI0_CLK: CHANNEL0 +- Event Users: + - CHANNEL 0: TCA0CNTB + + +|Pin | Configuration | +| :--------------: | :----------------: | +|PA0 (TCA0-WO0) | Digital Output | +|PA2 (TCA0-WO2) | Digital Output | +|PA3 (LUT0_OUT) | Digital Output | +|PA4 (SPI0-MOSI) | Digital Output | +|PA6 (SPI0-CLK) | Digital Output | + +
**Note:** Only PA3(LUT0_OUT) will be used to transmit data to the WS2812 LED. The rest of the pins are routed outside for visualization of intermediary signals. ## Operation + 1. Connect the board to the PC. - + 2. Open the avr128da48-cnano-ws2812-mplab-mcc.X project in MPLAB® X IDE. + + 3. Set the avr128da48-cnano-ws2812-mplab-mcc.X project as main project. Right click the project in the **Projects** tab and click **Set as Main Project**. +
+ + 4. Clean and build the avr128da48-cnano-ws2812-mplab-mcc.X project: right click the **avr128da48-cnano-ws2812-mplab-mcc.X** project and select **Clean and Build**. +
+ + 5. Select **AVR128DA48 Curiosity Nano** in the Connected Hardware Tool section of the project settings: + - Right click the project and click **Properties**; + - Click the arrow right next to Connected Hardware Tool; + - Select AVR128DA48 Curiosity Nano (click the **SN**), click **Apply** and then click **OK**: + +
+ + 6. Program the project to the board: right click the project and click **Make and Program Device**. +
+ +Demo: +
The output waveforms are shown in the figure below. SPI_MOSI is the data sent through SPI and the LUT0_OUT is the translated message, intelligible by WS2812 LED. +
+ +The light game is created on a LED strip which allows control of LEDs in groups of 3. The LED groups are lit from one end to another continuously. +
+
**Note:** The number of LEDs (groups of LEDs) must be configured in firmware. See `NUMBER_OF_LEDS` macro define. ## Summary - - +The demo shows how to interface WS2812 LED with the SPI peripheral using CCL and TCA. diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/Makefile b/avr128da48-cnano-ws2812-mplab-mcc.X/Makefile new file mode 100644 index 0000000..fca8e2c --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/Makefile @@ -0,0 +1,113 @@ +# +# There exist several targets which are by default empty and which can be +# used for execution of your targets. These targets are usually executed +# before and after some main targets. They are: +# +# .build-pre: called before 'build' target +# .build-post: called after 'build' target +# .clean-pre: called before 'clean' target +# .clean-post: called after 'clean' target +# .clobber-pre: called before 'clobber' target +# .clobber-post: called after 'clobber' target +# .all-pre: called before 'all' target +# .all-post: called after 'all' target +# .help-pre: called before 'help' target +# .help-post: called after 'help' target +# +# Targets beginning with '.' are not intended to be called on their own. +# +# Main targets can be executed directly, and they are: +# +# build build a specific configuration +# clean remove built files from a configuration +# clobber remove all built files +# all build all configurations +# help print help mesage +# +# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and +# .help-impl are implemented in nbproject/makefile-impl.mk. +# +# Available make variables: +# +# CND_BASEDIR base directory for relative paths +# CND_DISTDIR default top distribution directory (build artifacts) +# CND_BUILDDIR default top build directory (object files, ...) +# CONF name of current configuration +# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration) +# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration) +# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration) +# CND_PACKAGE_DIR_${CONF} directory of package (current configuration) +# CND_PACKAGE_NAME_${CONF} name of package (current configuration) +# CND_PACKAGE_PATH_${CONF} path to package (current configuration) +# +# NOCDDL + + +# Environment +MKDIR=mkdir +CP=cp +CCADMIN=CCadmin +RANLIB=ranlib + + +# build +build: .build-post + +.build-pre: +# Add your pre 'build' code here... + +.build-post: .build-impl +# Add your post 'build' code here... + + +# clean +clean: .clean-post + +.clean-pre: +# Add your pre 'clean' code here... +# WARNING: the IDE does not call this target since it takes a long time to +# simply run make. Instead, the IDE removes the configuration directories +# under build and dist directly without calling make. +# This target is left here so people can do a clean when running a clean +# outside the IDE. + +.clean-post: .clean-impl +# Add your post 'clean' code here... + + +# clobber +clobber: .clobber-post + +.clobber-pre: +# Add your pre 'clobber' code here... + +.clobber-post: .clobber-impl +# Add your post 'clobber' code here... + + +# all +all: .all-post + +.all-pre: +# Add your pre 'all' code here... + +.all-post: .all-impl +# Add your post 'all' code here... + + +# help +help: .help-post + +.help-pre: +# Add your pre 'help' code here... + +.help-post: .help-impl +# Add your post 'help' code here... + + + +# include project implementation makefile +include nbproject/Makefile-impl.mk + +# include project make variables +include nbproject/Makefile-variables.mk diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/MyConfig.mc3 b/avr128da48-cnano-ws2812-mplab-mcc.X/MyConfig.mc3 new file mode 100644 index 0000000..0556723 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/MyConfig.mc3 @@ -0,0 +1,16208 @@ + + + + SPI0 + class com.microchip.mcc.mcu8.modules.spi.tiny_mega_init.SPI + + + CPUINT + class com.microchip.mcc.mcu8.interruptManager.cpuint.CPUINT + + + WDT + class com.microchip.mcc.mcu8.systemManager.tiny_mega_init.wdt.WDT + + + EVSYS + class com.microchip.mcc.mcu8.modules.evsys.avr_da.EVSYS + + + Pin Module + class com.microchip.mcc.mcu8.pinManager.PinManager + + + CPU + class com.microchip.mcc.mcu8.systemManager.tiny_mega_init.cpu.CPU + + + CCL + class com.microchip.mcc.mcu8.modules.ccl.tiny_mega_init.CCL + + + System Module + class com.microchip.mcc.mcu8.systemManager.SystemManager + + + BOD + class com.microchip.mcc.mcu8.systemManager.tiny_mega_init.bod.BOD + + + TCA0 + class com.microchip.mcc.mcu8.modules.tca.tiny_mega_init.TCA + + + SLPCTRL + class com.microchip.mcc.mcu8.systemManager.tiny_mega_init.slpctrl.SLPCTRL + + + RSTCTRL + class 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0000000..8f5955a --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/main.c @@ -0,0 +1,139 @@ +/* + (c) 2020 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#include "mcc_generated_files/mcc.h" +#include + +#define TCA0_Enable() do {TCA0.SINGLE.CTRLA |= TCA_SINGLE_ENABLE_bm;} while(0) +#define TCA0_Disable() do {TCA0.SINGLE.CTRLA &= ~TCA_SINGLE_ENABLE_bm;} while(0) + +#define LED_MAX_BRIGHT 0xFF +#define LED_MIN_BRIGHT 0x00 +#define NUMBER_OF_LEDS 13 +#define DELAY_TIME 100 //milliseconds +#define POSITION_MIN 0 +#define POSITION_MAX (NUMBER_OF_LEDS - 1) + +const uint8_t colorTable[] = +{ + LED_MAX_BRIGHT, LED_MIN_BRIGHT, LED_MIN_BRIGHT, // red + LED_MAX_BRIGHT, LED_MAX_BRIGHT, LED_MIN_BRIGHT, // yellow + LED_MIN_BRIGHT, LED_MAX_BRIGHT, LED_MIN_BRIGHT, // green + LED_MIN_BRIGHT, LED_MAX_BRIGHT, LED_MAX_BRIGHT, // cyan + LED_MIN_BRIGHT, LED_MIN_BRIGHT, LED_MAX_BRIGHT, // blue + LED_MAX_BRIGHT, LED_MIN_BRIGHT, LED_MAX_BRIGHT // purple +}; + +typedef struct +{ + uint8_t redChannel; + uint8_t greenChannel; + uint8_t blueChannel; +} color_t; + +void WalkLight(color_t color); +void LightIntoPosition(color_t color, uint8_t position); +void SetLEDColor(color_t color); +void ClearLEDs(void); + +int main(void) +{ + color_t currentColor; + uint8_t colorIndex = 0; + uint8_t i; + + /* Initializes MCU, drivers and middle ware */ + SYSTEM_Initialize(); + ClearLEDs(); + + _delay_ms(DELAY_TIME); + + while (1) + { + colorIndex = 0; + for(i = 0; i < 6; i++) + { + currentColor.redChannel = colorTable[colorIndex++]; + currentColor.greenChannel = colorTable[colorIndex++]; + currentColor.blueChannel = colorTable[colorIndex++]; + WalkLight(currentColor); + } + } +} + +void WalkLight(color_t color) +{ + uint8_t i; + + for(i = POSITION_MIN; i < POSITION_MAX; i++) + { + LightIntoPosition(color, i); + _delay_ms(DELAY_TIME); + } + + for(i = POSITION_MAX+1; i > POSITION_MIN; i--) + { + LightIntoPosition(color, i-1); + _delay_ms(DELAY_TIME); + } +} + +void LightIntoPosition(color_t color, uint8_t position) +{ + uint8_t i; + color_t off = {LED_MIN_BRIGHT, LED_MIN_BRIGHT, LED_MIN_BRIGHT}; + + for(i = 0; i < position; i++) + { + SetLEDColor(off); + } + + SetLEDColor(color); + + for(i = position + 1; i < NUMBER_OF_LEDS; i++) + { + SetLEDColor(off); + } +} + +void SetLEDColor(color_t color) +{ + TCA0_Enable(); + + SPI0_ExchangeByte(color.redChannel); + SPI0_ExchangeByte(color.blueChannel); + SPI0_ExchangeByte(color.greenChannel); + + TCA0_Disable(); +} + +void ClearLEDs(void) +{ + int i; + color_t off = {LED_MIN_BRIGHT, LED_MIN_BRIGHT, LED_MIN_BRIGHT}; + + for(i = 0; i < NUMBER_OF_LEDS; i++) + { + SetLEDColor(off); + } +} \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/config/clock_config.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/config/clock_config.h new file mode 100644 index 0000000..018e0dc --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/config/clock_config.h @@ -0,0 +1,41 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef CLOCK_CONFIG_H +#define CLOCK_CONFIG_H + +#ifndef F_CPU +#define F_CPU 24000000 +#endif + +#endif // CLOCK_CONFIG_H diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/device_config.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/device_config.c new file mode 100644 index 0000000..0c6101d --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/device_config.c @@ -0,0 +1,49 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include + +/** + * \Configures Fuse bits + */ + +FUSES = +{ + .BODCFG = ACTIVE_DISABLE_gc | LVL_BODLEVEL0_gc | SAMPFREQ_128Hz_gc | SLEEP_DISABLE_gc, + .BOOTSIZE = 0, + .CODESIZE = 0, + .OSCCFG = CLKSEL_OSCHF_gc, + .SYSCFG0 = CRCSEL_CRC16_gc | CRCSRC_NOCRC_gc | RSTPINCFG_GPIO_gc, + .SYSCFG1 = SUT_0MS_gc, + .WDTCFG = PERIOD_OFF_gc | WINDOW_OFF_gc, +}; diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/ccl.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/ccl.h new file mode 100644 index 0000000..0b64ebf --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/ccl.h @@ -0,0 +1,68 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef CCL_H_INCLUDED +#define CCL_H_INCLUDED + +#include "../utils/compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + @Summary + Initializes the CCL_Initialize. + + @Description + This routine initializes the CCL_Initialize. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Example + + CCL_Initialize(); + +*/ +int8_t CCL_Initialize(void); + +#ifdef __cplusplus +} +#endif + +#endif /* CCL_H_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/ccp.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/ccp.h new file mode 100644 index 0000000..9f416a0 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/ccp.h @@ -0,0 +1,82 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef CPU_CCP_H +#define CPU_CCP_H + +#include "../utils/compiler.h" +#include "../include/protected_io.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Write to a CCP-protected 8-bit I/O register + * + * \param addr Address of the I/O register + * \param value Value to be written + * + * \note Using IAR Embedded workbench, the choice of memory model has an impact + * on calling convention. The memory model is not visible to the + * preprocessor, so it must be defined in the Assembler preprocessor directives. + */ +static inline void ccp_write_io(void *addr, uint8_t value) +{ + protected_write_io(addr, CCP_IOREG_gc, value); +} + +/** @} */ + +/** + * \brief Write to CCP-protected 8-bit SPM register + * + * \param addr Address of the SPM register + * \param value Value to be written + * + * \note Using IAR Embedded workbench, the choice of memory model has an impact + * on calling convention. The memory model is not visible to the + * preprocessor, so it must be defined in the Assembler preprocessor directives. + */ +static inline void ccp_write_spm(void *addr, uint8_t value) +{ + protected_write_io(addr, CCP_SPM_gc, value); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CPU_CCP_H */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/cpuint.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/cpuint.h new file mode 100644 index 0000000..67c012c --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/cpuint.h @@ -0,0 +1,54 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef CPUINT_H_INCLUDED +#define CPUINT_H_INCLUDED + +#include "../utils/compiler.h" +#include "ccp.h" +#include "../utils/atomic.h" + +#ifdef __cplusplus +extern "C" { +#endif /** \ + * \brief Initialize cpuint interface \ + * \ + * \return Initialization status \ + */ +int8_t CPUINT_Initialize(); + +#ifdef __cplusplus +} +#endif + +#endif /* CPUINT_H_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/evsys.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/evsys.h new file mode 100644 index 0000000..e34bb0c --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/evsys.h @@ -0,0 +1,68 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef EVSYS_H_INCLUDED +#define EVSYS_H_INCLUDED + +#include "../utils/compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + @Summary + Initializes the EVSYS_Initialize. + + @Description + This routine initializes the EVSYS_Initialize. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Example + + EVSYS_Initialize(); + +*/ +int8_t EVSYS_Initialize(void); + +#ifdef __cplusplus +} +#endif + +#endif /* CCL_H_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/pin_manager.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/pin_manager.h new file mode 100644 index 0000000..b3ac87e --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/pin_manager.h @@ -0,0 +1,240 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef PINS_H_INCLUDED +#define PINS_H_INCLUDED + +#include +#include "port.h" + +//get/set PB3 aliases +#define PB3_SetHigh() do { PORTB_OUTSET = 0x8; } while(0) +#define PB3_SetLow() do { PORTB_OUTCLR = 0x8; } while(0) +#define PB3_Toggle() do { PORTB_OUTTGL = 0x8; } while(0) +#define PB3_GetValue() (VPORTB.IN & (0x1 << 3)) +#define PB3_SetDigitalInput() do { PORTB_DIRCLR = 0x8; } while(0) +#define PB3_SetDigitalOutput() do { PORTB_DIRSET = 0x8; } while(0) +#define PB3_SetPullUp() do { PORTB_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PB3_ResetPullUp() do { PORTB_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PB3_SetInverted() do { PORTB_PIN3CTRL |= PORT_INVEN_bm; } while(0) +#define PB3_ResetInverted() do { PORTB_PIN3CTRL &= ~PORT_INVEN_bm; } while(0) +#define PB3_DisableInterruptOnChange() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PB3_EnableInterruptForBothEdges() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PB3_EnableInterruptForRisingEdge() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PB3_EnableInterruptForFallingEdge() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PB3_DisableDigitalInputBuffer() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PB3_EnableInterruptForLowLevelSensing() do { PORTB.PIN3CTRL = (PORTB.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA2 aliases +#define PA2_SetHigh() do { PORTA_OUTSET = 0x4; } while(0) +#define PA2_SetLow() do { PORTA_OUTCLR = 0x4; } while(0) +#define PA2_Toggle() do { PORTA_OUTTGL = 0x4; } while(0) +#define PA2_GetValue() (VPORTA.IN & (0x1 << 2)) +#define PA2_SetDigitalInput() do { PORTA_DIRCLR = 0x4; } while(0) +#define PA2_SetDigitalOutput() do { PORTA_DIRSET = 0x4; } while(0) +#define PA2_SetPullUp() do { PORTA_PIN2CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA2_ResetPullUp() do { PORTA_PIN2CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA2_SetInverted() do { PORTA_PIN2CTRL |= PORT_INVEN_bm; } while(0) +#define PA2_ResetInverted() do { PORTA_PIN2CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA2_DisableInterruptOnChange() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA2_EnableInterruptForBothEdges() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA2_EnableInterruptForRisingEdge() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA2_EnableInterruptForFallingEdge() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA2_DisableDigitalInputBuffer() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA2_EnableInterruptForLowLevelSensing() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PC3 aliases +#define PC3_SetHigh() do { PORTC_OUTSET = 0x8; } while(0) +#define PC3_SetLow() do { PORTC_OUTCLR = 0x8; } while(0) +#define PC3_Toggle() do { PORTC_OUTTGL = 0x8; } while(0) +#define PC3_GetValue() (VPORTC.IN & (0x1 << 3)) +#define PC3_SetDigitalInput() do { PORTC_DIRCLR = 0x8; } while(0) +#define PC3_SetDigitalOutput() do { PORTC_DIRSET = 0x8; } while(0) +#define PC3_SetPullUp() do { PORTC_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PC3_ResetPullUp() do { PORTC_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PC3_SetInverted() do { PORTC_PIN3CTRL |= PORT_INVEN_bm; } while(0) +#define PC3_ResetInverted() do { PORTC_PIN3CTRL &= ~PORT_INVEN_bm; } while(0) +#define PC3_DisableInterruptOnChange() do { PORTC.PIN3CTRL = (PORTC.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PC3_EnableInterruptForBothEdges() do { PORTC.PIN3CTRL = (PORTC.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PC3_EnableInterruptForRisingEdge() do { PORTC.PIN3CTRL = (PORTC.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PC3_EnableInterruptForFallingEdge() do { PORTC.PIN3CTRL = (PORTC.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PC3_DisableDigitalInputBuffer() do { PORTC.PIN3CTRL = (PORTC.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PC3_EnableInterruptForLowLevelSensing() do { PORTC.PIN3CTRL = (PORTC.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA1 aliases +#define PA1_SetHigh() do { PORTA_OUTSET = 0x2; } while(0) +#define PA1_SetLow() do { PORTA_OUTCLR = 0x2; } while(0) +#define PA1_Toggle() do { PORTA_OUTTGL = 0x2; } while(0) +#define PA1_GetValue() (VPORTA.IN & (0x1 << 1)) +#define PA1_SetDigitalInput() do { PORTA_DIRCLR = 0x2; } while(0) +#define PA1_SetDigitalOutput() do { PORTA_DIRSET = 0x2; } while(0) +#define PA1_SetPullUp() do { PORTA_PIN1CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA1_ResetPullUp() do { PORTA_PIN1CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA1_SetInverted() do { PORTA_PIN1CTRL |= PORT_INVEN_bm; } while(0) +#define PA1_ResetInverted() do { PORTA_PIN1CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA1_DisableInterruptOnChange() do { PORTA.PIN1CTRL = (PORTA.PIN1CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA1_EnableInterruptForBothEdges() do { PORTA.PIN1CTRL = (PORTA.PIN1CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA1_EnableInterruptForRisingEdge() do { PORTA.PIN1CTRL = (PORTA.PIN1CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA1_EnableInterruptForFallingEdge() do { PORTA.PIN1CTRL = (PORTA.PIN1CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA1_DisableDigitalInputBuffer() do { PORTA.PIN1CTRL = (PORTA.PIN1CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA1_EnableInterruptForLowLevelSensing() do { PORTA.PIN1CTRL = (PORTA.PIN1CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA4 aliases +#define PA4_SetHigh() do { PORTA_OUTSET = 0x10; } while(0) +#define PA4_SetLow() do { PORTA_OUTCLR = 0x10; } while(0) +#define PA4_Toggle() do { PORTA_OUTTGL = 0x10; } while(0) +#define PA4_GetValue() (VPORTA.IN & (0x1 << 4)) +#define PA4_SetDigitalInput() do { PORTA_DIRCLR = 0x10; } while(0) +#define PA4_SetDigitalOutput() do { PORTA_DIRSET = 0x10; } while(0) +#define PA4_SetPullUp() do { PORTA_PIN4CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA4_ResetPullUp() do { PORTA_PIN4CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA4_SetInverted() do { PORTA_PIN4CTRL |= PORT_INVEN_bm; } while(0) +#define PA4_ResetInverted() do { PORTA_PIN4CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA4_DisableInterruptOnChange() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA4_EnableInterruptForBothEdges() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA4_EnableInterruptForRisingEdge() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA4_EnableInterruptForFallingEdge() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA4_DisableDigitalInputBuffer() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA4_EnableInterruptForLowLevelSensing() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA3 aliases +#define PA3_SetHigh() do { PORTA_OUTSET = 0x8; } while(0) +#define PA3_SetLow() do { PORTA_OUTCLR = 0x8; } while(0) +#define PA3_Toggle() do { PORTA_OUTTGL = 0x8; } while(0) +#define PA3_GetValue() (VPORTA.IN & (0x1 << 3)) +#define PA3_SetDigitalInput() do { PORTA_DIRCLR = 0x8; } while(0) +#define PA3_SetDigitalOutput() do { PORTA_DIRSET = 0x8; } while(0) +#define PA3_SetPullUp() do { PORTA_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA3_ResetPullUp() do { PORTA_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA3_SetInverted() do { PORTA_PIN3CTRL |= PORT_INVEN_bm; } while(0) +#define PA3_ResetInverted() do { PORTA_PIN3CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA3_DisableInterruptOnChange() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA3_EnableInterruptForBothEdges() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA3_EnableInterruptForRisingEdge() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA3_EnableInterruptForFallingEdge() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA3_DisableDigitalInputBuffer() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA3_EnableInterruptForLowLevelSensing() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA6 aliases +#define PA6_SetHigh() do { PORTA_OUTSET = 0x40; } while(0) +#define PA6_SetLow() do { PORTA_OUTCLR = 0x40; } while(0) +#define PA6_Toggle() do { PORTA_OUTTGL = 0x40; } while(0) +#define PA6_GetValue() (VPORTA.IN & (0x1 << 6)) +#define PA6_SetDigitalInput() do { PORTA_DIRCLR = 0x40; } while(0) +#define PA6_SetDigitalOutput() do { PORTA_DIRSET = 0x40; } while(0) +#define PA6_SetPullUp() do { PORTA_PIN6CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA6_ResetPullUp() do { PORTA_PIN6CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA6_SetInverted() do { PORTA_PIN6CTRL |= PORT_INVEN_bm; } while(0) +#define PA6_ResetInverted() do { PORTA_PIN6CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA6_DisableInterruptOnChange() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA6_EnableInterruptForBothEdges() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA6_EnableInterruptForRisingEdge() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA6_EnableInterruptForFallingEdge() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA6_DisableDigitalInputBuffer() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA6_EnableInterruptForLowLevelSensing() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA5 aliases +#define PA5_SetHigh() do { PORTA_OUTSET = 0x20; } while(0) +#define PA5_SetLow() do { PORTA_OUTCLR = 0x20; } while(0) +#define PA5_Toggle() do { PORTA_OUTTGL = 0x20; } while(0) +#define PA5_GetValue() (VPORTA.IN & (0x1 << 5)) +#define PA5_SetDigitalInput() do { PORTA_DIRCLR = 0x20; } while(0) +#define PA5_SetDigitalOutput() do { PORTA_DIRSET = 0x20; } while(0) +#define PA5_SetPullUp() do { PORTA_PIN5CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA5_ResetPullUp() do { PORTA_PIN5CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA5_SetInverted() do { PORTA_PIN5CTRL |= PORT_INVEN_bm; } while(0) +#define PA5_ResetInverted() do { PORTA_PIN5CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA5_DisableInterruptOnChange() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA5_EnableInterruptForBothEdges() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA5_EnableInterruptForRisingEdge() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA5_EnableInterruptForFallingEdge() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA5_DisableDigitalInputBuffer() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA5_EnableInterruptForLowLevelSensing() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PD3 aliases +#define PD3_SetHigh() do { PORTD_OUTSET = 0x8; } while(0) +#define PD3_SetLow() do { PORTD_OUTCLR = 0x8; } while(0) +#define PD3_Toggle() do { PORTD_OUTTGL = 0x8; } while(0) +#define PD3_GetValue() (VPORTD.IN & (0x1 << 3)) +#define PD3_SetDigitalInput() do { PORTD_DIRCLR = 0x8; } while(0) +#define PD3_SetDigitalOutput() do { PORTD_DIRSET = 0x8; } while(0) +#define PD3_SetPullUp() do { PORTD_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PD3_ResetPullUp() do { PORTD_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PD3_SetInverted() do { PORTD_PIN3CTRL |= PORT_INVEN_bm; } while(0) +#define PD3_ResetInverted() do { PORTD_PIN3CTRL &= ~PORT_INVEN_bm; } while(0) +#define PD3_DisableInterruptOnChange() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PD3_EnableInterruptForBothEdges() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PD3_EnableInterruptForRisingEdge() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PD3_EnableInterruptForFallingEdge() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PD3_DisableDigitalInputBuffer() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PD3_EnableInterruptForLowLevelSensing() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +//get/set PA0 aliases +#define PA0_SetHigh() do { PORTA_OUTSET = 0x1; } while(0) +#define PA0_SetLow() do { PORTA_OUTCLR = 0x1; } while(0) +#define PA0_Toggle() do { PORTA_OUTTGL = 0x1; } while(0) +#define PA0_GetValue() (VPORTA.IN & (0x1 << 0)) +#define PA0_SetDigitalInput() do { PORTA_DIRCLR = 0x1; } while(0) +#define PA0_SetDigitalOutput() do { PORTA_DIRSET = 0x1; } while(0) +#define PA0_SetPullUp() do { PORTA_PIN0CTRL |= PORT_PULLUPEN_bm; } while(0) +#define PA0_ResetPullUp() do { PORTA_PIN0CTRL &= ~PORT_PULLUPEN_bm; } while(0) +#define PA0_SetInverted() do { PORTA_PIN0CTRL |= PORT_INVEN_bm; } while(0) +#define PA0_ResetInverted() do { PORTA_PIN0CTRL &= ~PORT_INVEN_bm; } while(0) +#define PA0_DisableInterruptOnChange() do { PORTA.PIN0CTRL = (PORTA.PIN0CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0) +#define PA0_EnableInterruptForBothEdges() do { PORTA.PIN0CTRL = (PORTA.PIN0CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0) +#define PA0_EnableInterruptForRisingEdge() do { PORTA.PIN0CTRL = (PORTA.PIN0CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0) +#define PA0_EnableInterruptForFallingEdge() do { PORTA.PIN0CTRL = (PORTA.PIN0CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0) +#define PA0_DisableDigitalInputBuffer() do { PORTA.PIN0CTRL = (PORTA.PIN0CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0) +#define PA0_EnableInterruptForLowLevelSensing() do { PORTA.PIN0CTRL = (PORTA.PIN0CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0) + +void PIN_MANAGER_Initialize(); +void PORTB_PB3_DefaultInterruptHandler(void); +void PORTB_PB3_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA2_DefaultInterruptHandler(void); +void PORTA_PA2_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTC_PC3_DefaultInterruptHandler(void); +void PORTC_PC3_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA1_DefaultInterruptHandler(void); +void PORTA_PA1_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA4_DefaultInterruptHandler(void); +void PORTA_PA4_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA3_DefaultInterruptHandler(void); +void PORTA_PA3_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA6_DefaultInterruptHandler(void); +void PORTA_PA6_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA5_DefaultInterruptHandler(void); +void PORTA_PA5_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTD_PD3_DefaultInterruptHandler(void); +void PORTD_PD3_SetInterruptHandler(void (* interruptHandler)(void)) ; +void PORTA_PA0_DefaultInterruptHandler(void); +void PORTA_PA0_SetInterruptHandler(void (* interruptHandler)(void)) ; +#endif /* PINS_H_INCLUDED */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/port.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/port.h new file mode 100644 index 0000000..6a314fd --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/port.h @@ -0,0 +1,1383 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef PORT_INCLUDED +#define PORT_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +#include "../utils/compiler.h" + +enum port_pull_mode { + PORT_PULL_OFF, + PORT_PULL_UP, +}; + +enum port_dir { + PORT_DIR_IN, + PORT_DIR_OUT, + PORT_DIR_OFF, +}; +/** + * \brief Set port pin pull mode + * + * Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used + * + * \param[in] pin The pin number within port + * \param[in] pull_mode Pin pull mode + */ +static inline void PORTE_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTE + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * \brief Set port pin inverted mode + * + * Configure pin invert I/O or not + * + * \param[in] pin The pin number within port + * \param[in] inverted Pin inverted mode + */ +static inline void PORTE_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTE + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * \brief Set port pin input/sense configuration + * + * Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * + * \param[in] pin pin number within port + * \param[in] isc PORT_ISC_INTDISABLE_gc = Interrupt disabled but input buffer enabled + * PORT_ISC_BOTHEDGES_gc = Sense Both Edges + * PORT_ISC_RISING_gc = Sense Rising Edge + * PORT_ISC_FALLING_gc = Sense Falling Edge + * PORT_ISC_INPUT_DISABLE_gc = Digital Input Buffer disabled + * PORT_ISC_LEVEL_gc = Sense low Level + * + */ +static inline void PORTE_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTE + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * \brief Set port data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTE_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTE.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTE.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTE + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * \brief Set port pin data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] pin The pin number within port + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTE_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTE.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTE.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTE + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * \brief Set port level + * + * Sets output level on the pins defined by the bit mask + * + * \param[in] mask Bit mask where 1 means apply port level to the corresponding + * pin + * \param[in] level true = Pin levels set to "high" state + * false = Pin levels set to "low" state + */ +static inline void PORTE_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTE.OUT |= mask; + } else { + VPORTE.OUT &= ~mask; + } +} + +/** + * \brief Set port level + * + * Sets output level on a pin + * + * \param[in] pin The pin number within port + * \param[in] level true = Pin level set to "high" state + * false = Pin level set to "low" state + */ +static inline void PORTE_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTE.OUT |= (1 << pin); + } else { + VPORTE.OUT &= ~(1 << pin); + } +} + +/** + * \brief Toggle out level on pins + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding + * pin + */ +static inline void PORTE_toggle_port_level(const uint8_t mask) +{ + PORTE.OUTTGL = mask; +} + +/** + * \brief Toggle output level on pin + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] pin The pin number within port + */ +static inline void PORTE_toggle_pin_level(const uint8_t pin) +{ + PORTE.OUTTGL = 1 << pin; +} + +/** + * \brief Get input level on pins + * + * Read the input level on pins connected to a port + * + */ +static inline uint8_t PORTE_get_port_level() +{ + return VPORTE.IN; +} + +/** + * \brief Get level on pin + * + * Reads the level on pins connected to a port + */ +static inline bool PORTE_get_pin_level(const uint8_t pin) +{ + return VPORTE.IN & (1 << pin); +} + +/** + * \brief Write value to Port + * + * Write directly to the port OUT register + * + * \param[in] value Value to write to the port register + */ +static inline void PORTE_write_port(const uint8_t value) +{ + VPORTE.OUT = value; +} +/** + * \brief Set port pin pull mode + * + * Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used + * + * \param[in] pin The pin number within port + * \param[in] pull_mode Pin pull mode + */ +static inline void PORTF_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * \brief Set port pin inverted mode + * + * Configure pin invert I/O or not + * + * \param[in] pin The pin number within port + * \param[in] inverted Pin inverted mode + */ +static inline void PORTF_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * \brief Set port pin input/sense configuration + * + * Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * + * \param[in] pin pin number within port + * \param[in] isc PORT_ISC_INTDISABLE_gc = Interrupt disabled but input buffer enabled + * PORT_ISC_BOTHEDGES_gc = Sense Both Edges + * PORT_ISC_RISING_gc = Sense Rising Edge + * PORT_ISC_FALLING_gc = Sense Falling Edge + * PORT_ISC_INPUT_DISABLE_gc = Digital Input Buffer disabled + * PORT_ISC_LEVEL_gc = Sense low Level + * + */ +static inline void PORTF_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * \brief Set port data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTF_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTF.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTF.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTF + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * \brief Set port pin data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] pin The pin number within port + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTF_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTF.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTF.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTF + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * \brief Set port level + * + * Sets output level on the pins defined by the bit mask + * + * \param[in] mask Bit mask where 1 means apply port level to the corresponding + * pin + * \param[in] level true = Pin levels set to "high" state + * false = Pin levels set to "low" state + */ +static inline void PORTF_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTF.OUT |= mask; + } else { + VPORTF.OUT &= ~mask; + } +} + +/** + * \brief Set port level + * + * Sets output level on a pin + * + * \param[in] pin The pin number within port + * \param[in] level true = Pin level set to "high" state + * false = Pin level set to "low" state + */ +static inline void PORTF_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTF.OUT |= (1 << pin); + } else { + VPORTF.OUT &= ~(1 << pin); + } +} + +/** + * \brief Toggle out level on pins + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding + * pin + */ +static inline void PORTF_toggle_port_level(const uint8_t mask) +{ + PORTF.OUTTGL = mask; +} + +/** + * \brief Toggle output level on pin + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] pin The pin number within port + */ +static inline void PORTF_toggle_pin_level(const uint8_t pin) +{ + PORTF.OUTTGL = 1 << pin; +} + +/** + * \brief Get input level on pins + * + * Read the input level on pins connected to a port + * + */ +static inline uint8_t PORTF_get_port_level() +{ + return VPORTF.IN; +} + +/** + * \brief Get level on pin + * + * Reads the level on pins connected to a port + */ +static inline bool PORTF_get_pin_level(const uint8_t pin) +{ + return VPORTF.IN & (1 << pin); +} + +/** + * \brief Write value to Port + * + * Write directly to the port OUT register + * + * \param[in] value Value to write to the port register + */ +static inline void PORTF_write_port(const uint8_t value) +{ + VPORTF.OUT = value; +} +/** + * \brief Set port pin pull mode + * + * Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used + * + * \param[in] pin The pin number within port + * \param[in] pull_mode Pin pull mode + */ +static inline void PORTA_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * \brief Set port pin inverted mode + * + * Configure pin invert I/O or not + * + * \param[in] pin The pin number within port + * \param[in] inverted Pin inverted mode + */ +static inline void PORTA_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * \brief Set port pin input/sense configuration + * + * Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * + * \param[in] pin pin number within port + * \param[in] isc PORT_ISC_INTDISABLE_gc = Interrupt disabled but input buffer enabled + * PORT_ISC_BOTHEDGES_gc = Sense Both Edges + * PORT_ISC_RISING_gc = Sense Rising Edge + * PORT_ISC_FALLING_gc = Sense Falling Edge + * PORT_ISC_INPUT_DISABLE_gc = Digital Input Buffer disabled + * PORT_ISC_LEVEL_gc = Sense low Level + * + */ +static inline void PORTA_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * \brief Set port data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTA_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTA.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTA.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTA + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * \brief Set port pin data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] pin The pin number within port + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTA_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTA.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTA.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTA + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * \brief Set port level + * + * Sets output level on the pins defined by the bit mask + * + * \param[in] mask Bit mask where 1 means apply port level to the corresponding + * pin + * \param[in] level true = Pin levels set to "high" state + * false = Pin levels set to "low" state + */ +static inline void PORTA_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTA.OUT |= mask; + } else { + VPORTA.OUT &= ~mask; + } +} + +/** + * \brief Set port level + * + * Sets output level on a pin + * + * \param[in] pin The pin number within port + * \param[in] level true = Pin level set to "high" state + * false = Pin level set to "low" state + */ +static inline void PORTA_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTA.OUT |= (1 << pin); + } else { + VPORTA.OUT &= ~(1 << pin); + } +} + +/** + * \brief Toggle out level on pins + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding + * pin + */ +static inline void PORTA_toggle_port_level(const uint8_t mask) +{ + PORTA.OUTTGL = mask; +} + +/** + * \brief Toggle output level on pin + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] pin The pin number within port + */ +static inline void PORTA_toggle_pin_level(const uint8_t pin) +{ + PORTA.OUTTGL = 1 << pin; +} + +/** + * \brief Get input level on pins + * + * Read the input level on pins connected to a port + * + */ +static inline uint8_t PORTA_get_port_level() +{ + return VPORTA.IN; +} + +/** + * \brief Get level on pin + * + * Reads the level on pins connected to a port + */ +static inline bool PORTA_get_pin_level(const uint8_t pin) +{ + return VPORTA.IN & (1 << pin); +} + +/** + * \brief Write value to Port + * + * Write directly to the port OUT register + * + * \param[in] value Value to write to the port register + */ +static inline void PORTA_write_port(const uint8_t value) +{ + VPORTA.OUT = value; +} +/** + * \brief Set port pin pull mode + * + * Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used + * + * \param[in] pin The pin number within port + * \param[in] pull_mode Pin pull mode + */ +static inline void PORTB_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTB + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * \brief Set port pin inverted mode + * + * Configure pin invert I/O or not + * + * \param[in] pin The pin number within port + * \param[in] inverted Pin inverted mode + */ +static inline void PORTB_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTB + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * \brief Set port pin input/sense configuration + * + * Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * + * \param[in] pin pin number within port + * \param[in] isc PORT_ISC_INTDISABLE_gc = Interrupt disabled but input buffer enabled + * PORT_ISC_BOTHEDGES_gc = Sense Both Edges + * PORT_ISC_RISING_gc = Sense Rising Edge + * PORT_ISC_FALLING_gc = Sense Falling Edge + * PORT_ISC_INPUT_DISABLE_gc = Digital Input Buffer disabled + * PORT_ISC_LEVEL_gc = Sense low Level + * + */ +static inline void PORTB_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTB + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * \brief Set port data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTB_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTB.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTB.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTB + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * \brief Set port pin data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] pin The pin number within port + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTB_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTB.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTB.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTB + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * \brief Set port level + * + * Sets output level on the pins defined by the bit mask + * + * \param[in] mask Bit mask where 1 means apply port level to the corresponding + * pin + * \param[in] level true = Pin levels set to "high" state + * false = Pin levels set to "low" state + */ +static inline void PORTB_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTB.OUT |= mask; + } else { + VPORTB.OUT &= ~mask; + } +} + +/** + * \brief Set port level + * + * Sets output level on a pin + * + * \param[in] pin The pin number within port + * \param[in] level true = Pin level set to "high" state + * false = Pin level set to "low" state + */ +static inline void PORTB_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTB.OUT |= (1 << pin); + } else { + VPORTB.OUT &= ~(1 << pin); + } +} + +/** + * \brief Toggle out level on pins + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding + * pin + */ +static inline void PORTB_toggle_port_level(const uint8_t mask) +{ + PORTB.OUTTGL = mask; +} + +/** + * \brief Toggle output level on pin + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] pin The pin number within port + */ +static inline void PORTB_toggle_pin_level(const uint8_t pin) +{ + PORTB.OUTTGL = 1 << pin; +} + +/** + * \brief Get input level on pins + * + * Read the input level on pins connected to a port + * + */ +static inline uint8_t PORTB_get_port_level() +{ + return VPORTB.IN; +} + +/** + * \brief Get level on pin + * + * Reads the level on pins connected to a port + */ +static inline bool PORTB_get_pin_level(const uint8_t pin) +{ + return VPORTB.IN & (1 << pin); +} + +/** + * \brief Write value to Port + * + * Write directly to the port OUT register + * + * \param[in] value Value to write to the port register + */ +static inline void PORTB_write_port(const uint8_t value) +{ + VPORTB.OUT = value; +} +/** + * \brief Set port pin pull mode + * + * Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used + * + * \param[in] pin The pin number within port + * \param[in] pull_mode Pin pull mode + */ +static inline void PORTC_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * \brief Set port pin inverted mode + * + * Configure pin invert I/O or not + * + * \param[in] pin The pin number within port + * \param[in] inverted Pin inverted mode + */ +static inline void PORTC_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * \brief Set port pin input/sense configuration + * + * Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * + * \param[in] pin pin number within port + * \param[in] isc PORT_ISC_INTDISABLE_gc = Interrupt disabled but input buffer enabled + * PORT_ISC_BOTHEDGES_gc = Sense Both Edges + * PORT_ISC_RISING_gc = Sense Rising Edge + * PORT_ISC_FALLING_gc = Sense Falling Edge + * PORT_ISC_INPUT_DISABLE_gc = Digital Input Buffer disabled + * PORT_ISC_LEVEL_gc = Sense low Level + * + */ +static inline void PORTC_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * \brief Set port data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTC_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTC.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTC.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTC + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * \brief Set port pin data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] pin The pin number within port + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTC_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTC.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTC.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTC + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * \brief Set port level + * + * Sets output level on the pins defined by the bit mask + * + * \param[in] mask Bit mask where 1 means apply port level to the corresponding + * pin + * \param[in] level true = Pin levels set to "high" state + * false = Pin levels set to "low" state + */ +static inline void PORTC_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTC.OUT |= mask; + } else { + VPORTC.OUT &= ~mask; + } +} + +/** + * \brief Set port level + * + * Sets output level on a pin + * + * \param[in] pin The pin number within port + * \param[in] level true = Pin level set to "high" state + * false = Pin level set to "low" state + */ +static inline void PORTC_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTC.OUT |= (1 << pin); + } else { + VPORTC.OUT &= ~(1 << pin); + } +} + +/** + * \brief Toggle out level on pins + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding + * pin + */ +static inline void PORTC_toggle_port_level(const uint8_t mask) +{ + PORTC.OUTTGL = mask; +} + +/** + * \brief Toggle output level on pin + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] pin The pin number within port + */ +static inline void PORTC_toggle_pin_level(const uint8_t pin) +{ + PORTC.OUTTGL = 1 << pin; +} + +/** + * \brief Get input level on pins + * + * Read the input level on pins connected to a port + * + */ +static inline uint8_t PORTC_get_port_level() +{ + return VPORTC.IN; +} + +/** + * \brief Get level on pin + * + * Reads the level on pins connected to a port + */ +static inline bool PORTC_get_pin_level(const uint8_t pin) +{ + return VPORTC.IN & (1 << pin); +} + +/** + * \brief Write value to Port + * + * Write directly to the port OUT register + * + * \param[in] value Value to write to the port register + */ +static inline void PORTC_write_port(const uint8_t value) +{ + VPORTC.OUT = value; +} +/** + * \brief Set port pin pull mode + * + * Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used + * + * \param[in] pin The pin number within port + * \param[in] pull_mode Pin pull mode + */ +static inline void PORTD_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin); + + if (pull_mode == PORT_PULL_UP) { + *port_pin_ctrl |= PORT_PULLUPEN_bm; + } else if (pull_mode == PORT_PULL_OFF) { + *port_pin_ctrl &= ~PORT_PULLUPEN_bm; + } +} + +/** + * \brief Set port pin inverted mode + * + * Configure pin invert I/O or not + * + * \param[in] pin The pin number within port + * \param[in] inverted Pin inverted mode + */ +static inline void PORTD_pin_set_inverted(const uint8_t pin, const bool inverted) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin); + + if (inverted) { + *port_pin_ctrl |= PORT_INVEN_bm; + } else { + *port_pin_ctrl &= ~PORT_INVEN_bm; + } +} + +/** + * \brief Set port pin input/sense configuration + * + * Enable/disable digital input buffer and pin change interrupt, + * select pin interrupt edge/level sensing mode + * + * \param[in] pin pin number within port + * \param[in] isc PORT_ISC_INTDISABLE_gc = Interrupt disabled but input buffer enabled + * PORT_ISC_BOTHEDGES_gc = Sense Both Edges + * PORT_ISC_RISING_gc = Sense Rising Edge + * PORT_ISC_FALLING_gc = Sense Falling Edge + * PORT_ISC_INPUT_DISABLE_gc = Digital Input Buffer disabled + * PORT_ISC_LEVEL_gc = Sense low Level + * + */ +static inline void PORTD_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc) +{ + volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin); + + *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc; +} + +/** + * \brief Set port data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] mask Bit mask where 1 means apply direction setting to the + * corresponding pin + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTD_set_port_dir(const uint8_t mask, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTD.DIR &= ~mask; + break; + case PORT_DIR_OUT: + VPORTD.DIR |= mask; + break; + case PORT_DIR_OFF: + /*/ should activate the pullup for power saving + but a bit costly to do it here */ + { + for (uint8_t i = 0; i < 8; i++) { + if (mask & 1 << i) { + *((uint8_t *)&PORTD + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + } + } + break; + default: + break; + } +} + +/** + * \brief Set port pin data direction + * + * Select if the pin data direction is input, output or disabled. + * If disabled state is not possible, this function throws an assert. + * + * \param[in] pin The pin number within port + * \param[in] dir PORT_DIR_IN = Data direction in + * PORT_DIR_OUT = Data direction out + * PORT_DIR_OFF = Disables the pin + * (low power state) + */ +static inline void PORTD_set_pin_dir(const uint8_t pin, const enum port_dir dir) +{ + switch (dir) { + case PORT_DIR_IN: + VPORTD.DIR &= ~(1 << pin); + break; + case PORT_DIR_OUT: + VPORTD.DIR |= (1 << pin); + break; + case PORT_DIR_OFF: + *((uint8_t *)&PORTD + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp; + break; + default: + break; + } +} + +/** + * \brief Set port level + * + * Sets output level on the pins defined by the bit mask + * + * \param[in] mask Bit mask where 1 means apply port level to the corresponding + * pin + * \param[in] level true = Pin levels set to "high" state + * false = Pin levels set to "low" state + */ +static inline void PORTD_set_port_level(const uint8_t mask, const bool level) +{ + if (level == true) { + VPORTD.OUT |= mask; + } else { + VPORTD.OUT &= ~mask; + } +} + +/** + * \brief Set port level + * + * Sets output level on a pin + * + * \param[in] pin The pin number within port + * \param[in] level true = Pin level set to "high" state + * false = Pin level set to "low" state + */ +static inline void PORTD_set_pin_level(const uint8_t pin, const bool level) +{ + if (level == true) { + VPORTD.OUT |= (1 << pin); + } else { + VPORTD.OUT &= ~(1 << pin); + } +} + +/** + * \brief Toggle out level on pins + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] mask Bit mask where 1 means toggle pin level to the corresponding + * pin + */ +static inline void PORTD_toggle_port_level(const uint8_t mask) +{ + PORTD.OUTTGL = mask; +} + +/** + * \brief Toggle output level on pin + * + * Toggle the pin levels on pins defined by bit mask + * + * \param[in] pin The pin number within port + */ +static inline void PORTD_toggle_pin_level(const uint8_t pin) +{ + PORTD.OUTTGL = 1 << pin; +} + +/** + * \brief Get input level on pins + * + * Read the input level on pins connected to a port + * + */ +static inline uint8_t PORTD_get_port_level() +{ + return VPORTD.IN; +} + +/** + * \brief Get level on pin + * + * Reads the level on pins connected to a port + */ +static inline bool PORTD_get_pin_level(const uint8_t pin) +{ + return VPORTD.IN & (1 << pin); +} + +/** + * \brief Write value to Port + * + * Write directly to the port OUT register + * + * \param[in] value Value to write to the port register + */ +static inline void PORTD_write_port(const uint8_t value) +{ + VPORTD.OUT = value; +} +#ifdef __cplusplus +} +#endif + +#endif /* PORT_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/protected_io.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/protected_io.h new file mode 100644 index 0000000..ec8fcc3 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/protected_io.h @@ -0,0 +1,95 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +/** + * \defgroup doc_driver_system_protected_io Protected IO + * \ingroup doc_driver_system + * + * \section doc_driver_protected_io_rev Revision History + * - v0.0.0.1 Initial Commit + * + *@{ + */ + +#ifndef PROTECTED_IO_H +#define PROTECTED_IO_H + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(__DOXYGEN__) +//! \name IAR Memory Model defines. +//@{ + +/** + * \def CONFIG_MEMORY_MODEL_TINY + * \brief Configuration symbol to enable 8 bit pointers. + * + */ +#define CONFIG_MEMORY_MODEL_TINY + +/** + * \def CONFIG_MEMORY_MODEL_SMALL + * \brief Configuration symbol to enable 16 bit pointers. + * \note If no memory model is defined, SMALL is default. + * + */ +#define CONFIG_MEMORY_MODEL_SMALL + +/** + * \def CONFIG_MEMORY_MODEL_LARGE + * \brief Configuration symbol to enable 24 bit pointers. + * + */ +#define CONFIG_MEMORY_MODEL_LARGE + +//@} +#endif + +/** + * \brief Write to am 8-bit I/O register protected by CCP or a protection bit + * + * \param addr Address of the I/O register + * \param magic CCP magic value or Mask for protection bit + * \param value Value to be written + * + * \note Using IAR Embedded workbench, the choice of memory model has an impact + * on calling convention. The memory model is not visible to the + * preprocessor, so it must be defined in the Assembler preprocessor directives. + */ +extern void protected_write_io(void *addr, uint8_t magic, uint8_t value); + +/** @} */ + +#endif /* PROTECTED_IO_H */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/rstctrl.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/rstctrl.h new file mode 100644 index 0000000..538084b --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/rstctrl.h @@ -0,0 +1,65 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef RSTCTRL_INCLUDED +#define RSTCTRL_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ccp.h" + +static inline void RSTCTRL_reset(void) +{ + /* SWRR is protected with CCP */ + ccp_write_io((void *)&RSTCTRL.SWRR, 0x0); + +} + +static inline uint8_t RSTCTRL_get_reset_cause(void) +{ + return RSTCTRL.RSTFR; +} + +static inline void RSTCTRL_clear_reset_cause(void) +{ + RSTCTRL.RSTFR + = RSTCTRL_UPDIRF_bm | RSTCTRL_SWRF_bm | RSTCTRL_WDRF_bm | RSTCTRL_EXTRF_bm | RSTCTRL_BORF_bm | RSTCTRL_PORF_bm; +} + +#ifdef __cplusplus +} +#endif + +#endif /* RSTCTRL_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/spi0.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/spi0.h new file mode 100644 index 0000000..02ad6d6 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/spi0.h @@ -0,0 +1,237 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef SPI0_BASIC_H_INCLUDED +#define SPI0_BASIC_H_INCLUDED + +#include "../utils/compiler.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** Function pointer to callback function called by SPI IRQ. + NULL=default value: No callback function is to be used. +*/ +typedef void (*spi0_TRANSFER_DONE_CB)(void); + +typedef struct { + // hardware stuff that controls SPI mode + // hardware stuff that controls SPI baud rate + uint8_t CTRLAvalue; + uint8_t CTRLBvalue; +} spi0_configuration_t; + +/** Specify whether the SPI transfer is to be uni- or bidirectional. + A bidirectional transfer (=SPI_EXCHANGE) causes the received data + to overwrite the buffer with the data to transmit. +*/ +typedef enum spi0_transfer_type { + SPI0_EXCHANGE, ///< SPI transfer is bidirectional + SPI0_READ, ///< SPI transfer reads, writes only 0s + SPI0_WRITE ///< SPI transfer writes, discards read data +} spi0_transfer_type_t; + +/** Status of the SPI hardware and SPI bus.*/ +typedef enum spi0_transfer_status { + SPI0_FREE, ///< SPI hardware is not open, bus is free. + SPI0_IDLE, ///< SPI hardware has been opened, no transfer ongoing. + SPI0_BUSY, ///< SPI hardware has been opened, transfer ongoing. + SPI0_DONE ///< SPI hardware has been opened, transfer complete. +} spi0_transfer_status_t; + +/** Enumeration of the different configurations supported by the driver. + A configuration is specified as parameter to SPI0_open(), + and is used by the function to set SPI parameters as specified by the + configuration. A user may specify a configuration, e.g. SLAVE_A, used when + communication over SPI with SLAVE_A, and another configuration, SLAVE_B, + used when communication with SLAVE_B. The configurations may use different + SPI configuration such as polarity or SCK frequency. +*/ +typedef enum { + SPI0_DEFAULT +} SPI0_configuration_name_t; + +/** + * \brief Initialize SPI interface + * If module is configured to disabled state, the clock to the SPI is disabled + * if this is supported by the device's clock system. + * + * \return Initialization status. + * \retval 0 the SPI init was successful + * \retval 1 the SPI init was not successful + */ +uint8_t SPI0_Initialize(void); + +/** + * \brief Enable SPI0 + * 1. If supported by the clock system, enables the clock to the SPI + * 2. Enables the SPI module by setting the enable-bit in the SPI control register + * + * \return Nothing + */ +void SPI0_Enable(); + +/** + * \brief Disable SPI0 + * 1. Disables the SPI module by clearing the enable-bit in the SPI control register + * 2. If supported by the clock system, disables the clock to the SPI + * + * \return Nothing + */ +void SPI0_Disable(); + +/** + * \brief Open the SPI SPI0 for communication + * + * \param[in] spiUniqueconfiguration The configuration to use in the transfer + * + * \return Initialization status. + * \retval false The SPI open was successful + * \retval true The SPI open was successful + */ +bool SPI0_Open(spi0_configuration_t spiUniqueConfiguration); + +/** + * \brief Sets the index of Configuration to use in the transfer + * + * \param[in] spiUniqueconfiguration The configuration index + * + * \return Setting status. + */ + +bool SPI0_OpenConfiguration(uint8_t spiUniqueConfiguration); + + +/** + * \brief Close the SPI SPI0 for communication + * + * \return Nothing + */ +void SPI0_Close(void); + +/** + * \brief Exchange one byte over SPI SPI0. Blocks until done. + * + * \param[in] data The byte to transfer + * + * \return Received data byte. + */ +uint8_t SPI0_ExchangeByte(uint8_t data); + +/** + * \brief Exchange a buffer over SPI SPI0. Blocks if using polled driver. + * + * \param[inout] block The buffer to transfer. Received data is returned here. + * \param[in] size The size of buffer to transfer + * + * \return Nothing. + */ +void SPI0_ExchangeBlock(void *block, size_t size); + +/** + * \brief Write a buffer over SPI SPI0. Blocks if using polled driver. + * + * \param[in] block The buffer to transfer + * \param[in] size The size of buffer to transfer + * + * \return Nothing. + */ +void SPI0_WriteBlock(void *block, size_t size); + +/** + * \brief Read a buffer over SPI SPI0. Blocks if using polled driver. + * + * Zeros are transmitted out of the SPI. + * + * \param[out] block Received data is written here. + * \param[in] size The size of buffer to transfer + * + * \return Nothing. + */ +void SPI0_ReadBlock(void *block, size_t size); + +/** + * \brief Write a buffer over SPI SPI0. Blocks if using polled driver. + * + * \param[in] data The byte to transfer + * + * \return Nothing. + */ +void SPI0_WriteByte(uint8_t data); + +/** + * \brief Read a buffer over SPI SPI0. Blocks if using polled driver. + * + * \return The received data. + */ +uint8_t SPI0_ReadByte(); + +/** + * \brief Check if SPI slave is selected, i.e. its SS has been asserted. + * + * \return SPI SS status + * \retval true SPI is selected + * \retval false SPI is not selected + */ +bool SPI0_Selected(void); + +/** + * \brief Get received data byte from SPI + * + * \return Received data byte + */ +uint8_t SPI0_GetRxData(void); + +/** + * \brief Write data byte to SPI + * + * \param[in] data The data to transfer + * + * \return Nothing + */ +void SPI0_WriteTxData(uint8_t data); + +/** + * \brief Wait until SPI has recaived a data byte + * + * \return Nothing + */ +void SPI0_WaitDataready(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SPI0_BASIC_H_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/tca0.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/tca0.h new file mode 100644 index 0000000..7991c35 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/include/tca0.h @@ -0,0 +1,72 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 2.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef TCA0_H_INCLUDED +#define TCA0_H_INCLUDED + +#include "../utils/compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Initialize tca interface + * + * \return Initialization status. + */ + +typedef void (*TCA0_cb_t)(void); + +int8_t TCA0_Initialize(); +void TCA0_SetOVFIsrCallback(TCA0_cb_t cb); +void TCA0_SetCMP0IsrCallback(TCA0_cb_t cb); +void TCA0_SetCMP1IsrCallback(TCA0_cb_t cb); +void TCA0_SetCMP2IsrCallback(TCA0_cb_t cb); +void TCA0_EnableInterrupt(void); +void TCA0_DisableInterrupt(void); +uint16_t TCA0_ReadTimer(void); +void TCA0_WriteTimer(uint16_t timerVal); +void TCA0_ClearOverflowInterruptFlag(void); +bool TCA0_IsOverflowInterruptEnabled(void); +void TCA0_ClearCMP0InterruptFlag(void); +bool TCA0_IsCMP0InterruptEnabled(void); +void TCA0_ClearCMP1InterruptFlag(void); +bool TCA0_IsCMP1InterruptEnabled(void); +void TCA0_ClearCMP2InterruptFlag(void); +bool TCA0_IsCMP2InterruptEnabled(void); +#ifdef __cplusplus +} +#endif + +#endif /* TCA0_H_INCLUDED */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/mcc.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/mcc.c new file mode 100644 index 0000000..854b9fb --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/mcc.c @@ -0,0 +1,136 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "mcc.h" + +/** + * Initializes MCU, drivers and middleware in the project +**/ +void SYSTEM_Initialize(void) +{ + PIN_MANAGER_Initialize(); + BOD_Initialize(); + //CPU_Initialize(); + WDT_Initialize(); + SLPCTRL_Initialize(); + CLKCTRL_Initialize(); + SPI0_Initialize(); + EVSYS_Initialize(); + TCA0_Initialize(); + CCL_Initialize(); + CPUINT_Initialize(); +} + +/** + * \brief Initialize bod interface + */ +int8_t BOD_Initialize() +{ + //SLEEP DIS; + ccp_write_io((void*)&(BOD.CTRLA),0x00); + + //VLMCFG FALLING; VLMIE disabled; + BOD.INTCTRL = 0x00; + + //VLMLVL OFF; + BOD.VLMCTRLA = 0x00; + + return 0; +} + +ISR(BOD_VLM_vect) +{ + /* Insert your AC interrupt handling code here */ + + /* The interrupt flag has to be cleared manually */ + BOD.INTFLAGS = BOD_VLMIE_bm; +} + +/** + * \brief Initialize clkctrl interface + */ +int8_t CLKCTRL_Initialize() +{ + //RUNSTDBY disabled; + ccp_write_io((void*)&(CLKCTRL.OSC32KCTRLA),0x00); + + //RUNSTDBY disabled; CSUT 1K; SEL disabled; LPMODE disabled; ENABLE disabled; + ccp_write_io((void*)&(CLKCTRL.XOSC32KCTRLA),0x00); + + //PDIV 6X; PEN disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKCTRLB),0x10); + + //CLKOUT disabled; CLKSEL OSCHF; + ccp_write_io((void*)&(CLKCTRL.MCLKCTRLA),0x00); + + //PLLS enabled; EXTS disabled; XOSC32KS disabled; OSC32KS disabled; OSCHFS disabled; SOSC disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKSTATUS),0x20); + + //RUNSTDBY disabled; FREQSEL 24M; AUTOTUNE disabled; + ccp_write_io((void*)&(CLKCTRL.OSCHFCTRLA),0x24); + + //LOCKEN disabled; + ccp_write_io((void*)&(CLKCTRL.MCLKLOCK),0x00); + + return 0; +} + +/** + * \brief Initialize slpctrl interface + */ +int8_t SLPCTRL_Initialize() +{ + //SMODE IDLE; SEN disabled; + ccp_write_io((void*)&(SLPCTRL.CTRLA),0x00); + + return 0; +} + +/** + * \brief Initialize wdt interface + */ + +int8_t WDT_Initialize() +{ + //WINDOW OFF; PERIOD OFF; + ccp_write_io((void*)&(WDT.CTRLA),0x00); + + return 0; +} +/*TODO comment will remove once complier support will be available. +int8_t CPU_Initialize() +{ + return 0; + +} +*/ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/mcc.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/mcc.h new file mode 100644 index 0000000..a8ff737 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/mcc.h @@ -0,0 +1,62 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef MCC_H +#define MCC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "utils/compiler.h" +#include "include/pin_manager.h" +#include "include/ccl.h" +#include "include/spi0.h" +#include "include/cpuint.h" +#include "include/evsys.h" +#include "include/tca0.h" +#include "config/clock_config.h" + +/** + * Initializes MCU, drivers and middleware in the project +**/ +void SYSTEM_Initialize(void); +int8_t BOD_Initialize(); +int8_t CLKCTRL_Initialize(); +int8_t SLPCTRL_Initialize(); +int8_t WDT_Initialize(); + +#ifdef __cplusplus +} +#endif +#endif /* MCC_H */ \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/ccl.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/ccl.c new file mode 100644 index 0000000..79a74b7 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/ccl.c @@ -0,0 +1,141 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../include/ccl.h" + +int8_t CCL_Initialize() +{ + //INTMODE3 INTDISABLE; INTMODE2 INTDISABLE; INTMODE1 INTDISABLE; INTMODE0 INTDISABLE; + CCL.INTCTRL0 = 0x00; + + //INTMODE5 INTDISABLE; INTMODE4 INTDISABLE; + CCL.INTCTRL1 = 0x00; + + //INT5 disabled; INT4 disabled; INT3 disabled; INT2 disabled; INT1 disabled; INT0 disabled; + CCL.INTFLAGS = 0x00; + + //INSEL1 SPI0; INSEL0 TCA0; + CCL.LUT0CTRLB = 0x9A; + + //INSEL2 TCA0; + CCL.LUT0CTRLC = 0x0A; + + //INSEL1 MASK; INSEL0 MASK; + CCL.LUT1CTRLB = 0x00; + + //INSEL2 MASK; + CCL.LUT1CTRLC = 0x00; + + //INSEL1 MASK; INSEL0 MASK; + CCL.LUT2CTRLB = 0x00; + + //INSEL2 MASK; + CCL.LUT2CTRLC = 0x00; + + //INSEL1 MASK; INSEL0 MASK; + CCL.LUT3CTRLB = 0x00; + + //INSEL2 MASK; + CCL.LUT3CTRLC = 0x00; + + //INSEL1 MASK; INSEL0 MASK; + CCL.LUT4CTRLB = 0x00; + + //INSEL2 MASK; + CCL.LUT4CTRLC = 0x00; + + //INSEL1 MASK; INSEL0 MASK; + CCL.LUT5CTRLB = 0x00; + + //INSEL2 MASK; + CCL.LUT5CTRLC = 0x00; + + //SEQSEL0 DISABLE; + CCL.SEQCTRL0 = 0x00; + + //SEQSEL1 DISABLE; + CCL.SEQCTRL1 = 0x00; + + //SEQSEL2 DISABLE; + CCL.SEQCTRL2 = 0x00; + + // + CCL.TRUTH0 = 0xE0; + + // + CCL.TRUTH1 = 0x00; + + // + CCL.TRUTH2 = 0x00; + + // + CCL.TRUTH3 = 0x00; + + // + CCL.TRUTH4 = 0x00; + + // + CCL.TRUTH5 = 0x00; + + //EDGEDET DIS; OUTEN enabled; FILTSEL DISABLE; CLKSRC CLKPER; ENABLE enabled; + CCL.LUT0CTRLA = 0x41; + + //EDGEDET DIS; OUTEN disabled; FILTSEL DISABLE; CLKSRC CLKPER; ENABLE disabled; + CCL.LUT1CTRLA = 0x00; + + //EDGEDET DIS; OUTEN disabled; FILTSEL DISABLE; CLKSRC CLKPER; ENABLE disabled; + CCL.LUT2CTRLA = 0x00; + + //EDGEDET DIS; OUTEN disabled; FILTSEL DISABLE; CLKSRC CLKPER; ENABLE disabled; + CCL.LUT3CTRLA = 0x00; + + //EDGEDET DIS; OUTEN disabled; FILTSEL DISABLE; CLKSRC CLKPER; ENABLE disabled; + CCL.LUT4CTRLA = 0x00; + + //EDGEDET DIS; OUTEN disabled; FILTSEL DISABLE; CLKSRC CLKPER; ENABLE disabled; + CCL.LUT5CTRLA = 0x00; + + //RUNSTDBY disabled; ENABLE enabled; + CCL.CTRLA = 0x01; + + return 0; +} +ISR(CCL_CCL_vect) +{ + /* + * Insert your CCL interrupt handling code + * + * Interrupt flag can be cleared by writing 1 to its bit location + * in the INTFLAGS register + */ +} \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/cpuint.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/cpuint.c new file mode 100644 index 0000000..618880d --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/cpuint.c @@ -0,0 +1,54 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../include/cpuint.h" + +/** + * \brief Initialize cpuint interface + */ +int8_t CPUINT_Initialize() +{ + /* IVSEL and CVT are Configuration Change Protected */ + + //IVSEL disabled; CVT disabled; LVL0RR disabled; + ccp_write_io((void*)&(CPUINT.CTRLA),0x00); + + //LVL0PRI 0; + CPUINT.LVL0PRI = 0x00; + + //LVL1VEC 0; + CPUINT.LVL1VEC = 0x00; + + + return 0; +} \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/evsys.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/evsys.c new file mode 100644 index 0000000..d5cfe9e --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/evsys.c @@ -0,0 +1,142 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../include/evsys.h" + +int8_t EVSYS_Initialize() +{ + //CHANNEL0 SPI0_SCK; + EVSYS.CHANNEL0 = 0x68; + //CHANNEL1 OFF; + EVSYS.CHANNEL1 = 0x00; + //CHANNEL2 OFF; + EVSYS.CHANNEL2 = 0x00; + //CHANNEL3 OFF; + EVSYS.CHANNEL3 = 0x00; + //CHANNEL4 OFF; + EVSYS.CHANNEL4 = 0x00; + //CHANNEL5 OFF; + EVSYS.CHANNEL5 = 0x00; + //CHANNEL6 OFF; + EVSYS.CHANNEL6 = 0x00; + //CHANNEL7 OFF; + EVSYS.CHANNEL7 = 0x00; + //CHANNEL8 OFF; + EVSYS.CHANNEL8 = 0x00; + //CHANNEL9 OFF; + EVSYS.CHANNEL9 = 0x00; + //SWEVENTA CH0; + EVSYS.SWEVENTA = 0x01; + //SWEVENTB CH8; + EVSYS.SWEVENTB = 0x00; + //USER OFF; + EVSYS.USERADC0START = 0x00; + //USER OFF; + EVSYS.USERCCLLUT0A = 0x00; + //USER OFF; + EVSYS.USERCCLLUT0B = 0x00; + //USER OFF; + EVSYS.USERCCLLUT1A = 0x00; + //USER OFF; + EVSYS.USERCCLLUT1B = 0x00; + //USER OFF; + EVSYS.USERCCLLUT2A = 0x00; + //USER OFF; + EVSYS.USERCCLLUT2B = 0x00; + //USER OFF; + EVSYS.USERCCLLUT3A = 0x00; + //USER OFF; + EVSYS.USERCCLLUT3B = 0x00; + //USER OFF; + EVSYS.USERCCLLUT4A = 0x00; + //USER OFF; + EVSYS.USERCCLLUT4B = 0x00; + //USER OFF; + EVSYS.USERCCLLUT5A = 0x00; + //USER OFF; + EVSYS.USERCCLLUT5B = 0x00; + //USER OFF; + EVSYS.USEREVSYSEVOUTA = 0x00; + //USER OFF; + EVSYS.USEREVSYSEVOUTB = 0x00; + //USER OFF; + EVSYS.USEREVSYSEVOUTC = 0x00; + //USER OFF; + EVSYS.USEREVSYSEVOUTD = 0x00; + //USER OFF; + EVSYS.USEREVSYSEVOUTE = 0x00; + //USER OFF; + EVSYS.USEREVSYSEVOUTF = 0x00; + //USER OFF; + EVSYS.USERPTCSTART = 0x00; + //USER CHANNEL0; + EVSYS.USERTCA0CNTA = 0x01; + //USER CHANNEL0; + EVSYS.USERTCA0CNTB = 0x01; + //USER CHANNEL0; + EVSYS.USERTCA1CNTA = 0x01; + //USER CHANNEL0; + EVSYS.USERTCA1CNTB = 0x01; + //USER OFF; + EVSYS.USERTCB0CAPT = 0x00; + //USER OFF; + EVSYS.USERTCB0COUNT = 0x00; + //USER OFF; + EVSYS.USERTCB1CAPT = 0x00; + //USER OFF; + EVSYS.USERTCB1COUNT = 0x00; + //USER OFF; + EVSYS.USERTCB2CAPT = 0x00; + //USER OFF; + EVSYS.USERTCB2COUNT = 0x00; + //USER OFF; + EVSYS.USERTCB3CAPT = 0x00; + //USER OFF; + EVSYS.USERTCB3COUNT = 0x00; + //USER OFF; + EVSYS.USERTCD0INPUTA = 0x00; + //USER OFF; + EVSYS.USERTCD0INPUTB = 0x00; + //USER OFF; + EVSYS.USERUSART0IRDA = 0x00; + //USER OFF; + EVSYS.USERUSART1IRDA = 0x00; + //USER OFF; + EVSYS.USERUSART2IRDA = 0x00; + //USER OFF; + EVSYS.USERUSART3IRDA = 0x00; + //USER OFF; + EVSYS.USERUSART4IRDA = 0x00; + + return 0; +} diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/pin_manager.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/pin_manager.c new file mode 100644 index 0000000..c043e96 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/pin_manager.c @@ -0,0 +1,332 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../include/pin_manager.h" +static void (*PORTA_PA2_InterruptHandler)(void); +static void (*PORTB_PB3_InterruptHandler)(void); +static void (*PORTA_PA1_InterruptHandler)(void); +static void (*PORTC_PC3_InterruptHandler)(void); +static void (*PORTA_PA4_InterruptHandler)(void); +static void (*PORTA_PA3_InterruptHandler)(void); +static void (*PORTA_PA6_InterruptHandler)(void); +static void (*PORTA_PA5_InterruptHandler)(void); +static void (*PORTA_PA0_InterruptHandler)(void); +static void (*PORTD_PD3_InterruptHandler)(void); + +void PORT_Initialize(void); + +void PIN_MANAGER_Initialize() +{ + PORT_Initialize(); + + /* DIR Registers Initialization */ + PORTA.DIR = 0x5F; + PORTB.DIR = 0x08; + PORTC.DIR = 0x08; + PORTD.DIR = 0x08; + PORTE.DIR = 0x00; + PORTF.DIR = 0x00; + + /* OUT Registers Initialization */ + PORTA.OUT = 0x00; + PORTB.OUT = 0x00; + PORTC.OUT = 0x00; + PORTD.OUT = 0x00; + PORTE.OUT = 0x00; + PORTF.OUT = 0x00; + + /* PINxCTRL registers Initialization */ + PORTA.PIN0CTRL = 0x00; + PORTA.PIN1CTRL = 0x00; + PORTA.PIN2CTRL = 0x00; + PORTA.PIN3CTRL = 0x00; + PORTA.PIN4CTRL = 0x00; + PORTA.PIN5CTRL = 0x00; + PORTA.PIN6CTRL = 0x00; + PORTA.PIN7CTRL = 0x00; + PORTB.PIN0CTRL = 0x00; + PORTB.PIN1CTRL = 0x00; + PORTB.PIN2CTRL = 0x00; + PORTB.PIN3CTRL = 0x00; + PORTB.PIN4CTRL = 0x00; + PORTB.PIN5CTRL = 0x00; + PORTB.PIN6CTRL = 0x00; + PORTB.PIN7CTRL = 0x00; + PORTC.PIN0CTRL = 0x00; + PORTC.PIN1CTRL = 0x00; + PORTC.PIN2CTRL = 0x00; + PORTC.PIN3CTRL = 0x00; + PORTC.PIN4CTRL = 0x00; + PORTC.PIN5CTRL = 0x00; + PORTC.PIN6CTRL = 0x00; + PORTC.PIN7CTRL = 0x00; + PORTD.PIN0CTRL = 0x00; + PORTD.PIN1CTRL = 0x00; + PORTD.PIN2CTRL = 0x00; + PORTD.PIN3CTRL = 0x00; + PORTD.PIN4CTRL = 0x00; + PORTD.PIN5CTRL = 0x00; + PORTD.PIN6CTRL = 0x00; + PORTD.PIN7CTRL = 0x00; + PORTE.PIN0CTRL = 0x00; + PORTE.PIN1CTRL = 0x00; + PORTE.PIN2CTRL = 0x00; + PORTE.PIN3CTRL = 0x00; + PORTE.PIN4CTRL = 0x00; + PORTE.PIN5CTRL = 0x00; + PORTE.PIN6CTRL = 0x00; + PORTE.PIN7CTRL = 0x00; + PORTF.PIN0CTRL = 0x00; + PORTF.PIN1CTRL = 0x00; + PORTF.PIN2CTRL = 0x00; + PORTF.PIN3CTRL = 0x00; + PORTF.PIN4CTRL = 0x00; + PORTF.PIN5CTRL = 0x00; + PORTF.PIN6CTRL = 0x00; + PORTF.PIN7CTRL = 0x00; + + /* Multi-pin Config registers Initialization */ + PORTA.PINCONFIG = 0x00; + PORTA.PINCTRLCLR = 0x00; + PORTA.PINCTRLSET = 0x00; + PORTA.PINCTRLUPD = 0x00; + PORTB.PINCONFIG = 0x00; + PORTB.PINCTRLCLR = 0x00; + PORTB.PINCTRLSET = 0x00; + PORTB.PINCTRLUPD = 0x00; + PORTC.PINCONFIG = 0x00; + PORTC.PINCTRLCLR = 0x00; + PORTC.PINCTRLSET = 0x00; + PORTC.PINCTRLUPD = 0x00; + PORTD.PINCONFIG = 0x00; + PORTD.PINCTRLCLR = 0x00; + PORTD.PINCTRLSET = 0x00; + PORTD.PINCTRLUPD = 0x00; + PORTE.PINCONFIG = 0x00; + PORTE.PINCTRLCLR = 0x00; + PORTE.PINCTRLSET = 0x00; + PORTE.PINCTRLUPD = 0x00; + PORTF.PINCONFIG = 0x00; + PORTF.PINCTRLCLR = 0x00; + PORTF.PINCTRLSET = 0x00; + PORTF.PINCTRLUPD = 0x00; + + /* PORTMUX Initialization */ + PORTMUX.ACROUTEA = 0x00; + PORTMUX.CCLROUTEA = 0x00; + PORTMUX.EVSYSROUTEA = 0x00; + PORTMUX.SPIROUTEA = 0x00; + PORTMUX.TCAROUTEA = 0x00; + PORTMUX.TCBROUTEA = 0x01; + PORTMUX.TCDROUTEA = 0x01; + PORTMUX.TWIROUTEA = 0x00; + PORTMUX.USARTROUTEA = 0x00; + PORTMUX.USARTROUTEB = 0x00; + PORTMUX.ZCDROUTEA = 0x00; + + // register default ISC callback functions at runtime; use these methods to register a custom function + PORTA_PA2_SetInterruptHandler(PORTA_PA2_DefaultInterruptHandler); + PORTB_PB3_SetInterruptHandler(PORTB_PB3_DefaultInterruptHandler); + PORTA_PA1_SetInterruptHandler(PORTA_PA1_DefaultInterruptHandler); + PORTC_PC3_SetInterruptHandler(PORTC_PC3_DefaultInterruptHandler); + PORTA_PA4_SetInterruptHandler(PORTA_PA4_DefaultInterruptHandler); + PORTA_PA3_SetInterruptHandler(PORTA_PA3_DefaultInterruptHandler); + PORTA_PA6_SetInterruptHandler(PORTA_PA6_DefaultInterruptHandler); + PORTA_PA5_SetInterruptHandler(PORTA_PA5_DefaultInterruptHandler); + PORTA_PA0_SetInterruptHandler(PORTA_PA0_DefaultInterruptHandler); + PORTD_PD3_SetInterruptHandler(PORTD_PD3_DefaultInterruptHandler); +} + +void PORT_Initialize(void) +{ + /* On AVR devices all peripherals are enable from power on reset, this + * disables all peripherals to save power. Driver shall enable + * peripheral if used */ + + /* Set all pins to low power mode */ + for (uint8_t i = 0; i < 8; i++) { + *((uint8_t *)&PORTE + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + + for (uint8_t i = 0; i < 8; i++) { + *((uint8_t *)&PORTF + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + + for (uint8_t i = 0; i < 8; i++) { + *((uint8_t *)&PORTA + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + + for (uint8_t i = 0; i < 8; i++) { + *((uint8_t *)&PORTB + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + + for (uint8_t i = 0; i < 8; i++) { + *((uint8_t *)&PORTC + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + + for (uint8_t i = 0; i < 8; i++) { + *((uint8_t *)&PORTD + 0x10 + i) |= 1 << PORT_PULLUPEN_bp; + } + +} + +/** + Allows selecting an interrupt handler for PORTA_PA2 at application runtime +*/ +void PORTA_PA2_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA2_InterruptHandler = interruptHandler; +} + +void PORTA_PA2_DefaultInterruptHandler(void) +{ + // add your PORTA_PA2 interrupt custom code + // or set custom function using PORTA_PA2_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTB_PB3 at application runtime +*/ +void PORTB_PB3_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTB_PB3_InterruptHandler = interruptHandler; +} + +void PORTB_PB3_DefaultInterruptHandler(void) +{ + // add your PORTB_PB3 interrupt custom code + // or set custom function using PORTB_PB3_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTA_PA1 at application runtime +*/ +void PORTA_PA1_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA1_InterruptHandler = interruptHandler; +} + +void PORTA_PA1_DefaultInterruptHandler(void) +{ + // add your PORTA_PA1 interrupt custom code + // or set custom function using PORTA_PA1_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTC_PC3 at application runtime +*/ +void PORTC_PC3_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTC_PC3_InterruptHandler = interruptHandler; +} + +void PORTC_PC3_DefaultInterruptHandler(void) +{ + // add your PORTC_PC3 interrupt custom code + // or set custom function using PORTC_PC3_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTA_PA4 at application runtime +*/ +void PORTA_PA4_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA4_InterruptHandler = interruptHandler; +} + +void PORTA_PA4_DefaultInterruptHandler(void) +{ + // add your PORTA_PA4 interrupt custom code + // or set custom function using PORTA_PA4_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTA_PA3 at application runtime +*/ +void PORTA_PA3_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA3_InterruptHandler = interruptHandler; +} + +void PORTA_PA3_DefaultInterruptHandler(void) +{ + // add your PORTA_PA3 interrupt custom code + // or set custom function using PORTA_PA3_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTA_PA6 at application runtime +*/ +void PORTA_PA6_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA6_InterruptHandler = interruptHandler; +} + +void PORTA_PA6_DefaultInterruptHandler(void) +{ + // add your PORTA_PA6 interrupt custom code + // or set custom function using PORTA_PA6_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTA_PA5 at application runtime +*/ +void PORTA_PA5_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA5_InterruptHandler = interruptHandler; +} + +void PORTA_PA5_DefaultInterruptHandler(void) +{ + // add your PORTA_PA5 interrupt custom code + // or set custom function using PORTA_PA5_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTA_PA0 at application runtime +*/ +void PORTA_PA0_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTA_PA0_InterruptHandler = interruptHandler; +} + +void PORTA_PA0_DefaultInterruptHandler(void) +{ + // add your PORTA_PA0 interrupt custom code + // or set custom function using PORTA_PA0_SetInterruptHandler() +} +/** + Allows selecting an interrupt handler for PORTD_PD3 at application runtime +*/ +void PORTD_PD3_SetInterruptHandler(void (* interruptHandler)(void)) +{ + PORTD_PD3_InterruptHandler = interruptHandler; +} + +void PORTD_PD3_DefaultInterruptHandler(void) +{ + // add your PORTD_PD3 interrupt custom code + // or set custom function using PORTD_PD3_SetInterruptHandler() +} diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/protected_io.S b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/protected_io.S new file mode 100644 index 0000000..b93dd68 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/protected_io.S @@ -0,0 +1,90 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../utils/assembler.h" + +/* + * GNU and IAR use different calling conventions. Since this is + * a very small and simple function to begin with, it's easier + * to implement it twice than to deal with the differences + * within a single implementation. + */ + + PUBLIC_FUNCTION(protected_write_io) + +#if defined(__GNUC__) + +#ifdef RAMPZ + out _SFR_IO_ADDR(RAMPZ), r1 // Clear bits 23:16 of Z +#endif + movw r30, r24 // Load addr into Z + out CCP, r22 // Start CCP handshake + st Z, r20 // Write value to I/O register + ret // Return to caller + +#elif defined(__IAR_SYSTEMS_ASM__) + +# if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \ + && !defined(CONFIG_MEMORY_MODEL_LARGE) +# define CONFIG_MEMORY_MODEL_SMALL +# endif +# if defined(CONFIG_MEMORY_MODEL_LARGE) + ldi r20, 0 + out RAMPZ, r20 // Reset bits 23:16 of Z + movw r30, r16 // Load addr into Z +# elif defined(CONFIG_MEMORY_MODEL_TINY) + ldi r31, 0 // Reset bits 8:15 of Z + mov r30, r16 // Load addr into Z +# else + movw r30, r16 // Load addr into Z +# endif +# if defined(CONFIG_MEMORY_MODEL_TINY) + out CCP, r17 // Start CCP handshake + st Z, r18 // Write value to I/O register +# elif defined(CONFIG_MEMORY_MODEL_SMALL) + out CCP, r18 // Start CCP handshake + st Z, r19 // Write value to I/O register +# elif defined(CONFIG_MEMORY_MODEL_LARGE) + out CCP, r19 // Start CCP handshake + st Z, r20 // Write value to I/O register +# else +# error Unknown memory model in use, no idea how registers should be accessed +# endif + ret +#else +# error Unknown assembler +#endif + + END_FUNC(protected_write_io) + END_FILE() + diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/spi0.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/spi0.c new file mode 100644 index 0000000..776e4a6 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/spi0.c @@ -0,0 +1,176 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../include/spi0.h" +#include "../include/pin_manager.h" + +typedef struct spi0_descriptor_s { + spi0_transfer_status_t status; +} spi0_descriptor_t; + +spi0_configuration_t spi0_configurations[] = { + { 0x35, 0x5 } +}; + +static spi0_descriptor_t spi0_desc; + +uint8_t SPI0_Initialize() +{ + //DORD disabled; MASTER enabled; CLK2X enabled; PRESC DIV64; ENABLE enabled; + SPI0.CTRLA = 0x35; + + //BUFEN disabled; BUFWR disabled; SSD enabled; MODE 1; + SPI0.CTRLB = 0x05; + + //RXCIE disabled; TXCIE disabled; DREIE disabled; SSIE disabled; IE disabled; + SPI0.INTCTRL = 0x00; + + spi0_desc.status = SPI0_FREE; + + //RXCIF disabled; IF disabled; TXCIF disabled; WRCOL disabled; DREIF disabled; SSIF disabled; BUFOVF disabled; + SPI0.INTFLAGS = 0x00; + + return 0; +} + +void SPI0_Enable() +{ + SPI0.CTRLA |= SPI_ENABLE_bm; +} + +void SPI0_Disable() +{ + SPI0.CTRLA &= ~SPI_ENABLE_bm; +} + +bool SPI0_OpenConfiguration(uint8_t spiUniqueConfiguration){ + return SPI0_Open(spi0_configurations[spiUniqueConfiguration]); +} + +bool SPI0_Open(spi0_configuration_t spiUniqueConfiguration) +{ + if (spi0_desc.status == SPI0_FREE) { + spi0_desc.status = SPI0_IDLE; + SPI0.CTRLA = spiUniqueConfiguration.CTRLAvalue; + SPI0.CTRLB = spiUniqueConfiguration.CTRLBvalue; + return true; + } else { + return false; + } +} + +void SPI0_Close(void) +{ + spi0_desc.status = SPI0_FREE; +} + +uint8_t SPI0_ExchangeByte(uint8_t data) +{ + SPI0.DATA = data; + while (!(SPI0.INTFLAGS & SPI_RXCIF_bm)); + return SPI0.DATA; +} + +bool SPI0_Selected() +{ +/** + * \brief returns true if SS pin is selected + * TODO: Place your code + */ +return true; +} + +uint8_t SPI0_GetRxData() +{ + return SPI0.DATA; +} + +void SPI0_WriteTxData(uint8_t data) +{ + SPI0.DATA = data; +} + +void SPI0_WaitDataready() +{ + while (!(SPI0.INTFLAGS & SPI_RXCIF_bm)) + ; +} + +void SPI0_ExchangeBlock(void *block, size_t size) +{ + uint8_t *b = (uint8_t *)block; + while (size--) { + SPI0.DATA = *b; + while (!(SPI0.INTFLAGS & SPI_RXCIF_bm)) + ; + *b = SPI0.DATA; + b++; + } +} + +void SPI0_WriteBlock(void *block, size_t size) +{ + uint8_t *b = (uint8_t *)block; + uint8_t rdata; + while (size--) { + SPI0.DATA = *b; + while (!(SPI0.INTFLAGS & SPI_RXCIF_bm)) + ; + rdata = SPI0.DATA; + (void)(rdata); // Silence compiler warning + b++; + } +} + +void SPI0_ReadBlock(void *block, size_t size) +{ + uint8_t *b = (uint8_t *)block; + while (size--) { + SPI0.DATA = 0; + while (!(SPI0.INTFLAGS & SPI_RXCIF_bm)) + ; + *b = SPI0.DATA; + b++; + } +} + +void SPI0_WriteByte(uint8_t data) +{ + + SPI0.DATA = data; +} + +uint8_t SPI0_ReadByte() +{ + return SPI0.DATA; +} \ No newline at end of file diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/tca0.c b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/tca0.c new file mode 100644 index 0000000..fdd5f2a --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/src/tca0.c @@ -0,0 +1,245 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 2.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#include "../include/tca0.h" + +void TCA0_DefaultCMP0IsrCallback(void); +void (*TCA0_CMP0_isr_cb)(void) = &TCA0_DefaultCMP0IsrCallback; +void TCA0_DefaultCMP1IsrCallback(void); +void (*TCA0_CMP1_isr_cb)(void) = &TCA0_DefaultCMP1IsrCallback; +void TCA0_DefaultCMP2IsrCallback(void); +void (*TCA0_CMP2_isr_cb)(void) = &TCA0_DefaultCMP2IsrCallback; +void TCA0_DefaultOVFIsrCallback(void); +void (*TCA0_OVF_isr_cb)(void) = &TCA0_DefaultOVFIsrCallback; + +void TCA0_DefaultCMP0IsrCallback(void) +{ + //Add your ISR code here +} + +void TCA0_DefaultCMP1IsrCallback(void) +{ + //Add your ISR code here +} + +void TCA0_DefaultCMP2IsrCallback(void) +{ + //Add your ISR code here +} + +void TCA0_DefaultOVFIsrCallback(void) +{ + //Add your ISR code here +} + +void TCA0_SetOVFIsrCallback(TCA0_cb_t cb) +{ + TCA0_OVF_isr_cb = cb; +} + +void TCA0_SetCMP0IsrCallback(TCA0_cb_t cb) +{ + TCA0_CMP0_isr_cb = cb; +} + +void TCA0_SetCMP1IsrCallback(TCA0_cb_t cb) +{ + TCA0_CMP1_isr_cb = cb; +} + +void TCA0_SetCMP2IsrCallback(TCA0_cb_t cb) +{ + TCA0_CMP2_isr_cb = cb; +} + +ISR(TCA0_CMP0_vect) +{ + if (TCA0_CMP0_isr_cb != NULL) + (*TCA0_CMP0_isr_cb)(); + + TCA0.SINGLE.INTFLAGS = TCA_SINGLE_CMP0_bm; +} + +ISR(TCA0_CMP1_vect) +{ + if (TCA0_CMP1_isr_cb != NULL) + (*TCA0_CMP1_isr_cb)(); + + TCA0.SINGLE.INTFLAGS = TCA_SINGLE_CMP1_bm; +} + +ISR(TCA0_CMP2_vect) +{ + if (TCA0_CMP2_isr_cb != NULL) + (*TCA0_CMP2_isr_cb)(); + + TCA0.SINGLE.INTFLAGS = TCA_SINGLE_CMP2_bm; +} + +ISR(TCA0_OVF_vect) +{ + if (TCA0_OVF_isr_cb != NULL) + (*TCA0_OVF_isr_cb)(); + + TCA0.SINGLE.INTFLAGS = TCA_SINGLE_OVF_bm; +} + + +/** + * \brief Initialize TCA interface + */ +int8_t TCA0_Initialize() +{ + //Compare 0 + TCA0.SINGLE.CMP0 = 0x0A; + + //Compare 1 + TCA0.SINGLE.CMP1 = 0x00; + + //Compare 2 + TCA0.SINGLE.CMP2 = 0x12; + + //Count + TCA0.SINGLE.CNT = 0x00; + + //CMP2EN enabled; CMP1EN disabled; CMP0EN enabled; ALUPD disabled; WGMODE SINGLESLOPE; + TCA0.SINGLE.CTRLB = 0x53; + + //CMP2OV disabled; CMP1OV disabled; CMP0OV disabled; + TCA0.SINGLE.CTRLC = 0x00; + + //SPLITM disabled; + TCA0.SINGLE.CTRLD = 0x00; + + //CMD NONE; LUPD disabled; DIR disabled; + TCA0.SINGLE.CTRLECLR = 0x00; + + //CMD NONE; LUPD disabled; DIR UP; + TCA0.SINGLE.CTRLESET = 0x00; + + //CMP2BV disabled; CMP1BV disabled; CMP0BV disabled; PERBV disabled; + TCA0.SINGLE.CTRLFCLR = 0x00; + + //CMP2BV disabled; CMP1BV disabled; CMP0BV disabled; PERBV disabled; + TCA0.SINGLE.CTRLFSET = 0x00; + + //DBGRUN disabled; + TCA0.SINGLE.DBGCTRL = 0x00; + + //EVACTB RESTART_POSEDGE; CNTBEI enabled; EVACTA UPDOWN; CNTAEI disabled; + TCA0.SINGLE.EVCTRL = 0x96; + + //CMP2 disabled; CMP1 disabled; CMP0 disabled; OVF disabled; + TCA0.SINGLE.INTCTRL = 0x00; + + //CMP2 disabled; CMP1 disabled; CMP0 disabled; OVF disabled; + TCA0.SINGLE.INTFLAGS = 0x00; + + //Period + TCA0.SINGLE.PER = 0x95F; + + //Temporary data for 16-bit Access + TCA0.SINGLE.TEMP = 0x00; + + //RUNSTDBY disabled; CLKSEL DIV1; ENABLE disabled; + TCA0.SINGLE.CTRLA = 0x00; + + return 0; +} + +void TCA0_WriteTimer(uint16_t timerVal) +{ + TCA0.SINGLE.CNT=timerVal; +} + +uint16_t TCA0_ReadTimer(void) +{ + uint16_t readVal; + + readVal = TCA0.SINGLE.CNT; + + return readVal; +} + +void TCA0_EnableInterrupt(void) +{ + TCA0.SINGLE.INTCTRL = 1 << TCA_SINGLE_CMP0_bp /* Compare 0 Interrupt: enabled */ + | 1 << TCA_SINGLE_CMP1_bp /* Compare 1 Interrupt: enabled */ + | 1 << TCA_SINGLE_CMP2_bp /* Compare 2 Interrupt: enabled */ + | 1 << TCA_SINGLE_OVF_bp; /* Overflow Interrupt: enabled */ +} +void TCA0_DisableInterrupt(void) +{ + TCA0.SINGLE.INTCTRL = 0 << TCA_SINGLE_CMP0_bp /* Compare 0 Interrupt: disabled */ + | 0 << TCA_SINGLE_CMP1_bp /* Compare 1 Interrupt: disabled */ + | 0 << TCA_SINGLE_CMP2_bp /* Compare 2 Interrupt: disabled */ + | 0 << TCA_SINGLE_OVF_bp; /* Overflow Interrupt: disabled */ +} +void TCA0_ClearOverflowInterruptFlag(void) +{ + TCA0.SINGLE.INTFLAGS &= ~TCA_SINGLE_OVF_bm; /* Overflow Interrupt: disabled */ +} +bool TCA0_IsOverflowInterruptEnabled(void) +{ + return ((TCA0.SINGLE.INTFLAGS & TCA_SINGLE_OVF_bm) > 0); +} + +void TCA0_ClearCMP0InterruptFlag(void) +{ + TCA0.SINGLE.INTFLAGS &= ~TCA_SINGLE_CMP0_bm; /* Compare Channel-0 Interrupt: disabled */ +} + +bool TCA0_IsCMP0InterruptEnabled(void) +{ + return ((TCA0.SINGLE.INTFLAGS & TCA_SINGLE_CMP0_bm) > 0); +} + +void TCA0_ClearCMP1InterruptFlag(void) +{ + TCA0.SINGLE.INTFLAGS &= ~TCA_SINGLE_CMP1_bm; /* Compare Channel-1 Interrupt: disabled */ +} + +bool TCA0_IsCMP1InterruptEnabled(void) +{ + return ((TCA0.SINGLE.INTFLAGS & TCA_SINGLE_CMP1_bm) > 0); +} + +void TCA0_ClearCMP2InterruptFlag(void) +{ + TCA0.SINGLE.INTFLAGS &= ~TCA_SINGLE_CMP2_bm; /* Compare Channel-2 Interrupt: disabled */ +} + +bool TCA0_IsCMP2InterruptEnabled(void) +{ + return ((TCA0.SINGLE.INTFLAGS & TCA_SINGLE_CMP2_bm) > 0); +} diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler.h new file mode 100644 index 0000000..65829ed --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler.h @@ -0,0 +1,49 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef ASSEMBLER_H_INCLUDED +#define ASSEMBLER_H_INCLUDED + +#if !defined(__ASSEMBLER__) && !defined(__IAR_SYSTEMS_ASM__) && !defined(__DOXYGEN__) +#error This file may only be included from assembly files +#endif + +#if defined(__ASSEMBLER__) +#include "assembler/gas.h" +#include +#elif defined(__IAR_SYSTEMS_ASM__) +#include "assembler/iar.h" +#include +#endif + +#endif /* ASSEMBLER_H_INCLUDED */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler/gas.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler/gas.h new file mode 100644 index 0000000..a164306 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler/gas.h @@ -0,0 +1,116 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef ASSEMBLER_GAS_H_INCLUDED +#define ASSEMBLER_GAS_H_INCLUDED + +#ifndef __DOXYGEN__ + +/* clang-format off */ + + /* IAR doesn't accept dots in macro names */ + .macro ld_addr, reg, sym + lda.w \reg, \sym + .endm + + /* Define a function \a name that is either globally visible or only + * file-local. + */ + .macro gas_begin_func name, is_public + .if \is_public + .global \name + .endif + .section .text.\name, "ax", @progbits + .type \name, @function + \name : + .endm + + /* Define a function \a name that is either globally visible or only + * file-local in a given segment. + */ + .macro gas_begin_func_segm name, is_public, segment + .if \is_public + .global \name + .endif + .section .\segment, "ax", @progbits + .type \name, @function + \name : + .endm + + /* Define \a name as a weak alias for the function \a strong_name */ + .macro gas_weak_function_alias name, strong_name + .global \name + .weak \name + .type \name, @function + .set \name, \strong_name + .endm + + /* Define a weak function called \a name */ + .macro gas_weak_function name + .weak \name + gas_begin_func \name 1 + .endm + +#define REPEAT(count) .rept count +#define END_REPEAT() .endr +#define FILL_BYTES(count) .fill count +#define SET_LOC(offset) .org offset +#define L(name) .L##name +#define EXTERN_SYMBOL(name) + +#define TEXT_SECTION(name) \ + .section name, "ax", @progbits +#define RODATA_SECTION(name) \ + .section name, "a", @progbits +#define DATA_SECTION(name) \ + .section name, "aw", @progbits +#define BSS_SECTION(name) \ + .section name, "aw", @nobits + +#define FUNCTION(name) gas_begin_func name 0 +#define PUBLIC_FUNCTION(name) gas_begin_func name 1 +#define PUBLIC_FUNCTION_SEGMENT(name, segment) \ + gas_begin_func_segm name 1 segment +#define WEAK_FUNCTION(name) gas_weak_function name +#define WEAK_FUNCTION_ALIAS(name, strong_name) \ + gas_weak_function_alias name strong_name +#define END_FUNC(name) \ + .size name, . - name + +#define END_FILE() + +/* clang-format on */ + +#endif /* __DOXYGEN__ */ + +#endif /* ASSEMBLER_GAS_H_INCLUDED */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler/iar.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler/iar.h new file mode 100644 index 0000000..69650d6 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/assembler/iar.h @@ -0,0 +1,104 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef ASSEMBLER_IAR_H_INCLUDED +#define ASSEMBLER_IAR_H_INCLUDED + +/* clang-format off */ + +ld_addr MACRO reg, sym + mov reg, LWRD sym + orh reg, HWRD sym + ENDM + +call MACRO sym + rcall sym + ENDM + +iar_begin_func MACRO name, sect, is_public, is_weak + MODULE name + RSEG CODE:CODE:NOROOT(1) + IF is_weak == 1 + PUBWEAK name + ELSEIF is_public + PUBLIC name + ENDIF +name: + ENDM + +iar_begin_func_segm MACRO name, sect, is_public, is_weak, segment + MODULE name + RSEG segment:CODE:NOROOT(1) + IF is_weak == 1 + PUBWEAK name + ELSEIF is_public + PUBLIC name + ENDIF +name: + ENDM + +iar_weak_alias MACRO name, strong_name + PUBWEAK name +name: + rjmp strong_name + ENDM + +#define lo(x) LWRD x +#define hi(x) HWRD x + +#define REPEAT(count) REPT count +#define END_REPEAT() ENDR +#define SET_LOC(offset) ORG offset +#define END_FILE() END + +#define FILL_BYTES(count) DS8 count + +#define L(name) name +#define EXTERN_SYMBOL(name) EXTERN name +#define FUNCTION(name) iar_begin_func name, text_##name, 0, 0 +#define PUBLIC_FUNCTION(name) iar_begin_func name, text_##name, 1, 0 +#define PUBLIC_FUNCTION_SEGMENT(name, segment) \ + iar_begin_func_segm name, text_##name, 1, 0, segment +#define WEAK_FUNCTION(name) iar_begin_func name, text_##name, 1, 1 +#define WEAK_FUNCTION_ALIAS(name, strong_name) \ + iar_weak_alias name, strong_name +#define END_FUNC(name) ENDMOD + +#define TEXT_SECTION(name) RSEG name:CODE:NOROOT +#define RODATA_SECTION(name) RSEG name:CONST:NOROOT +#define DATA_SECTION(name) RSEG name:DATA:NOROOT +#define BSS_SECTION(name) RSEG name:DATA:NOROOT + +/* clang-format on */ + +#endif /* ASSEMBLER_IAR_H_INCLUDED */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/atomic.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/atomic.h new file mode 100644 index 0000000..7b99064 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/atomic.h @@ -0,0 +1,113 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef ATOMIC_H +#define ATOMIC_H + +/** + * \defgroup doc_driver_utils_atomic Atomic memory access and critical sections + * \ingroup doc_driver_utils + * + * Atomic memory access and critical sections + * + * \{ + */ + +/* clang-format off */ + +#if defined(__GNUC__) || defined (__DOXYGEN__) + +/** + * \brief Enter a critical region + * + * Saves the contents of the status register, including the Global + * Interrupt Enable bit, so that it can be restored upon leaving the + * critical region. Thereafter, clears the Global Interrupt Enable Bit. + * This macro takes a parameter P that is unused for the GCC compiler, + * but necessary for code compatibility with the IAR compiler. The IAR + * compiler declares a variable with the name of the parameter for + * holding the SREG value. Since a variable is declared in the macro, + * this variable must have a name that is unique within the scope + * that the critical region is declared within, otherwise compilation + * will fail. + * + * \param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG + * + */ + +#define ENTER_CRITICAL(UNUSED) __asm__ __volatile__ ( \ + "in __tmp_reg__, __SREG__" "\n\t" \ + "cli" "\n\t" \ + "push __tmp_reg__" "\n\t" \ + ::: "memory" \ + ) + +/** + * \brief Exit a critical region + * + * Restores the contents of the status register, including the Global + * Interrupt Enable bit, as it was when entering the critical region. + * This macro takes a parameter P that is unused for the GCC compiler, + * but necessary for code compatibility with the IAR compiler. The IAR + * compiler uses this parameter as the name of a variable that holds + * the SREG value. The parameter must be identical to the parameter + * used in the corresponding ENTER_CRITICAL(). + * + * \param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG + * + */ + +#define EXIT_CRITICAL(UNUSED) __asm__ __volatile__ ( \ + "pop __tmp_reg__" "\n\t" \ + "out __SREG__, __tmp_reg__" "\n\t" \ + ::: "memory" \ + ) + +#define DISABLE_INTERRUPTS() __asm__ __volatile__ ( "cli" ::: "memory") +#define ENABLE_INTERRUPTS() __asm__ __volatile__ ( "sei" ::: "memory") + +#elif defined(__ICCAVR__) + +#define ENTER_CRITICAL(P) unsigned char P = __save_interrupt();__disable_interrupt(); +#define EXIT_CRITICAL(P) __restore_interrupt(P); + +#define DISABLE_INTERRUPTS() __disable_interrupt(); +#define ENABLE_INTERRUPTS() __enable_interrupt(); + +#else +# error Unsupported compiler. +#endif + +/* clang-format on */ + +#endif /* ATOMIC_H */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/compiler.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/compiler.h new file mode 100644 index 0000000..fbd7a59 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/compiler.h @@ -0,0 +1,80 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +#ifndef UTILS_COMPILER_H +#define UTILS_COMPILER_H + +/** + * \defgroup doc_driver_utils_compiler Compiler abstraction + * \ingroup doc_driver_utils + * + * Compiler abstraction layer and code utilities for 8-bit AVR. + * This module provides various abstraction layers and utilities + * to make code compatible between different compilers. + * + * \{ + */ + +#if defined(__GNUC__) +#include +#include +#elif defined(__ICCAVR__) +#define ENABLE_BIT_DEFINITIONS 1 +#include +#include + +#ifndef CCP_IOREG_gc +#define CCP_IOREG_gc 0xD8 /* CPU_CCP_IOREG_gc */ +#endif +#ifndef CCP_SPM_gc +#define CCP_SPM_gc 0x9D /* CPU_CCP_SPM_gc */ +#endif + +#else +#error Unsupported compiler. +#endif + +#include +#include +#include +#include + +#include "interrupt_avr8.h" + +/** + * \def UNUSED + * \brief Marking \a v as a unused parameter or value. + */ +#define UNUSED(v) (void)(v) + +#endif /* UTILS_COMPILER_H */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/interrupt_avr8.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/interrupt_avr8.h new file mode 100644 index 0000000..ad1efd7 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/interrupt_avr8.h @@ -0,0 +1,100 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +/** + * \defgroup doc_driver_utils_interrupts ISR abstraction + * \ingroup doc_driver_utils + * + * Interrupt-related functionality. + * + * \{ + */ + +#ifndef UTILS_INTERRUPT_AVR8_H +#define UTILS_INTERRUPT_AVR8_H + +/** + * \weakgroup interrupt_group + * + * @{ + */ + +#ifdef ISR_CUSTOM_H +#include ISR_CUSTOM_H +#else + +/** + * \def ISR + * \brief Define service routine for specified interrupt vector + * + * Usage: + * \code + ISR(FOO_vect) + { + ... + } +\endcode + * + * \param vect Interrupt vector name as found in the device header files. + */ +#if defined(__DOXYGEN__) +#define ISR(vect) +#elif defined(__GNUC__) +#include +#elif defined(__ICCAVR__) +#define __ISR(x) _Pragma(#x) +#define ISR(vect) __ISR(vector = vect) __interrupt void handler_##vect(void) +#endif +#endif // ISR_CUSTOM_H + +#ifdef __GNUC__ +#define cpu_irq_enable() sei() +#define cpu_irq_disable() cli() +#else +#define cpu_irq_enable() __enable_interrupt() +#define cpu_irq_disable() __disable_interrupt() +#endif + +//! @} + +/** + * \weakgroup interrupt_deprecated_group + * @{ + */ +// Deprecated definitions. +#define Enable_global_interrupt() cpu_irq_enable() +#define Disable_global_interrupt() cpu_irq_disable() +#define Is_global_interrupt_enabled() cpu_irq_is_enabled() +//! @} + +#endif /* UTILS_INTERRUPT_AVR8_H */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/utils.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/utils.h new file mode 100644 index 0000000..b133c4d --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/utils.h @@ -0,0 +1,61 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +/** + * \defgroup doc_driver_utils AVR Code utility functions + * + * Compiler abstraction layer and code utilities for AVR. + * This module provides various abstraction layers and utilities + * to make code compatible between different compilers. + * + * \{ + */ + +#ifndef UTILS_H_INCLUDED +#define UTILS_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Retrieve array size + */ +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif /* UTILS_H_INCLUDED */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/utils_assert.h b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/utils_assert.h new file mode 100644 index 0000000..25c322e --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/mcc_generated_files/utils/utils_assert.h @@ -0,0 +1,72 @@ +/** + @Company + Microchip Technology Inc. + + @Description + This Source file provides APIs. + Generation Information : + Driver Version : 1.0.0 +*/ +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + +/** + * \defgroup doc_driver_utils_assert Functionality for assert. + * \ingroup doc_driver_utils + * + * \{ + */ + +#ifndef _ASSERT_H_INCLUDED +#define _ASSERT_H_INCLUDED + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** + * \brief Assert macro + * + * This macro is used to throw asserts. It can be mapped to different function + * based on debug level. + * + * \param[in] condition A condition to be checked; + * assert is thrown if the given condition is false + */ + +#ifdef DEBUG +#define ASSERT(condition) \ + if (!(condition)) \ + while (true) \ + ; +#else +#define ASSERT(condition) ((void)0) +#endif + +#ifdef __cplusplus +} +#endif +#endif /* _ASSERT_H_INCLUDED */ diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/nbproject/configurations.xml b/avr128da48-cnano-ws2812-mplab-mcc.X/nbproject/configurations.xml new file mode 100644 index 0000000..9d7c903 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/nbproject/configurations.xml @@ -0,0 +1,432 @@ + + + + + + + mcc_generated_files/config/clock_config.h + + + mcc_generated_files/include/ccp.h + mcc_generated_files/include/rstctrl.h + mcc_generated_files/include/cpuint.h + mcc_generated_files/include/spi0.h + mcc_generated_files/include/port.h + mcc_generated_files/include/protected_io.h + mcc_generated_files/include/pin_manager.h + mcc_generated_files/include/tca0.h + mcc_generated_files/include/evsys.h + mcc_generated_files/include/ccl.h + + + + mcc_generated_files/utils/assembler/gas.h + mcc_generated_files/utils/assembler/iar.h + + mcc_generated_files/utils/assembler.h + mcc_generated_files/utils/compiler.h + mcc_generated_files/utils/interrupt_avr8.h + mcc_generated_files/utils/atomic.h + mcc_generated_files/utils/utils.h + mcc_generated_files/utils/utils_assert.h + + mcc_generated_files/mcc.h + + + + + + + + mcc_generated_files/src/pin_manager.c + mcc_generated_files/src/cpuint.c + mcc_generated_files/src/spi0.c + mcc_generated_files/src/protected_io.S + mcc_generated_files/src/tca0.c + mcc_generated_files/src/evsys.c + mcc_generated_files/src/ccl.c + + mcc_generated_files/device_config.c + mcc_generated_files/mcc.c + + main.c + + + Makefile + MyConfig.mc3 + + + Makefile + + + + localhost + AVR128DA48 + + + noID + XC8 + 2.31 + 3 + + + + + + + + + + + + + + + false + false + + + + + + + false + + false + + false + false + false + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + localhost + AVR128DA48 + + + noID + XC8 + 2.31 + 3 + + + + + + + + + + + + + + + false + false + + + + + + + false + + false + + false + false + false + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/avr128da48-cnano-ws2812-mplab-mcc.X/nbproject/project.xml b/avr128da48-cnano-ws2812-mplab-mcc.X/nbproject/project.xml new file mode 100644 index 0000000..cc4cb28 --- /dev/null +++ b/avr128da48-cnano-ws2812-mplab-mcc.X/nbproject/project.xml @@ -0,0 +1,31 @@ + + + com.microchip.mplab.nbide.embedded.makeproject + + + avr128da48-cnano-ws2812-mplab-mcc + 6e4782f0-477d-4431-8a1e-a387b18a3fed + 0 + c + + h + + ISO-8859-1 + + + + + free + 2 + + + pro + 2 + + + + false + + + + diff --git a/images/AVR128DA48_CNANO_instructions.PNG b/images/AVR128DA48_CNANO_instructions.PNG new file mode 100644 index 0000000..456af4d Binary files /dev/null and b/images/AVR128DA48_CNANO_instructions.PNG differ diff --git a/images/Clean_and_Build.png b/images/Clean_and_Build.png new file mode 100644 index 0000000..e415fb3 Binary files /dev/null and b/images/Clean_and_Build.png differ diff --git a/images/Demo.PNG b/images/Demo.PNG new file mode 100644 index 0000000..e25a103 Binary files /dev/null and b/images/Demo.PNG differ diff --git a/images/Demo.gif b/images/Demo.gif new file mode 100644 index 0000000..9a49c9a Binary files /dev/null and b/images/Demo.gif differ diff --git a/images/Make_and_Program_Device.png b/images/Make_and_Program_Device.png new file mode 100644 index 0000000..87e3def Binary files /dev/null and b/images/Make_and_Program_Device.png differ diff --git a/images/Selection_Tool.png b/images/Selection_Tool.png new file mode 100644 index 0000000..d24de3c Binary files /dev/null and b/images/Selection_Tool.png differ diff --git a/images/Set_as_Main_Project.png b/images/Set_as_Main_Project.png new file mode 100644 index 0000000..2d83b38 Binary files /dev/null and b/images/Set_as_Main_Project.png differ