259 wiersze
6.6 KiB
C
259 wiersze
6.6 KiB
C
/**
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* TCA1 Generated Driver File
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*
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* @file tca1.c
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*
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* @ingroup tca1_normal
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*
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* @brief This file contains the API implementations for TCA1 module driver in Normal (16-bit) mode.
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*
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* @version TCA1 Driver Version 2.1.1
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*/
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/*
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© [2023] Microchip Technology Inc. and its subsidiaries.
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Subject to your compliance with these terms, you may use Microchip
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software and any derivatives exclusively with Microchip products.
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You are responsible for complying with 3rd party license terms
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applicable to your use of 3rd party software (including open source
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software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
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NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
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SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
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MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
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WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
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KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
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MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
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FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
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TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
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EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
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THIS SOFTWARE.
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*/
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#include "../tca1.h"
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const struct TMR_INTERFACE TCA1_Interface = {
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.Initialize = TCA1_Initialize,
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.Start = TCA1_Start,
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.Stop = TCA1_Stop,
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.PeriodCountSet = TCA1_Write,
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.TimeoutCallbackRegister = TCA1_OverflowCallbackRegister,
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.Tasks = NULL
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};
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void TCA1_DefaultCompare0CallbackRegister(void);
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void (*TCA1_CMP0_isr_cb)(void) = &TCA1_DefaultCompare0CallbackRegister;
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void TCA1_DefaultCompare1CallbackRegister(void);
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void (*TCA1_CMP1_isr_cb)(void) = &TCA1_DefaultCompare1CallbackRegister;
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void TCA1_DefaultCompare2CallbackRegister(void);
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void (*TCA1_CMP2_isr_cb)(void) = &TCA1_DefaultCompare2CallbackRegister;
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void TCA1_DefaultOverflowCallbackRegister(void);
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void (*TCA1_OVF_isr_cb)(void) = &TCA1_DefaultOverflowCallbackRegister;
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void TCA1_DefaultCompare0CallbackRegister(void)
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{
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//Add your ISR code here
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}
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void TCA1_DefaultCompare1CallbackRegister(void)
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{
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//Add your ISR code here
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}
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void TCA1_DefaultCompare2CallbackRegister(void)
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{
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//Add your ISR code here
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}
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void TCA1_DefaultOverflowCallbackRegister(void)
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{
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//Add your ISR code here
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}
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void TCA1_OverflowCallbackRegister(TCA1_cb_t cb)
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{
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TCA1_OVF_isr_cb = cb;
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}
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void TCA1_Compare0CallbackRegister(TCA1_cb_t cb)
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{
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TCA1_CMP0_isr_cb = cb;
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}
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void TCA1_Compare1CallbackRegister(TCA1_cb_t cb)
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{
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TCA1_CMP1_isr_cb = cb;
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}
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void TCA1_Compare2CallbackRegister(TCA1_cb_t cb)
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{
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TCA1_CMP2_isr_cb = cb;
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}
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ISR(TCA1_CMP0_vect)
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{
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if (TCA1_CMP0_isr_cb != NULL)
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(*TCA1_CMP0_isr_cb)();
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_CMP0_bm;
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}
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ISR(TCA1_CMP1_vect)
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{
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if (TCA1_CMP1_isr_cb != NULL)
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(*TCA1_CMP1_isr_cb)();
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_CMP1_bm;
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}
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ISR(TCA1_CMP2_vect)
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{
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if (TCA1_CMP2_isr_cb != NULL)
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(*TCA1_CMP2_isr_cb)();
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_CMP2_bm;
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}
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ISR(TCA1_OVF_vect)
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{
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if (TCA1_OVF_isr_cb != NULL)
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(*TCA1_OVF_isr_cb)();
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_OVF_bm;
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}
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void TCA1_Initialize(void) {
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// Compare 0
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TCA1.SINGLE.CMP0 = 0x0;
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// Compare 1
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TCA1.SINGLE.CMP1 = 0x0;
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// Compare 2
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TCA1.SINGLE.CMP2 = 0x7FEE;
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// Count
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TCA1.SINGLE.CNT = 0x0;
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// ALUPD disabled; CMP0EN disabled; CMP1EN disabled; CMP2EN enabled; WGMODE SINGLESLOPE;
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TCA1.SINGLE.CTRLB = 0x43;
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// CMP0OV disabled; CMP1OV disabled; CMP2OV disabled;
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TCA1.SINGLE.CTRLC = 0x0;
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// SPLITM disabled;
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TCA1.SINGLE.CTRLD = 0x0;
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// CMD NONE; DIR disabled; LUPD disabled;
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TCA1.SINGLE.CTRLECLR = 0x0;
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// CMD NONE; DIR UP; LUPD disabled;
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TCA1.SINGLE.CTRLESET = 0x0;
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// CMP0BV disabled; CMP1BV disabled; CMP2BV disabled; PERBV disabled;
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TCA1.SINGLE.CTRLFCLR = 0x0;
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// CMP0BV disabled; CMP1BV disabled; CMP2BV disabled; PERBV disabled;
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TCA1.SINGLE.CTRLFSET = 0x0;
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// DBGRUN disabled;
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TCA1.SINGLE.DBGCTRL = 0x0;
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// CNTAEI disabled; CNTBEI disabled; EVACTA CNT_POSEDGE; EVACTB NONE;
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TCA1.SINGLE.EVCTRL = 0x0;
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// CMP0 disabled; CMP1 disabled; CMP2 disabled; OVF disabled;
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TCA1.SINGLE.INTCTRL = 0x0;
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// CMP0 disabled; CMP1 disabled; CMP2 disabled; OVF disabled;
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TCA1.SINGLE.INTFLAGS = 0x0;
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// Period
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TCA1.SINGLE.PER = 0xFFDB;
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// Temporary data for 16-bit Access
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TCA1.SINGLE.TEMP = 0x0;
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// CLKSEL DIV1; ENABLE enabled; RUNSTDBY disabled;
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TCA1.SINGLE.CTRLA = 0x1;
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}
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void TCA1_Start(void)
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{
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TCA1.SINGLE.CTRLA|= TCA_SINGLE_ENABLE_bm;
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}
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void TCA1_Stop(void)
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{
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TCA1.SINGLE.CTRLA&= ~TCA_SINGLE_ENABLE_bm;
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}
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void TCA1_Write(uint16_t timerVal)
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{
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TCA1.SINGLE.PER=timerVal;
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}
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uint16_t TCA1_Read(void)
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{
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uint16_t readVal;
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readVal = TCA1.SINGLE.CNT;
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return readVal;
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}
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void TCA1_EnableInterrupt(void)
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{
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TCA1.SINGLE.INTCTRL = 1 << TCA_SINGLE_CMP0_bp /* Compare 0 Interrupt: enabled */
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| 1 << TCA_SINGLE_CMP1_bp /* Compare 1 Interrupt: enabled */
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| 1 << TCA_SINGLE_CMP2_bp /* Compare 2 Interrupt: enabled */
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| 1 << TCA_SINGLE_OVF_bp; /* Overflow Interrupt: enabled */
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}
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void TCA1_DisableInterrupt(void)
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{
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TCA1.SINGLE.INTCTRL = 0 << TCA_SINGLE_CMP0_bp /* Compare 0 Interrupt: disabled */
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| 0 << TCA_SINGLE_CMP1_bp /* Compare 1 Interrupt: disabled */
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| 0 << TCA_SINGLE_CMP2_bp /* Compare 2 Interrupt: disabled */
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| 0 << TCA_SINGLE_OVF_bp; /* Overflow Interrupt: disabled */
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}
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void TCA1_ClearOverflowInterruptFlag(void)
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{
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_OVF_bm; /* Clear Overflow Interrupt Flag */
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}
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bool TCA1_IsOverflowInterruptFlagSet(void)
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{
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return ((TCA1.SINGLE.INTFLAGS & TCA_SINGLE_OVF_bm) > 0);
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}
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void TCA1_ClearCMP0InterruptFlag(void)
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{
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_CMP0_bm; /* Clear Compare Channel-0 Interrupt Flag */
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}
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bool TCA1_IsCMP0InterruptFlagSet(void)
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{
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return ((TCA1.SINGLE.INTFLAGS & TCA_SINGLE_CMP0_bm) > 0);
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}
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void TCA1_ClearCMP1InterruptFlag(void)
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{
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_CMP1_bm; /* Clear Compare Channel-1 Interrupt Flag */
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}
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bool TCA1_IsCMP1InterruptFlagSet(void)
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{
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return ((TCA1.SINGLE.INTFLAGS & TCA_SINGLE_CMP1_bm) > 0);
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}
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void TCA1_ClearCMP2InterruptFlag(void)
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{
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TCA1.SINGLE.INTFLAGS = TCA_SINGLE_CMP2_bm; /* Clear Compare Channel-2 Interrupt Flag */
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}
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bool TCA1_IsCMP2InterruptFlagSet(void)
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{
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return ((TCA1.SINGLE.INTFLAGS & TCA_SINGLE_CMP2_bm) > 0);
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} |