kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
10 wiersze
683 B
Plaintext
10 wiersze
683 B
Plaintext
DRC Rules Export File for PCB: C:\Users\User\YandexDisk\Ðàçðàáîòêè Altium\ÂÎËÊ-lite\Rev-1.0\Ñõåìà Wolf-lite V1.0\Wolf-Lite1\WL-MAIN.PcbDoc
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RuleKind=Clearance|RuleName=POWER|Scope=Board|Minimum=11.81
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RuleKind=ShortCircuit|RuleName=ShortCircuit|Scope=Board|Allowed=0
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RuleKind=SolderMaskExpansion|RuleName=SolderMaskExpansion|Scope=Board|Minimum=2.95
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RuleKind=Width|RuleName=Width|Scope=Board|Minimum=5.91
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RuleKind=Clearance|RuleName=Clearance|Scope=Board|Minimum=5.91
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RuleKind=Clearance|RuleName=Clearance_Polygon|Scope=Board|Minimum=7.87
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RuleKind=Clearance|RuleName=Clearance_MultiLayerPad|Scope=Board|Minimum=9.84
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RuleKind=Clearance|RuleName=Clearance_NPTH|Scope=Board|Minimum=15.75
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