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.qsys_edit
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DEBUG
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DEBUG2
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F61.440
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2021-10-26 20:53:31 +03:00 |
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clock_buffer
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F61.440
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2021-10-26 20:53:31 +03:00 |
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db
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F61.440
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2021-10-26 20:53:31 +03:00 |
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greybox_tmp
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F61.440
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2021-10-26 20:53:31 +03:00 |
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incremental_db
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F61.440
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2021-10-26 20:53:31 +03:00 |
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nco
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F61.440
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2021-10-26 20:53:31 +03:00 |
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output_files
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_cic
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp_sim
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_cic
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp_sim
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_nco
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F61.440
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2021-10-26 20:53:31 +03:00 |
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ADC_Latch.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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ADC_Latch.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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ADC_Latch.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DAC_corrector.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DAC_corrector.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DEBUG.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DEBUG.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DEBUG2.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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DEBUG2.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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Debug_Probes.spf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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MAIN_PLL.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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MAIN_PLL.ppf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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MAIN_PLL.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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MAIN_PLL.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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SDC.sdc
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE.bdf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE.cof
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE.qpf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE.qsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE.qws
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE.srf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF-LITE_description.txt
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF_assignment_defaults.qdf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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WOLF_description.txt
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F61.440
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2021-10-26 20:53:31 +03:00 |
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auto_convert.tcl
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F61.440
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2021-10-26 20:53:31 +03:00 |
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clock_buffer.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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clock_buffer.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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dac_null.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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dac_null.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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dac_null.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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data_shifter.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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data_shifter.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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dcdc_pll.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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dcdc_pll.ppf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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dcdc_pll.qip
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2021-10-26 20:53:31 +03:00 |
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dcdc_pll.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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diffclock_buff.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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diffclock_buff.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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diffclock_buff.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mixer.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mixer.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mixer.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux1.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux1.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux1.v
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F61.440
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mux14.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux14.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux14.v
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F61.440
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mux16.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux16.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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mux16.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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nco.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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nco.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_cic.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_cic.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp.cmp
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp.sip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp.spd
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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rx_ciccomp_sim.f
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F61.440
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2021-10-26 20:53:31 +03:00 |
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spi_interface.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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spi_interface.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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stm32_interface.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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stm32_interface.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_cic.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_cic.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp.cmp
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp.sip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp.spd
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_ciccomp_sim.f
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_mixer.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_mixer.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_mixer.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_nco.qsys
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_nco.sopcinfo
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_pll.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_pll.ppf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_pll.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_pll.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_summator.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_summator.qip
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F61.440
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2021-10-26 20:53:31 +03:00 |
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tx_summator.v
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F61.440
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2021-10-26 20:53:31 +03:00 |
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vcxo_controller.bsf
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F61.440
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2021-10-26 20:53:31 +03:00 |
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vcxo_controller.v
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