kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
4624 wiersze
1.7 MiB
4624 wiersze
1.7 MiB
Timing Analyzer report for WOLF-LITE
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Thu Jan 07 18:22:33 2021
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Quartus Prime Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Timing Analyzer Summary
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3. Parallel Compilation
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4. SDC File List
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5. Clocks
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6. Slow 1200mV 85C Model Fmax Summary
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7. Timing Closure Recommendations
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8. Slow 1200mV 85C Model Setup Summary
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9. Slow 1200mV 85C Model Hold Summary
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10. Slow 1200mV 85C Model Recovery Summary
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11. Slow 1200mV 85C Model Removal Summary
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12. Slow 1200mV 85C Model Minimum Pulse Width Summary
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13. Slow 1200mV 85C Model Setup: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]'
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14. Slow 1200mV 85C Model Setup: 'clk_sys'
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15. Slow 1200mV 85C Model Setup: 'clock_stm32'
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16. Slow 1200mV 85C Model Setup: 'altera_reserved_tck'
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17. Slow 1200mV 85C Model Hold: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]'
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18. Slow 1200mV 85C Model Hold: 'clk_sys'
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19. Slow 1200mV 85C Model Hold: 'altera_reserved_tck'
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20. Slow 1200mV 85C Model Hold: 'clock_stm32'
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21. Slow 1200mV 85C Model Recovery: 'clk_sys'
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22. Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'
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23. Slow 1200mV 85C Model Removal: 'altera_reserved_tck'
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24. Slow 1200mV 85C Model Removal: 'clk_sys'
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25. Slow 1200mV 85C Model Metastability Summary
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26. Slow 1200mV 0C Model Fmax Summary
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27. Slow 1200mV 0C Model Setup Summary
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28. Slow 1200mV 0C Model Hold Summary
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29. Slow 1200mV 0C Model Recovery Summary
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30. Slow 1200mV 0C Model Removal Summary
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31. Slow 1200mV 0C Model Minimum Pulse Width Summary
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32. Slow 1200mV 0C Model Setup: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]'
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33. Slow 1200mV 0C Model Setup: 'clk_sys'
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34. Slow 1200mV 0C Model Setup: 'clock_stm32'
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35. Slow 1200mV 0C Model Setup: 'altera_reserved_tck'
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36. Slow 1200mV 0C Model Hold: 'clk_sys'
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37. Slow 1200mV 0C Model Hold: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]'
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38. Slow 1200mV 0C Model Hold: 'altera_reserved_tck'
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39. Slow 1200mV 0C Model Hold: 'clock_stm32'
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40. Slow 1200mV 0C Model Recovery: 'clk_sys'
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41. Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'
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42. Slow 1200mV 0C Model Removal: 'altera_reserved_tck'
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43. Slow 1200mV 0C Model Removal: 'clk_sys'
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44. Slow 1200mV 0C Model Metastability Summary
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45. Fast 1200mV 0C Model Setup Summary
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46. Fast 1200mV 0C Model Hold Summary
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47. Fast 1200mV 0C Model Recovery Summary
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48. Fast 1200mV 0C Model Removal Summary
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49. Fast 1200mV 0C Model Minimum Pulse Width Summary
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50. Fast 1200mV 0C Model Setup: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]'
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51. Fast 1200mV 0C Model Setup: 'clk_sys'
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52. Fast 1200mV 0C Model Setup: 'clock_stm32'
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53. Fast 1200mV 0C Model Setup: 'altera_reserved_tck'
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54. Fast 1200mV 0C Model Hold: 'clk_sys'
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55. Fast 1200mV 0C Model Hold: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]'
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56. Fast 1200mV 0C Model Hold: 'altera_reserved_tck'
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57. Fast 1200mV 0C Model Hold: 'clock_stm32'
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58. Fast 1200mV 0C Model Recovery: 'clk_sys'
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59. Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'
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60. Fast 1200mV 0C Model Removal: 'altera_reserved_tck'
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61. Fast 1200mV 0C Model Removal: 'clk_sys'
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62. Fast 1200mV 0C Model Metastability Summary
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63. Multicorner Timing Analysis Summary
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64. Board Trace Model Assignments
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65. Input Transition Times
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66. Signal Integrity Metrics (Slow 1200mv 0c Model)
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67. Signal Integrity Metrics (Slow 1200mv 85c Model)
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68. Signal Integrity Metrics (Fast 1200mv 0c Model)
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69. Setup Transfers
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70. Hold Transfers
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71. Recovery Transfers
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72. Removal Transfers
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73. Report TCCS
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74. Report RSKM
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75. Unconstrained Paths Summary
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76. Clock Status Summary
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77. Unconstrained Input Ports
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78. Unconstrained Output Ports
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79. Unconstrained Input Ports
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80. Unconstrained Output Ports
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81. Timing Analyzer Messages
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82. Timing Analyzer Suppressed Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 2018 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details.
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+---------------------------------------------------------------------------------+
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; Timing Analyzer Summary ;
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+-----------------------+---------------------------------------------------------+
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; Quartus Prime Version ; Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition ;
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; Timing Analyzer ; Legacy Timing Analyzer ;
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; Revision Name ; WOLF-LITE ;
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; Device Family ; Cyclone IV E ;
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; Device Name ; EP4CE10E22C8 ;
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; Timing Models ; Final ;
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; Delay Model ; Combined ;
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; Rise/Fall Delays ; Enabled ;
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+-----------------------+---------------------------------------------------------+
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+------------------------------------------+
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; Parallel Compilation ;
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+----------------------------+-------------+
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; Processors ; Number ;
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+----------------------------+-------------+
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; Number detected on machine ; 8 ;
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; Maximum allowed ; 4 ;
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; ; ;
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; Average used ; 1.52 ;
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; Maximum used ; 4 ;
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; ; ;
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; Usage by Processor ; % Time Used ;
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; Processor 1 ; 100.0% ;
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; Processor 2 ; 24.0% ;
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; Processor 3 ; 15.9% ;
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; Processor 4 ; 11.8% ;
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+----------------------------+-------------+
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+---------------------------------------------------+
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; SDC File List ;
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+---------------+--------+--------------------------+
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; SDC File Path ; Status ; Read at ;
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+---------------+--------+--------------------------+
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; SDC.sdc ; OK ; Thu Jan 07 18:22:27 2021 ;
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+---------------+--------+--------------------------+
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Clocks ;
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+------------------------------------------------------+-----------+-----------+-----------+-------+-----------+------------+-----------+-------------+-------+--------+-----------+------------+----------+---------+--------------------------------------------------------+----------------------------------------------------------+
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; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ;
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+------------------------------------------------------+-----------+-----------+-----------+-------+-----------+------------+-----------+-------------+-------+--------+-----------+------------+----------+---------+--------------------------------------------------------+----------------------------------------------------------+
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; altera_reserved_tck ; Base ; 100.000 ; 10.0 MHz ; 0.000 ; 50.000 ; ; ; ; ; ; ; ; ; ; ; { altera_reserved_tck } ;
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; clk_sys ; Base ; 15.547 ; 64.32 MHz ; 0.000 ; 7.773 ; ; ; ; ; ; ; ; ; ; ; { clk_sys } ;
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; clock_stm32 ; Base ; 40.000 ; 25.0 MHz ; 0.000 ; 20.000 ; ; ; ; ; ; ; ; ; ; ; { STM32_CLK } ;
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; MAIN_PLL|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 81.378 ; 12.29 MHz ; 0.000 ; 40.689 ; 50.00 ; 335 ; 64 ; ; ; ; ; false ; clk_sys ; MAIN_PLL|altpll_component|auto_generated|pll1|inclk[0] ; { MAIN_PLL|altpll_component|auto_generated|pll1|clk[0] } ;
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; MAIN_PLL|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 20832.980 ; 0.05 MHz ; 0.000 ; 10416.490 ; 50.00 ; 1340 ; 1 ; ; ; ; ; false ; clk_sys ; MAIN_PLL|altpll_component|auto_generated|pll1|inclk[0] ; { MAIN_PLL|altpll_component|auto_generated|pll1|clk[1] } ;
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; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 6.218 ; 160.8 MHz ; 0.000 ; 3.109 ; 50.00 ; 2 ; 5 ; ; ; ; ; false ; clk_sys ; TX_PLL|altpll_component|auto_generated|pll1|inclk[0] ; { TX_PLL|altpll_component|auto_generated|pll1|clk[0] } ;
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+------------------------------------------------------+-----------+-----------+-----------+-------+-----------+------------+-----------+-------------+-------+--------+-----------+------------+----------+---------+--------------------------------------------------------+----------------------------------------------------------+
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+------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Fmax Summary ;
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+------------+-----------------+----------------------------------------------------+------+
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; Fmax ; Restricted Fmax ; Clock Name ; Note ;
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+------------+-----------------+----------------------------------------------------+------+
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; 83.89 MHz ; 83.89 MHz ; clk_sys ; ;
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; 94.14 MHz ; 94.14 MHz ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; ;
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; 100.27 MHz ; 100.27 MHz ; clock_stm32 ; ;
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; 103.31 MHz ; 103.31 MHz ; altera_reserved_tck ; ;
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+------------+-----------------+----------------------------------------------------+------+
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This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
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----------------------------------
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; Timing Closure Recommendations ;
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----------------------------------
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HTML report is unavailable in plain text report export.
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+-----------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Setup Summary ;
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+----------------------------------------------------+--------+---------------+
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; Clock ; Slack ; End Point TNS ;
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+----------------------------------------------------+--------+---------------+
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; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; -4.404 ; -388.058 ;
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; clk_sys ; 1.814 ; 0.000 ;
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; clock_stm32 ; 30.027 ; 0.000 ;
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; altera_reserved_tck ; 45.160 ; 0.000 ;
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+----------------------------------------------------+--------+---------------+
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+----------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Hold Summary ;
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+----------------------------------------------------+-------+---------------+
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; Clock ; Slack ; End Point TNS ;
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+----------------------------------------------------+-------+---------------+
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; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.400 ; 0.000 ;
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; clk_sys ; 0.401 ; 0.000 ;
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; altera_reserved_tck ; 0.452 ; 0.000 ;
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; clock_stm32 ; 0.485 ; 0.000 ;
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+----------------------------------------------------+-------+---------------+
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+----------------------------------------------+
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; Slow 1200mV 85C Model Recovery Summary ;
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+---------------------+--------+---------------+
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; Clock ; Slack ; End Point TNS ;
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+---------------------+--------+---------------+
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; clk_sys ; 3.227 ; 0.000 ;
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; altera_reserved_tck ; 96.012 ; 0.000 ;
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+---------------------+--------+---------------+
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+----------------------------------------------+
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; Slow 1200mV 85C Model Removal Summary ;
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+---------------------+--------+---------------+
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; Clock ; Slack ; End Point TNS ;
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+---------------------+--------+---------------+
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; altera_reserved_tck ; 1.284 ; 0.000 ;
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; clk_sys ; 11.143 ; 0.000 ;
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+---------------------+--------+---------------+
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+-----------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Minimum Pulse Width Summary ;
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+----------------------------------------------------+--------+---------------+
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; Clock ; Slack ; End Point TNS ;
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+----------------------------------------------------+--------+---------------+
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; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 1.218 ; 0.000 ;
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; clk_sys ; 7.177 ; 0.000 ;
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; clock_stm32 ; 19.682 ; 0.000 ;
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; altera_reserved_tck ; 49.522 ; 0.000 ;
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+----------------------------------------------------+--------+---------------+
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+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Setup: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]' ;
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+--------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+--------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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; -4.404 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.653 ;
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; -4.402 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.651 ;
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; -4.395 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.644 ;
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; -4.371 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.620 ;
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; -4.367 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.609 ;
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; -4.357 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.597 ;
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; -4.346 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.586 ;
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; -4.333 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.561 ;
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; -4.326 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.566 ;
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; -4.316 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.565 ;
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; -4.302 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.547 ;
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; -4.302 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.551 ;
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; -4.300 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.528 ;
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; -4.296 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.545 ;
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; -4.293 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.542 ;
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; -4.290 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.539 ;
|
|
; -4.283 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.532 ;
|
|
; -4.269 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.518 ;
|
|
; -4.258 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.507 ;
|
|
; -4.256 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.505 ;
|
|
; -4.253 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.498 ;
|
|
; -4.249 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.498 ;
|
|
; -4.226 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.475 ;
|
|
; -4.225 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.474 ;
|
|
; -4.221 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.463 ;
|
|
; -4.214 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.463 ;
|
|
; -4.211 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.451 ;
|
|
; -4.200 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.440 ;
|
|
; -4.197 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.470 ;
|
|
; -4.191 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.433 ;
|
|
; -4.190 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.463 ;
|
|
; -4.187 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.415 ;
|
|
; -4.181 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.421 ;
|
|
; -4.180 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.420 ;
|
|
; -4.170 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.410 ;
|
|
; -4.170 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.419 ;
|
|
; -4.167 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.024 ; 10.410 ;
|
|
; -4.166 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.439 ;
|
|
; -4.162 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.004 ; 10.385 ;
|
|
; -4.162 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.435 ;
|
|
; -4.157 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.385 ;
|
|
; -4.156 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.401 ;
|
|
; -4.156 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.405 ;
|
|
; -4.154 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.382 ;
|
|
; -4.150 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.390 ;
|
|
; -4.150 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.399 ;
|
|
; -4.147 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.396 ;
|
|
; -4.147 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.004 ; 10.370 ;
|
|
; -4.146 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.024 ; 10.389 ;
|
|
; -4.144 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.393 ;
|
|
; -4.140 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.024 ; 10.383 ;
|
|
; -4.137 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.386 ;
|
|
; -4.127 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.024 ; 10.370 ;
|
|
; -4.126 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.371 ;
|
|
; -4.124 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.352 ;
|
|
; -4.123 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.372 ;
|
|
; -4.120 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.369 ;
|
|
; -4.114 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.363 ;
|
|
; -4.112 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.361 ;
|
|
; -4.110 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.359 ;
|
|
; -4.107 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.352 ;
|
|
; -4.107 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.356 ;
|
|
; -4.103 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.352 ;
|
|
; -4.096 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.025 ; 10.340 ;
|
|
; -4.084 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.329 ;
|
|
; -4.080 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.325 ;
|
|
; -4.080 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.329 ;
|
|
; -4.079 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.328 ;
|
|
; -4.077 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.026 ; 10.322 ;
|
|
; -4.075 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.317 ;
|
|
; -4.071 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.011 ; 10.301 ;
|
|
; -4.068 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.310 ;
|
|
; -4.068 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.317 ;
|
|
; -4.065 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.305 ;
|
|
; -4.064 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.292 ;
|
|
; -4.054 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.294 ;
|
|
; -4.053 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.295 ;
|
|
; -4.051 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.324 ;
|
|
; -4.050 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.000 ; 10.269 ;
|
|
; -4.049 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.017 ; 10.251 ;
|
|
; -4.045 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 10.287 ;
|
|
; -4.044 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.317 ;
|
|
; -4.043 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.283 ;
|
|
; -4.041 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.269 ;
|
|
; -4.041 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.015 ; 10.275 ;
|
|
; -4.035 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.275 ;
|
|
; -4.034 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.274 ;
|
|
; -4.032 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.017 ; 10.234 ;
|
|
; -4.029 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.009 ; 10.257 ;
|
|
; -4.024 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.021 ; 10.264 ;
|
|
; -4.024 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.030 ; 10.273 ;
|
|
; -4.021 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.033 ; 10.273 ;
|
|
; -4.021 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.024 ; 10.264 ;
|
|
; -4.021 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.294 ;
|
|
; -4.020 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.000 ; 10.239 ;
|
|
; -4.020 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.007 ; 10.246 ;
|
|
; -4.020 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.293 ;
|
|
; -4.016 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.004 ; 10.239 ;
|
|
; -4.016 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.289 ;
|
|
; -4.014 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.054 ; 10.287 ;
|
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+--------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Setup: 'clk_sys' ;
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+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[85] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
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; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[84] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
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; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[83] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[82] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
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|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[81] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[80] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[79] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[78] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[77] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[76] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 1.814 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[75] ; clk_sys ; clk_sys ; 7.774 ; -0.197 ; 5.764 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[42] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[41] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[40] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[39] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[38] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[37] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[36] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[35] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[34] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[33] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[32] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[31] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[30] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[29] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[28] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.139 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[27] ; clk_sys ; clk_sys ; 7.774 ; -0.225 ; 5.411 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[58] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[57] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[56] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[55] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[54] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[53] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[52] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[51] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[50] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[49] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[48] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[47] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[46] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[45] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[44] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.151 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[43] ; clk_sys ; clk_sys ; 7.774 ; -0.226 ; 5.398 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[26] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[25] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[24] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[23] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[22] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[21] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[20] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[19] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[18] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[17] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[16] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[15] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[14] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[13] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[12] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.172 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[11] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.379 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[58] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[57] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[56] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[55] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[54] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[53] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[52] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[51] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[50] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[49] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[48] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[47] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[46] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[45] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[44] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.202 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[43] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.380 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[10] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[9] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[8] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[7] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[6] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[5] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[4] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[3] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[2] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[1] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.213 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[0] ; clk_sys ; clk_sys ; 7.774 ; -0.224 ; 5.338 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[42] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[41] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[40] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[39] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[38] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[37] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[36] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[35] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[34] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[33] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[32] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[31] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[30] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
; 2.245 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[29] ; clk_sys ; clk_sys ; 7.774 ; -0.193 ; 5.337 ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Setup: 'clock_stm32' ;
|
|
+--------+-------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 30.027 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[7] ; STM32_DATA_BUS[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.884 ; 7.053 ;
|
|
; 30.743 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.202 ; 7.019 ;
|
|
; 30.936 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 11.614 ;
|
|
; 31.022 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 11.528 ;
|
|
; 31.074 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 11.028 ;
|
|
; 31.160 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.942 ;
|
|
; 31.219 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 11.272 ;
|
|
; 31.287 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 11.204 ;
|
|
; 31.305 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 11.186 ;
|
|
; 31.373 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 11.118 ;
|
|
; 31.375 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 11.116 ;
|
|
; 31.419 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.042 ; 8.560 ;
|
|
; 31.426 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.676 ;
|
|
; 31.461 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 11.030 ;
|
|
; 31.463 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 11.087 ;
|
|
; 31.484 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.475 ; 10.976 ;
|
|
; 31.504 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.042 ; 8.475 ;
|
|
; 31.504 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.042 ; 8.475 ;
|
|
; 31.512 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.590 ;
|
|
; 31.549 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 8.415 ;
|
|
; 31.549 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 11.001 ;
|
|
; 31.560 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; STM32_DATA_BUS[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.957 ; 5.447 ;
|
|
; 31.570 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.475 ; 10.890 ;
|
|
; 31.571 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.979 ;
|
|
; 31.583 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.042 ; 8.396 ;
|
|
; 31.588 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.962 ;
|
|
; 31.600 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.049 ; 8.372 ;
|
|
; 31.620 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.930 ;
|
|
; 31.628 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.479 ; 7.914 ;
|
|
; 31.631 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.441 ; 7.949 ;
|
|
; 31.677 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 8.287 ;
|
|
; 31.677 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 8.287 ;
|
|
; 31.685 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.441 ; 7.895 ;
|
|
; 31.704 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.809 ; 11.090 ;
|
|
; 31.709 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.393 ;
|
|
; 31.710 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.363 ; 8.674 ;
|
|
; 31.716 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.441 ; 7.864 ;
|
|
; 31.716 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.441 ; 7.864 ;
|
|
; 31.726 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.376 ;
|
|
; 31.748 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.119 ; 8.392 ;
|
|
; 31.758 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.344 ;
|
|
; 31.790 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.809 ; 11.004 ;
|
|
; 31.794 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.756 ;
|
|
; 31.795 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.363 ; 8.589 ;
|
|
; 31.795 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.363 ; 8.589 ;
|
|
; 31.854 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.234 ; 7.933 ;
|
|
; 31.854 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.637 ;
|
|
; 31.871 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.620 ;
|
|
; 31.880 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.670 ;
|
|
; 31.903 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.588 ;
|
|
; 31.922 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.569 ;
|
|
; 31.931 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.163 ; 7.927 ;
|
|
; 31.936 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 8.028 ;
|
|
; 31.939 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.552 ;
|
|
; 31.944 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.202 ; 5.818 ;
|
|
; 31.958 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; STM32_DATA_BUS[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.957 ; 5.049 ;
|
|
; 31.971 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.520 ;
|
|
; 32.010 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.481 ;
|
|
; 32.021 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.943 ;
|
|
; 32.021 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.943 ;
|
|
; 32.027 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.464 ;
|
|
; 32.032 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.119 ; 8.108 ;
|
|
; 32.055 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; STM32_DATA_BUS[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.981 ; 4.928 ;
|
|
; 32.056 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.908 ;
|
|
; 32.056 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.908 ;
|
|
; 32.059 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.506 ; 10.432 ;
|
|
; 32.061 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.041 ;
|
|
; 32.070 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.251 ; 8.202 ;
|
|
; 32.076 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.888 ;
|
|
; 32.078 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.886 ;
|
|
; 32.078 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 10.024 ;
|
|
; 32.081 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.163 ; 7.777 ;
|
|
; 32.096 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.570 ; 8.495 ;
|
|
; 32.098 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.452 ;
|
|
; 32.110 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.117 ; 9.992 ;
|
|
; 32.114 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.303 ; 8.210 ;
|
|
; 32.115 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.435 ;
|
|
; 32.119 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.475 ; 10.341 ;
|
|
; 32.136 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.475 ; 10.324 ;
|
|
; 32.138 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.234 ; 7.649 ;
|
|
; 32.142 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.822 ;
|
|
; 32.147 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.565 ; 10.403 ;
|
|
; 32.152 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.119 ; 7.988 ;
|
|
; 32.158 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.163 ; 7.700 ;
|
|
; 32.163 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.801 ;
|
|
; 32.168 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.475 ; 10.292 ;
|
|
; 32.171 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.049 ; 7.801 ;
|
|
; 32.172 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.148 ; 7.701 ;
|
|
; 32.174 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.363 ; 8.210 ;
|
|
; 32.179 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.479 ; 7.363 ;
|
|
; 32.206 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.057 ; 7.758 ;
|
|
; 32.216 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.163 ; 7.642 ;
|
|
; 32.221 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.479 ; 7.321 ;
|
|
; 32.222 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|I_HOLD[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.281 ; 8.080 ;
|
|
; 32.222 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|I_HOLD[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.281 ; 8.080 ;
|
|
; 32.246 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.474 ; 7.301 ;
|
|
; 32.246 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.441 ; 7.334 ;
|
|
; 32.250 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.042 ; 7.729 ;
|
|
; 32.252 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.474 ; 7.295 ;
|
|
; 32.253 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.889 ; 10.621 ;
|
|
+--------+-------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Setup: 'altera_reserved_tck' ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; 45.160 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 5.021 ;
|
|
; 45.208 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 4.973 ;
|
|
; 45.574 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 4.607 ;
|
|
; 45.816 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.164 ; 4.349 ;
|
|
; 46.235 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 3.946 ;
|
|
; 46.401 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.167 ; 3.767 ;
|
|
; 46.594 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.168 ; 3.575 ;
|
|
; 46.779 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.167 ; 3.389 ;
|
|
; 46.949 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 3.232 ;
|
|
; 47.029 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 3.152 ;
|
|
; 47.236 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.175 ; 2.940 ;
|
|
; 47.307 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.875 ;
|
|
; 47.323 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.859 ;
|
|
; 47.522 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.175 ; 2.654 ;
|
|
; 47.574 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.608 ;
|
|
; 47.593 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.589 ;
|
|
; 47.706 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.476 ;
|
|
; 47.993 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.180 ; 2.188 ;
|
|
; 48.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.150 ;
|
|
; 48.046 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.181 ; 2.136 ;
|
|
; 94.820 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.103 ;
|
|
; 94.820 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.103 ;
|
|
; 94.820 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.103 ;
|
|
; 94.855 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.068 ;
|
|
; 94.855 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.068 ;
|
|
; 94.855 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.068 ;
|
|
; 94.855 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.078 ; 5.068 ;
|
|
; 94.927 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 5.007 ;
|
|
; 94.930 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 5.004 ;
|
|
; 94.934 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 5.000 ;
|
|
; 94.935 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 4.999 ;
|
|
; 94.936 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 4.998 ;
|
|
; 94.937 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 4.997 ;
|
|
; 94.938 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 4.996 ;
|
|
; 94.976 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.961 ;
|
|
; 94.976 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.961 ;
|
|
; 94.976 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.961 ;
|
|
; 94.976 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.961 ;
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; 95.005 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.930 ;
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|
; 95.005 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.930 ;
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; 95.005 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.930 ;
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; 95.044 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.891 ;
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|
; 95.044 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.891 ;
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; 95.044 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.891 ;
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|
; 95.044 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.066 ; 4.891 ;
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|
; 95.045 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.088 ; 4.868 ;
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|
; 95.045 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.088 ; 4.868 ;
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|
; 95.045 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.088 ; 4.868 ;
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; 95.045 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.088 ; 4.868 ;
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|
; 95.045 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.088 ; 4.868 ;
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; 95.134 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.803 ;
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; 95.134 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.803 ;
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; 95.134 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.803 ;
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; 95.134 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.803 ;
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; 95.144 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.076 ; 4.781 ;
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; 95.144 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.076 ; 4.781 ;
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; 95.144 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.076 ; 4.781 ;
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; 95.144 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.076 ; 4.781 ;
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; 95.163 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.773 ;
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; 95.163 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.773 ;
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; 95.163 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.773 ;
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|
; 95.198 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.738 ;
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; 95.198 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.738 ;
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|
; 95.198 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.738 ;
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|
; 95.198 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.738 ;
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; 95.255 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.657 ;
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|
; 95.255 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.657 ;
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; 95.255 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.657 ;
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; 95.255 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.657 ;
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; 95.275 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.067 ; 4.659 ;
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; 95.360 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.076 ; 4.565 ;
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; 95.381 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.556 ;
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; 95.381 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.556 ;
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; 95.381 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.556 ;
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|
; 95.381 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.556 ;
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|
; 95.391 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.065 ; 4.545 ;
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|
; 95.402 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.510 ;
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; 95.402 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.510 ;
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|
; 95.402 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.510 ;
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|
; 95.402 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.510 ;
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|
; 95.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.093 ; 4.400 ;
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|
; 95.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.093 ; 4.400 ;
|
|
; 95.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.093 ; 4.400 ;
|
|
; 95.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.093 ; 4.400 ;
|
|
; 95.509 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.428 ;
|
|
; 95.509 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.428 ;
|
|
; 95.509 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.428 ;
|
|
; 95.509 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 4.428 ;
|
|
; 95.522 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.390 ;
|
|
; 95.522 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.390 ;
|
|
; 95.522 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.390 ;
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; 95.522 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.390 ;
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; 95.522 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.089 ; 4.390 ;
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; 95.524 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.409 ;
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; 95.527 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.406 ;
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; 95.531 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.402 ;
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; 95.532 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.401 ;
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; 95.533 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.400 ;
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; 95.534 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.399 ;
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; 95.535 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 4.398 ;
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Hold: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]' ;
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+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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; 0.400 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.134 ;
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; 0.407 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][9] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.481 ; 1.142 ;
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; 0.409 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][4] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.481 ; 1.144 ;
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; 0.409 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][6] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.142 ;
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; 0.412 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][11] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.145 ;
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; 0.413 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][10] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.146 ;
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; 0.417 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.487 ; 1.158 ;
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; 0.418 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.152 ;
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; 0.421 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][14] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.155 ;
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; 0.428 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][1] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.162 ;
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; 0.434 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.487 ; 1.175 ;
|
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; 0.436 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][9] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.169 ;
|
|
; 0.444 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.474 ; 1.172 ;
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; 0.447 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][15] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.181 ;
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; 0.448 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.181 ;
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; 0.449 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.472 ; 1.175 ;
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|
; 0.450 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[4] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.184 ;
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; 0.451 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][14] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.184 ;
|
|
; 0.452 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[3] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.474 ; 1.180 ;
|
|
; 0.452 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[1] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|\u0_m0_wo0_run_clkproc:u0_m0_wo0_run_enable_c[6] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|\u0_m0_wo0_run_clkproc:u0_m0_wo0_run_enable_c[6] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
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|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.454 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ;
|
|
; 0.455 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.189 ;
|
|
; 0.455 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.479 ; 1.188 ;
|
|
; 0.456 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.190 ;
|
|
; 0.458 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][15] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.487 ; 1.199 ;
|
|
; 0.462 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.481 ; 1.197 ;
|
|
; 0.462 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[3] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.196 ;
|
|
; 0.463 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[1] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.197 ;
|
|
; 0.463 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[5] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.197 ;
|
|
; 0.464 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.480 ; 1.198 ;
|
|
; 0.464 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.758 ;
|
|
; 0.464 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.758 ;
|
|
; 0.464 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count1_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count1_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.758 ;
|
|
; 0.464 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.082 ; 0.758 ;
|
|
; 0.465 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[4] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.474 ; 1.193 ;
|
|
; 0.465 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.758 ;
|
|
; 0.465 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.758 ;
|
|
; 0.465 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.081 ; 0.758 ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Hold: 'clk_sys' ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[21] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.139 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[25] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.139 ;
|
|
; 0.402 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[45] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.140 ;
|
|
; 0.404 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[79] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.142 ;
|
|
; 0.405 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[26] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.143 ;
|
|
; 0.407 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[27] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.485 ; 1.146 ;
|
|
; 0.408 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[7] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.145 ;
|
|
; 0.409 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.146 ;
|
|
; 0.409 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.146 ;
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|
; 0.411 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][0] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.486 ; 1.151 ;
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; 0.411 ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.487 ; 1.152 ;
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; 0.411 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[47] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.149 ;
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; 0.413 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[20] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.151 ;
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; 0.414 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][10] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.486 ; 1.154 ;
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; 0.414 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[43] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.152 ;
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; 0.415 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[44] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.153 ;
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; 0.417 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.154 ;
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; 0.418 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[11] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.481 ; 1.153 ;
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; 0.418 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][12] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.486 ; 1.158 ;
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; 0.418 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.481 ; 1.153 ;
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; 0.420 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][3] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.486 ; 1.160 ;
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; 0.422 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.486 ; 1.162 ;
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; 0.422 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[74] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.480 ; 1.156 ;
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; 0.424 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[22] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.162 ;
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; 0.425 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[23] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.163 ;
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; 0.426 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[6] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.163 ;
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; 0.428 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[80] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.489 ; 1.171 ;
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; 0.428 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[77] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.166 ;
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; 0.436 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[3] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.173 ;
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; 0.437 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[24] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.175 ;
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; 0.440 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[46] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.484 ; 1.178 ;
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; 0.442 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~porta_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.474 ; 1.170 ;
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; 0.442 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~portb_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.475 ; 1.171 ;
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; 0.443 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[84] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.489 ; 1.186 ;
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; 0.445 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][11] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.486 ; 1.185 ;
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; 0.446 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[15] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.481 ; 1.181 ;
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; 0.446 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[61] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.480 ; 1.180 ;
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; 0.450 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[4] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.187 ;
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; 0.450 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[80] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.483 ; 1.187 ;
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; 0.452 ; spi_interface:FLASH|MOSI_DQ0 ; spi_interface:FLASH|MOSI_DQ0 ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|CS_S ; spi_interface:FLASH|CS_S ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|SCK_C ; spi_interface:FLASH|SCK_C ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[0] ; spi_interface:FLASH|data_out[0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[1] ; spi_interface:FLASH|data_out[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[2] ; spi_interface:FLASH|data_out[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[3] ; spi_interface:FLASH|data_out[3] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[4] ; spi_interface:FLASH|data_out[4] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[5] ; spi_interface:FLASH|data_out[5] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[6] ; spi_interface:FLASH|data_out[6] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|busy ; spi_interface:FLASH|busy ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|data_out[7] ; spi_interface:FLASH|data_out[7] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|spi_stage[5] ; spi_interface:FLASH|spi_stage[5] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; spi_interface:FLASH|spi_stage[1] ; spi_interface:FLASH|spi_stage[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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|
; 0.452 ; spi_interface:FLASH|continue_read_prev ; spi_interface:FLASH|continue_read_prev ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|dffe_nae ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|dffe_nae ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_0_dff ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_0_dff ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_1_dff ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_1_dff ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|full_dff ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|full_dff ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cs[9] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cs[9] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cs[10] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cs[10] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[0] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[0] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[1] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[1] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[2] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[3] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[3] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[4] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[5] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[5] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[6] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[6] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[7] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[7] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[8] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[8] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[21] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[21] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[20] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[20] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[19] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[19] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
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; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[18] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[18] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[17] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[17] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[16] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[16] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[15] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[15] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[14] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[14] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[13] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[13] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[12] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[12] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[11] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[11] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_f[2] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_f[2] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
|
|
; 0.452 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_f[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_f[4] ; clk_sys ; clk_sys ; 0.000 ; 0.082 ; 0.746 ;
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+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Hold: 'altera_reserved_tck' ;
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+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; 0.452 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.746 ;
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; 0.452 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.746 ;
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; 0.453 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
|
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
|
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
|
|
; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.453 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.746 ;
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; 0.465 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.758 ;
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; 0.484 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.777 ;
|
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; 0.492 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.785 ;
|
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; 0.493 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.786 ;
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|
; 0.493 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.786 ;
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|
; 0.500 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.794 ;
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; 0.501 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.795 ;
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; 0.501 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.794 ;
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|
; 0.502 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.796 ;
|
|
; 0.509 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.802 ;
|
|
; 0.509 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.802 ;
|
|
; 0.510 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[14] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.803 ;
|
|
; 0.513 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.806 ;
|
|
; 0.527 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.820 ;
|
|
; 0.530 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.823 ;
|
|
; 0.566 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.859 ;
|
|
; 0.581 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.874 ;
|
|
; 0.583 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.876 ;
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|
; 0.633 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.926 ;
|
|
; 0.639 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.933 ;
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|
; 0.640 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.934 ;
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; 0.640 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.934 ;
|
|
; 0.640 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.934 ;
|
|
; 0.640 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.933 ;
|
|
; 0.641 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.934 ;
|
|
; 0.641 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.934 ;
|
|
; 0.641 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.934 ;
|
|
; 0.641 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.934 ;
|
|
; 0.641 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[14] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.934 ;
|
|
; 0.641 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.934 ;
|
|
; 0.642 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.935 ;
|
|
; 0.642 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.935 ;
|
|
; 0.643 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.936 ;
|
|
; 0.643 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.936 ;
|
|
; 0.643 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.936 ;
|
|
; 0.643 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.936 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[10] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.946 ;
|
|
; 0.657 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.950 ;
|
|
; 0.660 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.953 ;
|
|
; 0.677 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.970 ;
|
|
; 0.681 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.974 ;
|
|
; 0.689 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.983 ;
|
|
; 0.690 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 0.984 ;
|
|
; 0.700 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.993 ;
|
|
; 0.701 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.994 ;
|
|
; 0.705 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.998 ;
|
|
; 0.706 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 0.999 ;
|
|
; 0.707 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.000 ;
|
|
; 0.707 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.000 ;
|
|
; 0.707 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.000 ;
|
|
; 0.707 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.000 ;
|
|
; 0.707 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.000 ;
|
|
; 0.707 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.000 ;
|
|
; 0.718 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.080 ; 1.010 ;
|
|
; 0.739 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.033 ;
|
|
; 0.741 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.034 ;
|
|
; 0.747 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.040 ;
|
|
; 0.748 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.041 ;
|
|
; 0.753 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.046 ;
|
|
; 0.757 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.050 ;
|
|
; 0.758 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.051 ;
|
|
; 0.762 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.055 ;
|
|
; 0.764 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.057 ;
|
|
; 0.773 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.066 ;
|
|
; 0.774 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.067 ;
|
|
; 0.777 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.070 ;
|
|
; 0.779 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.072 ;
|
|
; 0.783 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.076 ;
|
|
; 0.789 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.082 ;
|
|
; 0.793 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.086 ;
|
|
; 0.793 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.087 ;
|
|
; 0.798 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.091 ;
|
|
; 0.803 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.096 ;
|
|
; 0.814 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[10] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.107 ;
|
|
; 0.827 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.120 ;
|
|
; 0.843 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.136 ;
|
|
; 0.863 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[15] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.156 ;
|
|
; 0.867 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.160 ;
|
|
; 0.891 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.184 ;
|
|
; 0.898 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.192 ;
|
|
+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Hold: 'clock_stm32' ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.485 ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.049 ; 0.746 ;
|
|
; 0.545 ; stm32_interface:STM32_INTERFACE|I_HOLD[12] ; stm32_interface:STM32_INTERFACE|TX_I[12] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.037 ; 0.794 ;
|
|
; 0.545 ; stm32_interface:STM32_INTERFACE|I_HOLD[15] ; stm32_interface:STM32_INTERFACE|TX_I[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.037 ; 0.794 ;
|
|
; 0.559 ; stm32_interface:STM32_INTERFACE|I_HOLD[13] ; stm32_interface:STM32_INTERFACE|TX_I[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.795 ;
|
|
; 0.675 ; stm32_interface:STM32_INTERFACE|Q_HOLD[14] ; stm32_interface:STM32_INTERFACE|TX_Q[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.105 ; 0.992 ;
|
|
; 0.700 ; stm32_interface:STM32_INTERFACE|I_HOLD[10] ; stm32_interface:STM32_INTERFACE|TX_I[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.065 ; 0.977 ;
|
|
; 0.702 ; stm32_interface:STM32_INTERFACE|Q_HOLD[7] ; stm32_interface:STM32_INTERFACE|TX_Q[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.090 ; 1.004 ;
|
|
; 0.711 ; stm32_interface:STM32_INTERFACE|Q_HOLD[6] ; stm32_interface:STM32_INTERFACE|TX_Q[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.090 ; 1.013 ;
|
|
; 0.718 ; stm32_interface:STM32_INTERFACE|Q_HOLD[10] ; stm32_interface:STM32_INTERFACE|TX_Q[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.105 ; 1.035 ;
|
|
; 0.718 ; stm32_interface:STM32_INTERFACE|Q_HOLD[15] ; stm32_interface:STM32_INTERFACE|TX_Q[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.105 ; 1.035 ;
|
|
; 0.768 ; stm32_interface:STM32_INTERFACE|I_HOLD[8] ; stm32_interface:STM32_INTERFACE|TX_I[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.037 ; 1.017 ;
|
|
; 0.768 ; stm32_interface:STM32_INTERFACE|I_HOLD[9] ; stm32_interface:STM32_INTERFACE|TX_I[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.037 ; 1.017 ;
|
|
; 0.900 ; stm32_interface:STM32_INTERFACE|Q_HOLD[3] ; stm32_interface:STM32_INTERFACE|TX_Q[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.090 ; 1.202 ;
|
|
; 0.906 ; stm32_interface:STM32_INTERFACE|I_HOLD[11] ; stm32_interface:STM32_INTERFACE|TX_I[11] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.065 ; 1.183 ;
|
|
; 0.924 ; stm32_interface:STM32_INTERFACE|I_HOLD[14] ; stm32_interface:STM32_INTERFACE|TX_I[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.065 ; 1.201 ;
|
|
; 0.947 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.057 ; 1.216 ;
|
|
; 0.958 ; stm32_interface:STM32_INTERFACE|Q_HOLD[0] ; stm32_interface:STM32_INTERFACE|TX_Q[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.090 ; 1.260 ;
|
|
; 1.096 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.056 ; 1.364 ;
|
|
; 1.097 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.055 ; 1.364 ;
|
|
; 1.097 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.057 ; 1.366 ;
|
|
; 1.108 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.058 ; 1.378 ;
|
|
; 1.175 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.497 ; 1.884 ;
|
|
; 1.196 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.056 ; 1.464 ;
|
|
; 1.252 ; stm32_interface:STM32_INTERFACE|Q_HOLD[11] ; stm32_interface:STM32_INTERFACE|TX_Q[11] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.089 ; 1.553 ;
|
|
; 1.254 ; stm32_interface:STM32_INTERFACE|Q_HOLD[5] ; stm32_interface:STM32_INTERFACE|TX_Q[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.231 ; 1.235 ;
|
|
; 1.269 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.058 ; 1.539 ;
|
|
; 1.276 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.966 ; 4.454 ;
|
|
; 1.277 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.411 ; 4.900 ;
|
|
; 1.291 ; stm32_interface:STM32_INTERFACE|Q_HOLD[4] ; stm32_interface:STM32_INTERFACE|TX_Q[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.247 ; 1.256 ;
|
|
; 1.304 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|DAC_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.003 ; 4.519 ;
|
|
; 1.317 ; stm32_interface:STM32_INTERFACE|Q_HOLD[9] ; stm32_interface:STM32_INTERFACE|TX_Q[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.018 ; 1.547 ;
|
|
; 1.318 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_I[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.890 ; 4.420 ;
|
|
; 1.322 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.552 ; 2.086 ;
|
|
; 1.326 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.873 ; 2.411 ;
|
|
; 1.339 ; stm32_interface:STM32_INTERFACE|Q_HOLD[8] ; stm32_interface:STM32_INTERFACE|TX_Q[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.018 ; 1.569 ;
|
|
; 1.342 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.538 ; 5.092 ;
|
|
; 1.354 ; stm32_interface:STM32_INTERFACE|Q_HOLD[12] ; stm32_interface:STM32_INTERFACE|TX_Q[12] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.018 ; 1.584 ;
|
|
; 1.365 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_I[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.890 ; 4.467 ;
|
|
; 1.398 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.411 ; 5.021 ;
|
|
; 1.416 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|NCO_freq[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.820 ; 4.448 ;
|
|
; 1.417 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.853 ; 4.482 ;
|
|
; 1.419 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|NCO_freq[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.842 ; 4.473 ;
|
|
; 1.436 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|NCO_freq[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.820 ; 4.468 ;
|
|
; 1.446 ; stm32_interface:STM32_INTERFACE|Q_HOLD[13] ; stm32_interface:STM32_INTERFACE|TX_Q[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.089 ; 1.747 ;
|
|
; 1.459 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|NCO_freq[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.842 ; 4.513 ;
|
|
; 1.473 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|TX_I[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.890 ; 4.575 ;
|
|
; 1.475 ; stm32_interface:STM32_INTERFACE|Q_HOLD[2] ; stm32_interface:STM32_INTERFACE|TX_Q[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.247 ; 1.440 ;
|
|
; 1.481 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_CICFIR_GAIN[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.029 ; 4.722 ;
|
|
; 1.483 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.538 ; 5.233 ;
|
|
; 1.527 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.916 ; 4.655 ;
|
|
; 1.540 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_I[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.890 ; 4.642 ;
|
|
; 1.559 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.916 ; 4.687 ;
|
|
; 1.582 ; stm32_interface:STM32_INTERFACE|I_HOLD[1] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.069 ; 1.863 ;
|
|
; 1.597 ; stm32_interface:STM32_INTERFACE|Q_HOLD[1] ; stm32_interface:STM32_INTERFACE|TX_Q[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.112 ; 1.697 ;
|
|
; 1.608 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|tx ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.995 ; 4.815 ;
|
|
; 1.608 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|rx ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.995 ; 4.815 ;
|
|
; 1.612 ; STM32_SYNC ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.607 ; 4.431 ;
|
|
; 1.639 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.824 ; 2.675 ;
|
|
; 1.639 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_I[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.890 ; 4.741 ;
|
|
; 1.659 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[20] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.878 ; 4.749 ;
|
|
; 1.683 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.853 ; 4.748 ;
|
|
; 1.686 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.951 ; 4.849 ;
|
|
; 1.686 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|TX_CICFIR_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.816 ; 4.714 ;
|
|
; 1.688 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.055 ; 1.955 ;
|
|
; 1.688 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|NCO_freq[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.842 ; 4.742 ;
|
|
; 1.691 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[17] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.878 ; 4.781 ;
|
|
; 1.695 ; stm32_interface:STM32_INTERFACE|FLASH_enable ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.178 ; 2.085 ;
|
|
; 1.697 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.441 ; 2.350 ;
|
|
; 1.703 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.916 ; 4.831 ;
|
|
; 1.710 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.479 ; 2.401 ;
|
|
; 1.712 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.479 ; 2.403 ;
|
|
; 1.725 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|NCO_freq[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.820 ; 4.757 ;
|
|
; 1.732 ; STM32_SYNC ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.669 ; 4.613 ;
|
|
; 1.743 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|ATT_8 ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.560 ; 5.515 ;
|
|
; 1.747 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.853 ; 4.812 ;
|
|
; 1.755 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|ATT_4 ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.014 ; 4.981 ;
|
|
; 1.761 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|BPF_OE1 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.973 ; 4.946 ;
|
|
; 1.767 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|TX_I[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.885 ; 4.864 ;
|
|
; 1.770 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.853 ; 4.835 ;
|
|
; 1.772 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|DAC_GAIN[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.003 ; 4.987 ;
|
|
; 1.778 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|ATT_05 ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.014 ; 5.004 ;
|
|
; 1.779 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|TX_I[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.885 ; 4.876 ;
|
|
; 1.781 ; stm32_interface:STM32_INTERFACE|I_HOLD[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.567 ; 2.560 ;
|
|
; 1.781 ; stm32_interface:STM32_INTERFACE|sync_reset_n ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.054 ; 2.047 ;
|
|
; 1.786 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.108 ; 5.106 ;
|
|
; 1.797 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|LPF_2 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.973 ; 4.982 ;
|
|
; 1.798 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.320 ; 1.690 ;
|
|
; 1.802 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[21] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.878 ; 4.892 ;
|
|
; 1.805 ; stm32_interface:STM32_INTERFACE|I_HOLD[14] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.463 ; 2.480 ;
|
|
; 1.806 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|NCO_freq[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.842 ; 4.860 ;
|
|
; 1.816 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.057 ; 2.085 ;
|
|
; 1.819 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|NCO_freq[16] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.871 ; 4.902 ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Recovery: 'clk_sys' ;
|
|
+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
|
|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
|
|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
|
|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
|
|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT15 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT14 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT13 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT12 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT11 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT10 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT9 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT8 ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[22] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[21] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[20] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[19] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[23] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[18] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[16] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[15] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[14] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[13] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[12] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[11] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[10] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[9] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[8] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[7] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[6] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[5] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[4] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[3] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[2] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[1] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[0] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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|
; 3.227 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[17] ; clk_sys ; clk_sys ; 7.774 ; -0.398 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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|
; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT15 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT14 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT13 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT12 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT11 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT10 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT9 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT8 ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[22] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[21] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[20] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[19] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[18] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[17] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[16] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[15] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[14] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[13] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[12] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[11] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[10] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[9] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[8] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[7] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[6] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[5] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[4] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[3] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[2] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[1] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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|
; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[0] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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|
; 3.228 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[23] ; clk_sys ; clk_sys ; 7.774 ; -0.397 ; 3.901 ;
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|
; 3.800 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_u0_m0_wo0_compute_q_15|delay_signals[0][0] ; clk_sys ; clk_sys ; 7.774 ; -0.202 ; 3.773 ;
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; 3.800 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][0] ; clk_sys ; clk_sys ; 7.774 ; -0.187 ; 3.788 ;
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; 3.800 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][0] ; clk_sys ; clk_sys ; 7.774 ; -0.187 ; 3.788 ;
|
|
; 3.800 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[3].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][0] ; clk_sys ; clk_sys ; 7.774 ; -0.188 ; 3.787 ;
|
|
+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Recovery: 'altera_reserved_tck' ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; 96.012 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 3.925 ;
|
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; 96.012 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 3.925 ;
|
|
; 96.012 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 3.925 ;
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|
; 96.012 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.064 ; 3.925 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 96.132 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.068 ; 3.801 ;
|
|
; 97.300 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.094 ; 2.607 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.342 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.069 ; 2.590 ;
|
|
; 97.825 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 2.096 ;
|
|
; 97.868 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 2.053 ;
|
|
; 97.868 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 2.053 ;
|
|
; 97.868 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 2.053 ;
|
|
; 97.868 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 2.053 ;
|
|
; 97.868 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 2.053 ;
|
|
; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 1.948 ;
|
|
; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 1.948 ;
|
|
; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 1.948 ;
|
|
; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.080 ; 1.948 ;
|
|
; 98.233 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.081 ; 1.687 ;
|
|
; 98.233 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.081 ; 1.687 ;
|
|
; 98.233 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.081 ; 1.687 ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 85C Model Removal: 'altera_reserved_tck' ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; 1.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.577 ;
|
|
; 1.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.577 ;
|
|
; 1.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.081 ; 1.577 ;
|
|
; 1.573 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.867 ;
|
|
; 1.573 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.867 ;
|
|
; 1.573 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.867 ;
|
|
; 1.573 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.867 ;
|
|
; 1.668 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.962 ;
|
|
; 1.668 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.962 ;
|
|
; 1.668 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.962 ;
|
|
; 1.668 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.962 ;
|
|
; 1.668 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.962 ;
|
|
; 1.697 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.082 ; 1.991 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.093 ; 2.400 ;
|
|
; 2.158 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.068 ; 2.438 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
|
|
; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
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; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
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; 3.284 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.094 ; 3.590 ;
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; 3.334 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.099 ; 3.645 ;
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; 3.334 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.099 ; 3.645 ;
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; 3.334 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.099 ; 3.645 ;
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; 3.334 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.099 ; 3.645 ;
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+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 85C Model Removal: 'clk_sys' ;
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+--------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+--------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][11] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][12] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][14] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][15] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][16] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][17] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][18] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][19] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][20] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
|
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
|
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
|
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
|
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][38] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
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; 11.143 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][41] ; clk_sys ; clk_sys ; -7.773 ; -0.059 ; 3.543 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][16] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][22] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][44] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][46] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][49] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][52] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][57] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][58] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][59] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][59] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][59] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][60] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][60] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][60] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][61] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][61] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][61] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][62] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][62] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][62] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][63] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][63] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][63] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][64] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][64] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][64] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][65] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][65] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][65] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][66] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][66] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][66] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][67] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][67] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][67] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][68] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][68] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][68] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
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; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][69] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][69] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][69] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][70] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][70] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][70] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][71] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][71] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][71] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][72] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][72] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][72] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][73] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][73] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][73] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][74] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][74] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][74] ; clk_sys ; clk_sys ; -7.773 ; -0.054 ; 3.549 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][75] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][75] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][75] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][76] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][76] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][76] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][77] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][77] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][77] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][78] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][78] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][78] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][79] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][79] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][79] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][80] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][80] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][80] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][81] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][81] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][81] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][82] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][82] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][82] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][83] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][83] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
; 11.144 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][83] ; clk_sys ; clk_sys ; -7.773 ; -0.055 ; 3.548 ;
|
|
+--------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
-----------------------------------------------
|
|
; Slow 1200mV 85C Model Metastability Summary ;
|
|
-----------------------------------------------
|
|
The design MTBF is not calculated because there are no specified synchronizers in the design.
|
|
Number of Synchronizer Chains Found: 113
|
|
Shortest Synchronizer Chain: 2 Registers
|
|
Fraction of Chains for which MTBFs Could Not be Calculated: 1.000
|
|
Worst Case Available Settling Time: 13.556 ns
|
|
|
|
|
|
|
|
|
|
+------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Fmax Summary ;
|
|
+------------+-----------------+----------------------------------------------------+------+
|
|
; Fmax ; Restricted Fmax ; Clock Name ; Note ;
|
|
+------------+-----------------+----------------------------------------------------+------+
|
|
; 88.15 MHz ; 88.15 MHz ; clk_sys ; ;
|
|
; 102.94 MHz ; 102.94 MHz ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; ;
|
|
; 109.63 MHz ; 109.63 MHz ; clock_stm32 ; ;
|
|
; 112.21 MHz ; 112.21 MHz ; altera_reserved_tck ; ;
|
|
+------------+-----------------+----------------------------------------------------+------+
|
|
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
|
|
|
|
|
|
+-----------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Setup Summary ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; -3.496 ; -159.849 ;
|
|
; clk_sys ; 2.102 ; 0.000 ;
|
|
; clock_stm32 ; 30.878 ; 0.000 ;
|
|
; altera_reserved_tck ; 45.544 ; 0.000 ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
|
|
|
|
+----------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Hold Summary ;
|
|
+----------------------------------------------------+-------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+----------------------------------------------------+-------+---------------+
|
|
; clk_sys ; 0.384 ; 0.000 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.385 ; 0.000 ;
|
|
; altera_reserved_tck ; 0.400 ; 0.000 ;
|
|
; clock_stm32 ; 0.430 ; 0.000 ;
|
|
+----------------------------------------------------+-------+---------------+
|
|
|
|
|
|
+----------------------------------------------+
|
|
; Slow 1200mV 0C Model Recovery Summary ;
|
|
+---------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+---------------------+--------+---------------+
|
|
; clk_sys ; 3.572 ; 0.000 ;
|
|
; altera_reserved_tck ; 96.290 ; 0.000 ;
|
|
+---------------------+--------+---------------+
|
|
|
|
|
|
+----------------------------------------------+
|
|
; Slow 1200mV 0C Model Removal Summary ;
|
|
+---------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+---------------------+--------+---------------+
|
|
; altera_reserved_tck ; 1.188 ; 0.000 ;
|
|
; clk_sys ; 10.797 ; 0.000 ;
|
|
+---------------------+--------+---------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Minimum Pulse Width Summary ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 1.218 ; 0.000 ;
|
|
; clk_sys ; 7.200 ; 0.000 ;
|
|
; clock_stm32 ; 19.595 ; 0.000 ;
|
|
; altera_reserved_tck ; 49.402 ; 0.000 ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Setup: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]' ;
|
|
+--------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; -3.496 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.766 ;
|
|
; -3.485 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.755 ;
|
|
; -3.463 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.733 ;
|
|
; -3.430 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.699 ;
|
|
; -3.414 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.679 ;
|
|
; -3.406 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.676 ;
|
|
; -3.400 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.661 ;
|
|
; -3.399 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.660 ;
|
|
; -3.386 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.638 ;
|
|
; -3.370 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.640 ;
|
|
; -3.367 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.628 ;
|
|
; -3.359 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.629 ;
|
|
; -3.350 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.615 ;
|
|
; -3.350 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.602 ;
|
|
; -3.337 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.607 ;
|
|
; -3.331 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.601 ;
|
|
; -3.328 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.597 ;
|
|
; -3.325 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.594 ;
|
|
; -3.320 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.590 ;
|
|
; -3.315 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.584 ;
|
|
; -3.304 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.573 ;
|
|
; -3.300 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.565 ;
|
|
; -3.298 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.568 ;
|
|
; -3.288 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.553 ;
|
|
; -3.280 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.550 ;
|
|
; -3.274 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.535 ;
|
|
; -3.273 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.534 ;
|
|
; -3.265 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.534 ;
|
|
; -3.260 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.512 ;
|
|
; -3.260 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.549 ;
|
|
; -3.249 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.514 ;
|
|
; -3.249 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.538 ;
|
|
; -3.244 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.514 ;
|
|
; -3.241 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.502 ;
|
|
; -3.241 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.511 ;
|
|
; -3.235 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.496 ;
|
|
; -3.234 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.495 ;
|
|
; -3.233 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.503 ;
|
|
; -3.228 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.044 ; 9.492 ;
|
|
; -3.228 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.517 ;
|
|
; -3.227 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.516 ;
|
|
; -3.224 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.489 ;
|
|
; -3.224 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.476 ;
|
|
; -3.221 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.473 ;
|
|
; -3.211 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.481 ;
|
|
; -3.206 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.044 ; 9.470 ;
|
|
; -3.205 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.475 ;
|
|
; -3.202 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.463 ;
|
|
; -3.202 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.471 ;
|
|
; -3.200 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.027 ; 9.447 ;
|
|
; -3.199 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.468 ;
|
|
; -3.196 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.044 ; 9.460 ;
|
|
; -3.194 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.464 ;
|
|
; -3.189 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.458 ;
|
|
; -3.185 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.450 ;
|
|
; -3.185 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.437 ;
|
|
; -3.184 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.044 ; 9.448 ;
|
|
; -3.178 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.447 ;
|
|
; -3.174 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.439 ;
|
|
; -3.172 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.442 ;
|
|
; -3.163 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.432 ;
|
|
; -3.162 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.427 ;
|
|
; -3.160 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.429 ;
|
|
; -3.154 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.424 ;
|
|
; -3.150 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.035 ; 9.405 ;
|
|
; -3.150 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.419 ;
|
|
; -3.149 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.414 ;
|
|
; -3.148 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.409 ;
|
|
; -3.147 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.408 ;
|
|
; -3.144 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.409 ;
|
|
; -3.139 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.049 ; 9.408 ;
|
|
; -3.135 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.400 ;
|
|
; -3.134 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.386 ;
|
|
; -3.134 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.423 ;
|
|
; -3.124 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.376 ;
|
|
; -3.123 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.388 ;
|
|
; -3.123 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.027 ; 9.370 ;
|
|
; -3.123 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.412 ;
|
|
; -3.119 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.010 ; 9.349 ;
|
|
; -3.118 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[25] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.388 ;
|
|
; -3.117 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.035 ; 9.372 ;
|
|
; -3.115 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.376 ;
|
|
; -3.115 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.385 ;
|
|
; -3.113 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 9.356 ;
|
|
; -3.109 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.370 ;
|
|
; -3.108 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.369 ;
|
|
; -3.107 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[25] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.377 ;
|
|
; -3.106 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.041 ; 9.367 ;
|
|
; -3.102 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.044 ; 9.366 ;
|
|
; -3.102 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.391 ;
|
|
; -3.101 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.390 ;
|
|
; -3.098 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.045 ; 9.363 ;
|
|
; -3.098 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.350 ;
|
|
; -3.096 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.010 ; 9.326 ;
|
|
; -3.095 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.347 ;
|
|
; -3.095 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.069 ; 9.384 ;
|
|
; -3.093 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.047 ; 9.360 ;
|
|
; -3.090 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.023 ; 9.333 ;
|
|
; -3.088 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.032 ; 9.340 ;
|
|
; -3.085 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[25] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; 0.050 ; 9.355 ;
|
|
+--------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Setup: 'clk_sys' ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[85] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[84] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[83] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[82] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[81] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[80] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[79] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[78] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[77] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[76] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.102 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[75] ; clk_sys ; clk_sys ; 7.774 ; -0.167 ; 5.507 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[42] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
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|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[41] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
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|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[40] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[39] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[38] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[37] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[36] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[35] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[34] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[33] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[32] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[31] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[30] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[29] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[28] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.448 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[27] ; clk_sys ; clk_sys ; 7.774 ; -0.194 ; 5.134 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[58] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[57] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[56] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[55] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[54] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[53] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[52] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[51] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[50] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[49] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[48] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[47] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[46] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[45] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[44] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.459 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[43] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.122 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[58] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[57] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[56] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[55] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[54] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[53] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[52] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[51] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[50] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[49] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[48] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[47] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[46] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[45] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[44] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.468 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[43] ; clk_sys ; clk_sys ; 7.774 ; -0.165 ; 5.143 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[26] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[25] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[24] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[23] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[22] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[21] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[20] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[19] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[18] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[17] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[16] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[15] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[14] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[13] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[12] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.479 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[11] ; clk_sys ; clk_sys ; 7.774 ; -0.196 ; 5.101 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[42] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[41] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[40] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[39] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[38] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[37] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[36] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[35] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[34] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[33] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[32] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[31] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[30] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[29] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[28] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.513 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[27] ; clk_sys ; clk_sys ; 7.774 ; -0.164 ; 5.099 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[10] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[9] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[8] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[7] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[6] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[5] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[4] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[3] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
; 2.523 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[2] ; clk_sys ; clk_sys ; 7.774 ; -0.195 ; 5.058 ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Setup: 'clock_stm32' ;
|
|
+--------+-------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 30.878 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[7] ; STM32_DATA_BUS[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.732 ; 6.354 ;
|
|
; 31.590 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.081 ; 6.293 ;
|
|
; 31.720 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 10.702 ;
|
|
; 31.797 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 10.625 ;
|
|
; 31.814 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 10.175 ;
|
|
; 31.891 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 10.098 ;
|
|
; 31.958 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 10.408 ;
|
|
; 31.978 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.038 ; 8.006 ;
|
|
; 32.035 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 10.331 ;
|
|
; 32.035 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.051 ; 7.936 ;
|
|
; 32.053 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.038 ; 7.931 ;
|
|
; 32.054 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.038 ; 7.930 ;
|
|
; 32.062 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 10.304 ;
|
|
; 32.063 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.044 ; 7.915 ;
|
|
; 32.075 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.453 ; 7.494 ;
|
|
; 32.102 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.109 ; 8.029 ;
|
|
; 32.122 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; STM32_DATA_BUS[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.810 ; 5.032 ;
|
|
; 32.129 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.840 ;
|
|
; 32.130 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.839 ;
|
|
; 32.139 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 10.227 ;
|
|
; 32.169 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.038 ; 7.815 ;
|
|
; 32.191 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 7.414 ;
|
|
; 32.201 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.226 ; 7.595 ;
|
|
; 32.217 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 9.772 ;
|
|
; 32.232 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 7.373 ;
|
|
; 32.266 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 7.339 ;
|
|
; 32.267 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.355 ; 8.110 ;
|
|
; 32.267 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 7.338 ;
|
|
; 32.274 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 10.092 ;
|
|
; 32.294 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 9.695 ;
|
|
; 32.322 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 10.100 ;
|
|
; 32.336 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 10.086 ;
|
|
; 32.342 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.355 ; 8.035 ;
|
|
; 32.343 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.355 ; 8.034 ;
|
|
; 32.351 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 10.015 ;
|
|
; 32.358 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.109 ; 7.773 ;
|
|
; 32.361 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.153 ; 7.508 ;
|
|
; 32.367 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.345 ; 9.964 ;
|
|
; 32.371 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 10.051 ;
|
|
; 32.376 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 10.046 ;
|
|
; 32.416 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 9.573 ;
|
|
; 32.430 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 9.559 ;
|
|
; 32.436 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.546 ; 8.132 ;
|
|
; 32.438 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.153 ; 7.431 ;
|
|
; 32.444 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.345 ; 9.887 ;
|
|
; 32.448 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 9.974 ;
|
|
; 32.457 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.226 ; 7.339 ;
|
|
; 32.469 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.500 ;
|
|
; 32.470 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.003 ; 9.519 ;
|
|
; 32.482 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.243 ; 7.783 ;
|
|
; 32.485 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.109 ; 7.646 ;
|
|
; 32.495 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.474 ;
|
|
; 32.497 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 9.925 ;
|
|
; 32.500 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; STM32_DATA_BUS[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.810 ; 4.654 ;
|
|
; 32.528 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.081 ; 5.355 ;
|
|
; 32.540 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.668 ; 10.114 ;
|
|
; 32.544 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.425 ;
|
|
; 32.545 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.424 ;
|
|
; 32.545 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.136 ; 7.341 ;
|
|
; 32.560 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 9.806 ;
|
|
; 32.574 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 9.792 ;
|
|
; 32.574 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.436 ; 9.848 ;
|
|
; 32.582 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.387 ;
|
|
; 32.594 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; STM32_DATA_BUS[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -2.834 ; 4.536 ;
|
|
; 32.614 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 9.752 ;
|
|
; 32.617 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.668 ; 10.037 ;
|
|
; 32.619 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.153 ; 7.250 ;
|
|
; 32.627 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.109 ; 7.504 ;
|
|
; 32.630 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.051 ; 7.341 ;
|
|
; 32.647 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.226 ; 7.149 ;
|
|
; 32.652 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.317 ;
|
|
; 32.655 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.290 ; 7.657 ;
|
|
; 32.659 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.310 ;
|
|
; 32.664 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 9.702 ;
|
|
; 32.678 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 9.688 ;
|
|
; 32.685 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.153 ; 7.184 ;
|
|
; 32.691 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 6.914 ;
|
|
; 32.692 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.546 ; 7.876 ;
|
|
; 32.696 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.051 ; 7.275 ;
|
|
; 32.706 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.153 ; 7.469 ;
|
|
; 32.706 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.153 ; 7.469 ;
|
|
; 32.706 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.153 ; 7.469 ;
|
|
; 32.706 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.153 ; 7.469 ;
|
|
; 32.708 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.355 ; 7.669 ;
|
|
; 32.718 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 2.380 ; 9.648 ;
|
|
; 32.728 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.053 ; 7.241 ;
|
|
; 32.733 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|I_HOLD[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.279 ; 7.568 ;
|
|
; 32.733 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|I_HOLD[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.279 ; 7.568 ;
|
|
; 32.736 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.044 ; 7.242 ;
|
|
; 32.741 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.109 ; 7.390 ;
|
|
; 32.757 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.050 ; 7.215 ;
|
|
; 32.766 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 6.839 ;
|
|
; 32.767 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.417 ; 6.838 ;
|
|
; 32.769 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.226 ; 7.027 ;
|
|
; 32.769 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.226 ; 7.027 ;
|
|
; 32.769 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.226 ; 7.027 ;
|
|
; 32.775 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.038 ; 7.209 ;
|
|
; 32.779 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.456 ; 6.787 ;
|
|
; 32.779 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.456 ; 6.787 ;
|
|
; 32.787 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.290 ; 7.525 ;
|
|
+--------+-------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Setup: 'altera_reserved_tck' ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; 45.544 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.311 ; 4.769 ;
|
|
; 45.629 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.311 ; 4.684 ;
|
|
; 45.950 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.311 ; 4.363 ;
|
|
; 46.187 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.296 ; 4.111 ;
|
|
; 46.564 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.311 ; 3.749 ;
|
|
; 46.778 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.300 ; 3.524 ;
|
|
; 46.870 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.298 ; 3.430 ;
|
|
; 47.119 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.300 ; 3.183 ;
|
|
; 47.231 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.311 ; 3.082 ;
|
|
; 47.299 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.312 ; 3.015 ;
|
|
; 47.578 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.310 ; 2.734 ;
|
|
; 47.581 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.734 ;
|
|
; 47.604 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.711 ;
|
|
; 47.798 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.310 ; 2.514 ;
|
|
; 47.844 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.471 ;
|
|
; 47.872 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.443 ;
|
|
; 47.938 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.377 ;
|
|
; 48.264 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.312 ; 2.050 ;
|
|
; 48.281 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.034 ;
|
|
; 48.293 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.313 ; 2.022 ;
|
|
; 95.057 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.873 ;
|
|
; 95.057 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.873 ;
|
|
; 95.057 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.873 ;
|
|
; 95.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.835 ;
|
|
; 95.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.835 ;
|
|
; 95.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.835 ;
|
|
; 95.095 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 4.835 ;
|
|
; 95.122 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.819 ;
|
|
; 95.125 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.816 ;
|
|
; 95.131 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.810 ;
|
|
; 95.131 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.810 ;
|
|
; 95.133 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.808 ;
|
|
; 95.139 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.802 ;
|
|
; 95.141 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.800 ;
|
|
; 95.172 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.774 ;
|
|
; 95.172 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.774 ;
|
|
; 95.172 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.774 ;
|
|
; 95.172 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.774 ;
|
|
; 95.221 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.723 ;
|
|
; 95.221 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.723 ;
|
|
; 95.221 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.723 ;
|
|
; 95.263 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.681 ;
|
|
; 95.263 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.681 ;
|
|
; 95.263 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.681 ;
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|
; 95.263 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.058 ; 4.681 ;
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; 95.293 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.084 ; 4.625 ;
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; 95.293 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.084 ; 4.625 ;
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; 95.293 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.084 ; 4.625 ;
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; 95.293 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.084 ; 4.625 ;
|
|
; 95.293 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.084 ; 4.625 ;
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|
; 95.380 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.565 ;
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; 95.380 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.565 ;
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|
; 95.380 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.565 ;
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|
; 95.418 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.527 ;
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; 95.418 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.527 ;
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; 95.418 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.527 ;
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; 95.418 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.527 ;
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; 95.444 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.061 ; 4.497 ;
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; 95.451 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.494 ;
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; 95.451 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.494 ;
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|
; 95.451 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.494 ;
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|
; 95.451 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.494 ;
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|
; 95.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.070 ; 4.461 ;
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|
; 95.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.070 ; 4.461 ;
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|
; 95.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.070 ; 4.461 ;
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|
; 95.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.070 ; 4.461 ;
|
|
; 95.481 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.436 ;
|
|
; 95.481 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.436 ;
|
|
; 95.481 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.436 ;
|
|
; 95.481 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.436 ;
|
|
; 95.551 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.395 ;
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; 95.551 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.395 ;
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|
; 95.551 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.395 ;
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|
; 95.551 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 4.395 ;
|
|
; 95.552 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.070 ; 4.380 ;
|
|
; 95.608 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.337 ;
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|
; 95.621 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.296 ;
|
|
; 95.621 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.296 ;
|
|
; 95.621 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.296 ;
|
|
; 95.621 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.296 ;
|
|
; 95.643 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.297 ;
|
|
; 95.646 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.294 ;
|
|
; 95.652 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.288 ;
|
|
; 95.652 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.288 ;
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|
; 95.654 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.286 ;
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|
; 95.660 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.280 ;
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|
; 95.662 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 4.278 ;
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|
; 95.691 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.086 ; 4.225 ;
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|
; 95.691 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.086 ; 4.225 ;
|
|
; 95.691 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.086 ; 4.225 ;
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|
; 95.691 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.086 ; 4.225 ;
|
|
; 95.731 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.186 ;
|
|
; 95.731 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.186 ;
|
|
; 95.731 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.186 ;
|
|
; 95.731 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.186 ;
|
|
; 95.731 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.085 ; 4.186 ;
|
|
; 95.799 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.146 ;
|
|
; 95.799 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.146 ;
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; 95.799 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.146 ;
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; 95.799 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.057 ; 4.146 ;
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 0C Model Hold: 'clk_sys' ;
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+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; 0.384 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[25] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.428 ; 1.042 ;
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; 0.385 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[45] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.044 ;
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; 0.386 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[21] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.428 ; 1.044 ;
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; 0.388 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[7] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.047 ;
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; 0.388 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[26] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.428 ; 1.046 ;
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; 0.388 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[79] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.047 ;
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; 0.390 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[27] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.049 ;
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; 0.391 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.050 ;
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; 0.391 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.050 ;
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; 0.394 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[20] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.428 ; 1.052 ;
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; 0.394 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[47] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.053 ;
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; 0.395 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][0] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.430 ; 1.055 ;
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; 0.396 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[43] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.055 ;
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; 0.396 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[44] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.055 ;
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; 0.397 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[11] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.056 ;
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; 0.397 ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.431 ; 1.058 ;
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; 0.399 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.429 ; 1.058 ;
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; 0.400 ; spi_interface:FLASH|MOSI_DQ0 ; spi_interface:FLASH|MOSI_DQ0 ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[0] ; spi_interface:FLASH|data_out[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[1] ; spi_interface:FLASH|data_out[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[2] ; spi_interface:FLASH|data_out[2] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[4] ; spi_interface:FLASH|data_out[4] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[5] ; spi_interface:FLASH|data_out[5] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[6] ; spi_interface:FLASH|data_out[6] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; spi_interface:FLASH|data_out[7] ; spi_interface:FLASH|data_out[7] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|dffe_nae ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|dffe_nae ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|full_dff ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|full_dff ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[0] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[1] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[2] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[2] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[3] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[3] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[21] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[21] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[20] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[20] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[19] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[19] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[18] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[18] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[17] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[17] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[16] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[16] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[15] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[15] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
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|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[14] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[14] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[13] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[13] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[12] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[12] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[11] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[11] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[10] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[10] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[9] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[9] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[8] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[8] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[7] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[7] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[6] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[6] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[5] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[5] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[4] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[3] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[3] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[2] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[2] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[1] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[0] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_altqmcpipe:ux000|phi_int_arr_reg[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][10] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.430 ; 1.060 ;
|
|
; 0.400 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.425 ; 1.055 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|low_addressa[1] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|low_addressa[1] ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|usedw_is_1_dff ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|usedw_is_1_dff ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|usedw_is_0_dff ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|usedw_is_0_dff ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_0_dff ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_0_dff ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_1_dff ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|usedw_is_1_dff ; clk_sys ; clk_sys ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|CS_S ; spi_interface:FLASH|CS_S ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|SCK_C ; spi_interface:FLASH|SCK_C ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|data_out[3] ; spi_interface:FLASH|data_out[3] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|busy ; spi_interface:FLASH|busy ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|spi_stage[5] ; spi_interface:FLASH|spi_stage[5] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|spi_stage[1] ; spi_interface:FLASH|spi_stage[1] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; spi_interface:FLASH|continue_read_prev ; spi_interface:FLASH|continue_read_prev ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|low_addressa[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|low_addressa[0] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|low_addressa[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|low_addressa[1] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|low_addressa[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|low_addressa[2] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|low_addressa[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|low_addressa[1] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|low_addressa[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|low_addressa[0] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[0] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[1] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_ef71:auto_generated|a_dpfifo_vkv:dpfifo|low_addressa[2] ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|full_dff ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_channel_buffer:fifo_regulator|scfifo:buffer_FIFO|scfifo_qm51:auto_generated|a_dpfifo_5ku:dpfifo|full_dff ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|full_dff ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|full_dff ; clk_sys ; clk_sys ; 0.000 ; 0.073 ; 0.669 ;
|
|
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Hold: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]' ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; 0.385 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.423 ; 1.038 ;
|
|
; 0.390 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][9] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.425 ; 1.045 ;
|
|
; 0.393 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][4] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.425 ; 1.048 ;
|
|
; 0.396 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][6] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.420 ; 1.046 ;
|
|
; 0.398 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][10] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.420 ; 1.048 ;
|
|
; 0.399 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][11] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.420 ; 1.049 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.400 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[1] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|\u0_m0_wo0_run_clkproc:u0_m0_wo0_run_enable_c[6] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|\u0_m0_wo0_run_clkproc:u0_m0_wo0_run_enable_c[6] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.402 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ;
|
|
; 0.403 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.423 ; 1.056 ;
|
|
; 0.404 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.430 ; 1.064 ;
|
|
; 0.405 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][14] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.423 ; 1.058 ;
|
|
; 0.409 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][1] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.423 ; 1.062 ;
|
|
; 0.415 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.684 ;
|
|
; 0.415 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.684 ;
|
|
; 0.415 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.684 ;
|
|
; 0.415 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.074 ; 0.684 ;
|
|
; 0.416 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.430 ; 1.076 ;
|
|
; 0.416 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.684 ;
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|
; 0.416 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.684 ;
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; 0.416 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count1_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count1_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.073 ; 0.684 ;
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; 0.417 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|rd_ptr_lsb ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.684 ;
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; 0.417 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.684 ;
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; 0.417 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_ca0_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_ca0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.684 ;
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; 0.417 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count1_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count1_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.684 ;
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; 0.417 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.684 ;
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; 0.417 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_ca0_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_ca0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 0.684 ;
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; 0.419 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][9] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.420 ; 1.069 ;
|
|
; 0.424 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.418 ; 1.072 ;
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; 0.426 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.417 ; 1.073 ;
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; 0.428 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[4] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.425 ; 1.083 ;
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; 0.429 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[3] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.418 ; 1.077 ;
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; 0.429 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][15] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.423 ; 1.082 ;
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|
; 0.431 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.420 ; 1.081 ;
|
|
; 0.432 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.425 ; 1.087 ;
|
|
; 0.433 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][14] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.420 ; 1.083 ;
|
|
; 0.435 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.425 ; 1.090 ;
|
|
; 0.436 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.423 ; 1.089 ;
|
|
; 0.437 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][15] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.430 ; 1.097 ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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|
|
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|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Hold: 'altera_reserved_tck' ;
|
|
+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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|
; 0.400 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.669 ;
|
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; 0.400 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.669 ;
|
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; 0.400 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.669 ;
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; 0.400 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.669 ;
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; 0.401 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
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; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
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; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.401 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.669 ;
|
|
; 0.402 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.669 ;
|
|
; 0.416 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.684 ;
|
|
; 0.448 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.716 ;
|
|
; 0.455 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.723 ;
|
|
; 0.455 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.723 ;
|
|
; 0.457 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.725 ;
|
|
; 0.469 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.738 ;
|
|
; 0.469 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.738 ;
|
|
; 0.469 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.737 ;
|
|
; 0.473 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.740 ;
|
|
; 0.477 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.745 ;
|
|
; 0.477 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[14] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.745 ;
|
|
; 0.478 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.746 ;
|
|
; 0.480 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.748 ;
|
|
; 0.492 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.760 ;
|
|
; 0.495 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.763 ;
|
|
; 0.530 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.798 ;
|
|
; 0.550 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.818 ;
|
|
; 0.552 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.820 ;
|
|
; 0.587 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.855 ;
|
|
; 0.594 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.862 ;
|
|
; 0.596 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.865 ;
|
|
; 0.596 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.864 ;
|
|
; 0.597 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.866 ;
|
|
; 0.597 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.866 ;
|
|
; 0.597 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.866 ;
|
|
; 0.597 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.865 ;
|
|
; 0.597 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.865 ;
|
|
; 0.598 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.867 ;
|
|
; 0.598 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.867 ;
|
|
; 0.598 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.866 ;
|
|
; 0.598 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[14] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.866 ;
|
|
; 0.598 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.865 ;
|
|
; 0.599 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.867 ;
|
|
; 0.599 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.866 ;
|
|
; 0.599 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.867 ;
|
|
; 0.599 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.866 ;
|
|
; 0.609 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[10] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.877 ;
|
|
; 0.614 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.883 ;
|
|
; 0.615 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.883 ;
|
|
; 0.616 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.884 ;
|
|
; 0.620 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.888 ;
|
|
; 0.631 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.899 ;
|
|
; 0.635 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.903 ;
|
|
; 0.637 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.904 ;
|
|
; 0.648 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.916 ;
|
|
; 0.650 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.919 ;
|
|
; 0.652 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.920 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.921 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.921 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.921 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.921 ;
|
|
; 0.654 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.922 ;
|
|
; 0.654 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.922 ;
|
|
; 0.655 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.923 ;
|
|
; 0.672 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.939 ;
|
|
; 0.689 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.958 ;
|
|
; 0.689 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.957 ;
|
|
; 0.694 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 0.963 ;
|
|
; 0.700 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.968 ;
|
|
; 0.705 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.973 ;
|
|
; 0.706 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.974 ;
|
|
; 0.708 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.975 ;
|
|
; 0.709 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.977 ;
|
|
; 0.712 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.980 ;
|
|
; 0.718 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 0.985 ;
|
|
; 0.718 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.986 ;
|
|
; 0.723 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.991 ;
|
|
; 0.728 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.996 ;
|
|
; 0.729 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.997 ;
|
|
; 0.730 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 0.998 ;
|
|
; 0.740 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.008 ;
|
|
; 0.743 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.011 ;
|
|
; 0.750 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.018 ;
|
|
; 0.755 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[10] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.023 ;
|
|
; 0.769 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.037 ;
|
|
; 0.792 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.060 ;
|
|
; 0.794 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[15] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.062 ;
|
|
; 0.807 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.075 ;
|
|
; 0.818 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 1.087 ;
|
|
; 0.821 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.072 ; 1.088 ;
|
|
+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Hold: 'clock_stm32' ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.430 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.044 ; 0.669 ;
|
|
; 0.521 ; stm32_interface:STM32_INTERFACE|I_HOLD[12] ; stm32_interface:STM32_INTERFACE|TX_I[12] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.738 ;
|
|
; 0.521 ; stm32_interface:STM32_INTERFACE|I_HOLD[15] ; stm32_interface:STM32_INTERFACE|TX_I[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.738 ;
|
|
; 0.527 ; stm32_interface:STM32_INTERFACE|I_HOLD[13] ; stm32_interface:STM32_INTERFACE|TX_I[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.017 ; 0.739 ;
|
|
; 0.616 ; stm32_interface:STM32_INTERFACE|Q_HOLD[14] ; stm32_interface:STM32_INTERFACE|TX_Q[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.102 ; 0.913 ;
|
|
; 0.618 ; stm32_interface:STM32_INTERFACE|Q_HOLD[7] ; stm32_interface:STM32_INTERFACE|TX_Q[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.083 ; 0.896 ;
|
|
; 0.625 ; stm32_interface:STM32_INTERFACE|Q_HOLD[6] ; stm32_interface:STM32_INTERFACE|TX_Q[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.083 ; 0.903 ;
|
|
; 0.629 ; stm32_interface:STM32_INTERFACE|I_HOLD[10] ; stm32_interface:STM32_INTERFACE|TX_I[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 0.874 ;
|
|
; 0.662 ; stm32_interface:STM32_INTERFACE|Q_HOLD[10] ; stm32_interface:STM32_INTERFACE|TX_Q[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.102 ; 0.959 ;
|
|
; 0.662 ; stm32_interface:STM32_INTERFACE|Q_HOLD[15] ; stm32_interface:STM32_INTERFACE|TX_Q[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.102 ; 0.959 ;
|
|
; 0.717 ; stm32_interface:STM32_INTERFACE|I_HOLD[9] ; stm32_interface:STM32_INTERFACE|TX_I[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.934 ;
|
|
; 0.718 ; stm32_interface:STM32_INTERFACE|I_HOLD[8] ; stm32_interface:STM32_INTERFACE|TX_I[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.935 ;
|
|
; 0.829 ; stm32_interface:STM32_INTERFACE|Q_HOLD[3] ; stm32_interface:STM32_INTERFACE|TX_Q[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.083 ; 1.107 ;
|
|
; 0.844 ; stm32_interface:STM32_INTERFACE|Q_HOLD[0] ; stm32_interface:STM32_INTERFACE|TX_Q[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.083 ; 1.122 ;
|
|
; 0.853 ; stm32_interface:STM32_INTERFACE|I_HOLD[11] ; stm32_interface:STM32_INTERFACE|TX_I[11] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 1.098 ;
|
|
; 0.859 ; stm32_interface:STM32_INTERFACE|I_HOLD[14] ; stm32_interface:STM32_INTERFACE|TX_I[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 1.104 ;
|
|
; 0.863 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.051 ; 1.109 ;
|
|
; 0.996 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.816 ; 4.007 ;
|
|
; 1.007 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.236 ; 4.438 ;
|
|
; 1.013 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.474 ; 1.682 ;
|
|
; 1.027 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.051 ; 1.273 ;
|
|
; 1.028 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 1.273 ;
|
|
; 1.028 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.053 ; 1.276 ;
|
|
; 1.042 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 1.287 ;
|
|
; 1.042 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|DAC_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.845 ; 4.082 ;
|
|
; 1.055 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_I[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.746 ; 3.996 ;
|
|
; 1.073 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.350 ; 4.618 ;
|
|
; 1.100 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_I[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.746 ; 4.041 ;
|
|
; 1.106 ; stm32_interface:STM32_INTERFACE|Q_HOLD[11] ; stm32_interface:STM32_INTERFACE|TX_Q[11] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.087 ; 1.388 ;
|
|
; 1.116 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.051 ; 1.362 ;
|
|
; 1.129 ; stm32_interface:STM32_INTERFACE|Q_HOLD[5] ; stm32_interface:STM32_INTERFACE|TX_Q[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.224 ; 1.100 ;
|
|
; 1.130 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.236 ; 4.561 ;
|
|
; 1.132 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.835 ; 2.162 ;
|
|
; 1.140 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.709 ; 4.044 ;
|
|
; 1.140 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|NCO_freq[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.699 ; 4.034 ;
|
|
; 1.145 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.530 ; 1.870 ;
|
|
; 1.145 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|NCO_freq[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.674 ; 4.014 ;
|
|
; 1.161 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|NCO_freq[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.674 ; 4.030 ;
|
|
; 1.163 ; stm32_interface:STM32_INTERFACE|Q_HOLD[4] ; stm32_interface:STM32_INTERFACE|TX_Q[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.239 ; 1.119 ;
|
|
; 1.173 ; stm32_interface:STM32_INTERFACE|Q_HOLD[9] ; stm32_interface:STM32_INTERFACE|TX_Q[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.019 ; 1.387 ;
|
|
; 1.185 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_CICFIR_GAIN[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.878 ; 4.258 ;
|
|
; 1.186 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|NCO_freq[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.699 ; 4.080 ;
|
|
; 1.187 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|TX_I[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.746 ; 4.128 ;
|
|
; 1.189 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 1.434 ;
|
|
; 1.192 ; stm32_interface:STM32_INTERFACE|Q_HOLD[8] ; stm32_interface:STM32_INTERFACE|TX_Q[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.019 ; 1.406 ;
|
|
; 1.202 ; stm32_interface:STM32_INTERFACE|Q_HOLD[12] ; stm32_interface:STM32_INTERFACE|TX_Q[12] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.019 ; 1.416 ;
|
|
; 1.210 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.350 ; 4.755 ;
|
|
; 1.245 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.764 ; 4.204 ;
|
|
; 1.251 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_I[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.746 ; 4.192 ;
|
|
; 1.278 ; stm32_interface:STM32_INTERFACE|Q_HOLD[13] ; stm32_interface:STM32_INTERFACE|TX_Q[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.087 ; 1.560 ;
|
|
; 1.281 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.764 ; 4.240 ;
|
|
; 1.332 ; STM32_SYNC ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.474 ; 4.001 ;
|
|
; 1.332 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|tx ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.843 ; 4.370 ;
|
|
; 1.332 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|rx ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.843 ; 4.370 ;
|
|
; 1.348 ; stm32_interface:STM32_INTERFACE|Q_HOLD[2] ; stm32_interface:STM32_INTERFACE|TX_Q[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.239 ; 1.304 ;
|
|
; 1.364 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_I[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.746 ; 4.305 ;
|
|
; 1.368 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.809 ; 4.372 ;
|
|
; 1.373 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[20] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.719 ; 4.287 ;
|
|
; 1.390 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|TX_CICFIR_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.675 ; 4.260 ;
|
|
; 1.392 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.764 ; 4.351 ;
|
|
; 1.403 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.709 ; 4.307 ;
|
|
; 1.412 ; stm32_interface:STM32_INTERFACE|I_HOLD[1] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.057 ; 1.664 ;
|
|
; 1.415 ; stm32_interface:STM32_INTERFACE|Q_HOLD[1] ; stm32_interface:STM32_INTERFACE|TX_Q[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.108 ; 1.502 ;
|
|
; 1.417 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|NCO_freq[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.699 ; 4.311 ;
|
|
; 1.436 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.792 ; 2.423 ;
|
|
; 1.437 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[17] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.719 ; 4.351 ;
|
|
; 1.443 ; STM32_SYNC ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.533 ; 4.171 ;
|
|
; 1.450 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|NCO_freq[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.674 ; 4.319 ;
|
|
; 1.458 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|ATT_4 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.869 ; 4.522 ;
|
|
; 1.466 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|ATT_8 ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.374 ; 5.035 ;
|
|
; 1.472 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|BPF_OE1 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.825 ; 4.492 ;
|
|
; 1.472 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.709 ; 4.376 ;
|
|
; 1.474 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.709 ; 4.378 ;
|
|
; 1.475 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|ATT_05 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.869 ; 4.539 ;
|
|
; 1.479 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|TX_I[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.743 ; 4.417 ;
|
|
; 1.485 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|DAC_GAIN[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.845 ; 4.525 ;
|
|
; 1.495 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.948 ; 4.638 ;
|
|
; 1.499 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|TX_I[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.743 ; 4.437 ;
|
|
; 1.503 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|LPF_2 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.825 ; 4.523 ;
|
|
; 1.504 ; stm32_interface:STM32_INTERFACE|FLASH_enable ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.173 ; 1.872 ;
|
|
; 1.510 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_CICFIR_GAIN[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.878 ; 4.583 ;
|
|
; 1.513 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.417 ; 2.125 ;
|
|
; 1.517 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|NCO_freq[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.699 ; 4.411 ;
|
|
; 1.522 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|NCO_freq[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.699 ; 4.416 ;
|
|
; 1.527 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.050 ; 1.772 ;
|
|
; 1.530 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|NCO_freq[16] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.729 ; 4.454 ;
|
|
; 1.535 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|LPF_3 ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.825 ; 4.555 ;
|
|
; 1.536 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[21] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.719 ; 4.450 ;
|
|
; 1.542 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|NCO_freq[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.674 ; 4.411 ;
|
|
; 1.544 ; stm32_interface:STM32_INTERFACE|I_HOLD[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.543 ; 2.282 ;
|
|
; 1.546 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 2.760 ; 4.501 ;
|
|
; 1.557 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 3.331 ; 5.083 ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Recovery: 'clk_sys' ;
|
|
+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT15 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT14 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT13 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT12 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT11 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT10 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT9 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT8 ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[22] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[21] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[20] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[19] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[23] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[18] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[16] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[15] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[14] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[13] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[12] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[11] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[10] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[9] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[8] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[7] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[6] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[5] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[4] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[3] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[2] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[1] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[0] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[17] ; clk_sys ; clk_sys ; 7.774 ; -0.369 ; 3.602 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT15 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT14 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT13 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT12 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT11 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT10 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT9 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT8 ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[22] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[21] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[20] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[19] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[18] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[17] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[16] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[15] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[14] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[13] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[12] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[11] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[10] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[9] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[8] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[7] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[6] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[5] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[4] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[3] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[2] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[1] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[0] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
|
|
; 3.572 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[23] ; clk_sys ; clk_sys ; 7.774 ; -0.366 ; 3.605 ;
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; 4.114 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][11] ; clk_sys ; clk_sys ; 7.774 ; -0.161 ; 3.501 ;
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; 4.114 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][12] ; clk_sys ; clk_sys ; 7.774 ; -0.161 ; 3.501 ;
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; 4.114 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][13] ; clk_sys ; clk_sys ; 7.774 ; -0.161 ; 3.501 ;
|
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; 4.114 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][14] ; clk_sys ; clk_sys ; 7.774 ; -0.161 ; 3.501 ;
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+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Slow 1200mV 0C Model Recovery: 'altera_reserved_tck' ;
|
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; 96.290 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 3.656 ;
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; 96.290 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 3.656 ;
|
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; 96.290 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 3.656 ;
|
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; 96.290 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.056 ; 3.656 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
|
|
; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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|
; 96.417 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.062 ; 3.523 ;
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; 97.464 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.088 ; 2.450 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.508 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.059 ; 2.435 ;
|
|
; 97.993 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.937 ;
|
|
; 98.025 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.071 ; 1.906 ;
|
|
; 98.025 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.071 ; 1.906 ;
|
|
; 98.025 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.071 ; 1.906 ;
|
|
; 98.025 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.071 ; 1.906 ;
|
|
; 98.025 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.071 ; 1.906 ;
|
|
; 98.107 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.823 ;
|
|
; 98.107 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.823 ;
|
|
; 98.107 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.823 ;
|
|
; 98.107 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.823 ;
|
|
; 98.404 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.526 ;
|
|
; 98.404 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.526 ;
|
|
; 98.404 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.072 ; 1.526 ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Removal: 'altera_reserved_tck' ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; 1.188 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.456 ;
|
|
; 1.188 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.456 ;
|
|
; 1.188 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.073 ; 1.456 ;
|
|
; 1.412 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 1.681 ;
|
|
; 1.412 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 1.681 ;
|
|
; 1.412 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 1.681 ;
|
|
; 1.412 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 1.681 ;
|
|
; 1.505 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.075 ; 1.775 ;
|
|
; 1.505 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.075 ; 1.775 ;
|
|
; 1.505 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.075 ; 1.775 ;
|
|
; 1.505 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.075 ; 1.775 ;
|
|
; 1.505 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.075 ; 1.775 ;
|
|
; 1.539 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.074 ; 1.808 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.871 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.087 ; 2.153 ;
|
|
; 1.932 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.058 ; 2.185 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.085 ; 3.312 ;
|
|
; 3.075 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.090 ; 3.360 ;
|
|
; 3.075 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.090 ; 3.360 ;
|
|
; 3.075 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.090 ; 3.360 ;
|
|
; 3.075 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.090 ; 3.360 ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
|
|
|
|
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Slow 1200mV 0C Model Removal: 'clk_sys' ;
|
|
+--------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][39] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][41] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.041 ; 3.198 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][59] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][59] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][59] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][60] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][60] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][60] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][61] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
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|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][61] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
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; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][61] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][62] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][62] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][62] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][63] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][63] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][63] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][64] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][64] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][64] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][65] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][65] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][65] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][66] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][66] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][66] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][67] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][67] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][67] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][68] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][68] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][68] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][69] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][69] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][69] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][70] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][70] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][70] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][71] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][71] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][71] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][72] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][72] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][72] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][73] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][73] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][73] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[0].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][74] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[1].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][74] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.797 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_integrator:integrator[2].integration|auk_dspip_delay:\glogic:integrator_pipeline_0_generate:u1|\register_fifo:fifo_data[0][74] ; clk_sys ; clk_sys ; -7.773 ; -0.043 ; 3.196 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][11] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][12] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][12] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][13] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][14] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][15] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][16] ; clk_sys ; clk_sys ; -7.773 ; -0.044 ; 3.196 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][16] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][17] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][18] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][19] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][20] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][22] ; clk_sys ; clk_sys ; -7.773 ; -0.044 ; 3.196 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.049 ; 3.191 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.042 ; 3.198 ;
|
|
; 10.798 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.050 ; 3.190 ;
|
|
+--------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
----------------------------------------------
|
|
; Slow 1200mV 0C Model Metastability Summary ;
|
|
----------------------------------------------
|
|
The design MTBF is not calculated because there are no specified synchronizers in the design.
|
|
Number of Synchronizer Chains Found: 113
|
|
Shortest Synchronizer Chain: 2 Registers
|
|
Fraction of Chains for which MTBFs Could Not be Calculated: 1.000
|
|
Worst Case Available Settling Time: 13.638 ns
|
|
|
|
|
|
|
|
|
|
+-----------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Setup Summary ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 1.395 ; 0.000 ;
|
|
; clk_sys ; 4.454 ; 0.000 ;
|
|
; clock_stm32 ; 34.929 ; 0.000 ;
|
|
; altera_reserved_tck ; 48.082 ; 0.000 ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
|
|
|
|
+----------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Hold Summary ;
|
|
+----------------------------------------------------+-------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+----------------------------------------------------+-------+---------------+
|
|
; clk_sys ; 0.135 ; 0.000 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.141 ; 0.000 ;
|
|
; altera_reserved_tck ; 0.186 ; 0.000 ;
|
|
; clock_stm32 ; 0.201 ; 0.000 ;
|
|
+----------------------------------------------------+-------+---------------+
|
|
|
|
|
|
+----------------------------------------------+
|
|
; Fast 1200mV 0C Model Recovery Summary ;
|
|
+---------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+---------------------+--------+---------------+
|
|
; clk_sys ; 5.163 ; 0.000 ;
|
|
; altera_reserved_tck ; 98.256 ; 0.000 ;
|
|
+---------------------+--------+---------------+
|
|
|
|
|
|
+---------------------------------------------+
|
|
; Fast 1200mV 0C Model Removal Summary ;
|
|
+---------------------+-------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+---------------------+-------+---------------+
|
|
; altera_reserved_tck ; 0.545 ; 0.000 ;
|
|
; clk_sys ; 9.779 ; 0.000 ;
|
|
+---------------------+-------+---------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Minimum Pulse Width Summary ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; Clock ; Slack ; End Point TNS ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 2.841 ; 0.000 ;
|
|
; clk_sys ; 6.972 ; 0.000 ;
|
|
; clock_stm32 ; 19.142 ; 0.000 ;
|
|
; altera_reserved_tck ; 49.471 ; 0.000 ;
|
|
+----------------------------------------------------+--------+---------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Setup: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]' ;
|
|
+-------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; 1.395 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.786 ;
|
|
; 1.399 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.782 ;
|
|
; 1.402 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.779 ;
|
|
; 1.406 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.775 ;
|
|
; 1.409 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.772 ;
|
|
; 1.413 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.768 ;
|
|
; 1.429 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.752 ;
|
|
; 1.433 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.748 ;
|
|
; 1.460 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.023 ; 4.722 ;
|
|
; 1.463 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.718 ;
|
|
; 1.464 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.023 ; 4.718 ;
|
|
; 1.464 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.721 ;
|
|
; 1.467 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.714 ;
|
|
; 1.468 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.717 ;
|
|
; 1.470 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.711 ;
|
|
; 1.474 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.707 ;
|
|
; 1.477 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.704 ;
|
|
; 1.481 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.700 ;
|
|
; 1.492 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.686 ;
|
|
; 1.496 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.682 ;
|
|
; 1.497 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.684 ;
|
|
; 1.501 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.680 ;
|
|
; 1.507 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.671 ;
|
|
; 1.509 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.669 ;
|
|
; 1.511 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.667 ;
|
|
; 1.511 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.672 ;
|
|
; 1.513 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.665 ;
|
|
; 1.514 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.671 ;
|
|
; 1.518 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.667 ;
|
|
; 1.518 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.667 ;
|
|
; 1.519 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.029 ; 4.657 ;
|
|
; 1.522 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.661 ;
|
|
; 1.522 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.663 ;
|
|
; 1.523 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.029 ; 4.653 ;
|
|
; 1.523 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.028 ; 4.654 ;
|
|
; 1.523 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.037 ; 4.645 ;
|
|
; 1.525 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.026 ; 4.654 ;
|
|
; 1.526 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.657 ;
|
|
; 1.526 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.659 ;
|
|
; 1.527 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.037 ; 4.641 ;
|
|
; 1.528 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.023 ; 4.654 ;
|
|
; 1.530 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[11] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.655 ;
|
|
; 1.531 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.650 ;
|
|
; 1.532 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.026 ; 4.647 ;
|
|
; 1.532 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.023 ; 4.650 ;
|
|
; 1.532 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.653 ;
|
|
; 1.535 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[26] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.646 ;
|
|
; 1.536 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.029 ; 4.640 ;
|
|
; 1.536 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.649 ;
|
|
; 1.538 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.643 ;
|
|
; 1.540 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.029 ; 4.636 ;
|
|
; 1.542 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[26] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.639 ;
|
|
; 1.545 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.636 ;
|
|
; 1.546 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.026 ; 4.633 ;
|
|
; 1.549 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.035 ; 4.621 ;
|
|
; 1.549 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[26] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.632 ;
|
|
; 1.553 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.035 ; 4.617 ;
|
|
; 1.555 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[13] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.019 ; 4.631 ;
|
|
; 1.558 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.026 ; 4.621 ;
|
|
; 1.558 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[3] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.625 ;
|
|
; 1.560 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.618 ;
|
|
; 1.562 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.019 ; 4.624 ;
|
|
; 1.564 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[15] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.614 ;
|
|
; 1.564 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.028 ; 4.613 ;
|
|
; 1.564 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.034 ; 4.607 ;
|
|
; 1.565 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[27] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.616 ;
|
|
; 1.567 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.046 ; 4.592 ;
|
|
; 1.568 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.615 ;
|
|
; 1.568 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.019 ; 4.618 ;
|
|
; 1.568 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.034 ; 4.603 ;
|
|
; 1.569 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.028 ; 4.608 ;
|
|
; 1.569 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[26] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.024 ; 4.612 ;
|
|
; 1.571 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.046 ; 4.588 ;
|
|
; 1.572 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.611 ;
|
|
; 1.573 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[2] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.610 ;
|
|
; 1.573 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.034 ; 4.598 ;
|
|
; 1.575 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.603 ;
|
|
; 1.575 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.046 ; 4.584 ;
|
|
; 1.575 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.608 ;
|
|
; 1.577 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.601 ;
|
|
; 1.577 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[5] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.028 ; 4.600 ;
|
|
; 1.577 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.034 ; 4.594 ;
|
|
; 1.579 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.599 ;
|
|
; 1.579 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.046 ; 4.580 ;
|
|
; 1.579 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[1] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.604 ;
|
|
; 1.581 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.027 ; 4.597 ;
|
|
; 1.581 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0122|altsyncram:altsyncram_component0|altsyncram_u8a1:auto_generated|q_a[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.019 ; 4.605 ;
|
|
; 1.582 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[0] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.601 ;
|
|
; 1.582 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.603 ;
|
|
; 1.584 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.010 ; 4.611 ;
|
|
; 1.586 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.039 ; 4.580 ;
|
|
; 1.586 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[8] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.599 ;
|
|
; 1.586 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[9] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[28] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.020 ; 4.599 ;
|
|
; 1.587 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[6] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.029 ; 4.589 ;
|
|
; 1.587 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[7] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.028 ; 4.590 ;
|
|
; 1.588 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[14] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[31] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.035 ; 4.582 ;
|
|
; 1.588 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_p8a1:auto_generated|q_a[4] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.010 ; 4.607 ;
|
|
; 1.589 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_a[12] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.026 ; 4.590 ;
|
|
; 1.590 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_madx_cen:m1|out[29] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.022 ; 4.593 ;
|
|
; 1.590 ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_4k82:auto_generated|q_b[10] ; tx_nco:TX_NCO|tx_nco_nco_ii_0:nco_ii_0|asj_nco_mady_cen:m0|out[30] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 6.218 ; -0.039 ; 4.576 ;
|
|
+-------+------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Setup: 'clk_sys' ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[85] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[84] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[83] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[82] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[81] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[80] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[79] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[78] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[77] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[76] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.454 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[75] ; clk_sys ; clk_sys ; 7.774 ; -0.610 ; 2.697 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[42] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[41] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[40] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[39] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[38] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[37] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[36] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[35] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[34] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[33] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[32] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[31] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[30] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[29] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[28] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.566 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[27] ; clk_sys ; clk_sys ; 7.774 ; -0.627 ; 2.568 ;
|
|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[26] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
|
|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[25] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
|
|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[24] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
|
|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[23] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
|
|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[22] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[21] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[20] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[19] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[18] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[17] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[16] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[15] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[14] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[13] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[12] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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|
; 4.576 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[11] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.559 ;
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|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[58] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
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|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[57] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
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|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[56] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[55] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
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|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[54] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[53] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[52] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[51] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[50] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[49] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[48] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
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|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[47] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
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|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[46] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[45] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[44] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.578 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[43] ; clk_sys ; clk_sys ; 7.774 ; -0.628 ; 2.555 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[10] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[9] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[8] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[7] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[6] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[5] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[4] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[3] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[2] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[1] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.601 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|dout[0] ; clk_sys ; clk_sys ; 7.774 ; -0.626 ; 2.534 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[58] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[57] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[56] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[55] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[54] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[53] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[52] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[51] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[50] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[49] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[48] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[47] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[46] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[45] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[44] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.630 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[43] ; clk_sys ; clk_sys ; 7.774 ; -0.607 ; 2.524 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[42] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[41] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[40] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[39] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[38] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[37] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[36] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[35] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[34] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[33] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[32] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[31] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[30] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
; 4.648 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|dout[29] ; clk_sys ; clk_sys ; 7.774 ; -0.605 ; 2.508 ;
|
|
+-------+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Setup: 'clock_stm32' ;
|
|
+--------+-------------------------------------------------+-------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-------------------------------------------------+-------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 34.929 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[7] ; STM32_DATA_BUS[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -1.125 ; 3.910 ;
|
|
; 35.177 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.850 ; 3.937 ;
|
|
; 35.217 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.751 ;
|
|
; 35.239 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.729 ;
|
|
; 35.366 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.559 ;
|
|
; 35.388 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.537 ;
|
|
; 35.435 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.347 ;
|
|
; 35.438 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.344 ;
|
|
; 35.438 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.530 ;
|
|
; 35.443 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.525 ;
|
|
; 35.457 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.325 ;
|
|
; 35.460 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.322 ;
|
|
; 35.465 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.503 ;
|
|
; 35.476 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.449 ;
|
|
; 35.476 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.492 ;
|
|
; 35.490 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.478 ;
|
|
; 35.498 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.427 ;
|
|
; 35.508 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 5.432 ;
|
|
; 35.516 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.409 ;
|
|
; 35.530 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 5.410 ;
|
|
; 35.538 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.387 ;
|
|
; 35.587 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.338 ;
|
|
; 35.604 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.364 ;
|
|
; 35.617 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 5.447 ;
|
|
; 35.625 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.300 ;
|
|
; 35.626 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.342 ;
|
|
; 35.639 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.286 ;
|
|
; 35.639 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 5.425 ;
|
|
; 35.656 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.126 ;
|
|
; 35.659 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.123 ;
|
|
; 35.664 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.304 ;
|
|
; 35.694 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.088 ;
|
|
; 35.697 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.085 ;
|
|
; 35.697 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.228 ;
|
|
; 35.702 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.266 ;
|
|
; 35.708 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.074 ;
|
|
; 35.711 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 5.071 ;
|
|
; 35.716 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.252 ;
|
|
; 35.729 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 5.211 ;
|
|
; 35.735 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.190 ;
|
|
; 35.737 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.188 ;
|
|
; 35.749 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.176 ;
|
|
; 35.767 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 5.173 ;
|
|
; 35.771 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.313 ;
|
|
; 35.775 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.150 ;
|
|
; 35.781 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 5.159 ;
|
|
; 35.789 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 5.136 ;
|
|
; 35.793 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.291 ;
|
|
; 35.825 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.143 ;
|
|
; 35.838 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 5.226 ;
|
|
; 35.863 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.105 ;
|
|
; 35.876 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 5.188 ;
|
|
; 35.877 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.091 ;
|
|
; 35.890 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 5.174 ;
|
|
; 35.925 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.159 ;
|
|
; 35.937 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.031 ;
|
|
; 35.947 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.137 ;
|
|
; 35.959 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 5.009 ;
|
|
; 35.992 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.092 ;
|
|
; 36.030 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.054 ;
|
|
; 36.044 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 5.040 ;
|
|
; 36.066 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 4.859 ;
|
|
; 36.135 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 4.647 ;
|
|
; 36.143 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.825 ;
|
|
; 36.146 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 4.938 ;
|
|
; 36.158 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.810 ;
|
|
; 36.164 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.804 ;
|
|
; 36.166 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; STM32_DATA_BUS[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -1.146 ; 2.652 ;
|
|
; 36.179 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 4.603 ;
|
|
; 36.184 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 4.900 ;
|
|
; 36.192 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 4.733 ;
|
|
; 36.196 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.772 ;
|
|
; 36.198 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.113 ; 4.886 ;
|
|
; 36.201 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 4.581 ;
|
|
; 36.204 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 4.736 ;
|
|
; 36.210 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.758 ;
|
|
; 36.214 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.969 ; 4.726 ;
|
|
; 36.220 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.850 ; 2.894 ;
|
|
; 36.246 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.811 ; 4.536 ;
|
|
; 36.276 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.692 ;
|
|
; 36.301 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.022 ; 3.684 ;
|
|
; 36.306 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.002 ; 3.699 ;
|
|
; 36.317 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 4.608 ;
|
|
; 36.322 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.997 ; 4.646 ;
|
|
; 36.330 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.040 ; 3.717 ;
|
|
; 36.338 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; STM32_DATA_BUS[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -1.146 ; 2.480 ;
|
|
; 36.338 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 4.726 ;
|
|
; 36.344 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; STM32_DATA_BUS[2] ; clock_stm32 ; clock_stm32 ; 40.000 ; -1.150 ; 2.470 ;
|
|
; 36.348 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|tx_iq_valid ; clock_stm32 ; clock_stm32 ; 40.000 ; 1.093 ; 4.716 ;
|
|
; 36.349 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.024 ; 3.634 ;
|
|
; 36.352 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.024 ; 3.631 ;
|
|
; 36.352 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.024 ; 3.631 ;
|
|
; 36.352 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 4.573 ;
|
|
; 36.359 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.002 ; 3.646 ;
|
|
; 36.359 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.002 ; 3.646 ;
|
|
; 36.364 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 4.561 ;
|
|
; 36.386 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[0] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.850 ; 2.728 ;
|
|
; 36.386 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; STM32_DATA_BUS[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.850 ; 2.728 ;
|
|
; 36.394 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 40.000 ; -0.168 ; 3.445 ;
|
|
; 36.399 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 40.000 ; 0.954 ; 4.526 ;
|
|
+--------+-------------------------------------------------+-------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Setup: 'altera_reserved_tck' ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; 48.082 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.278 ; 2.183 ;
|
|
; 48.193 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.278 ; 2.072 ;
|
|
; 48.345 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.278 ; 1.920 ;
|
|
; 48.372 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.267 ; 1.882 ;
|
|
; 48.572 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.278 ; 1.693 ;
|
|
; 48.660 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.270 ; 1.597 ;
|
|
; 48.668 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.269 ; 1.588 ;
|
|
; 48.788 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.270 ; 1.469 ;
|
|
; 48.834 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.278 ; 1.431 ;
|
|
; 48.881 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.279 ; 1.385 ;
|
|
; 49.018 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.277 ; 1.246 ;
|
|
; 49.022 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.279 ; 1.244 ;
|
|
; 49.036 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.279 ; 1.230 ;
|
|
; 49.100 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.277 ; 1.164 ;
|
|
; 49.154 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.279 ; 1.112 ;
|
|
; 49.155 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.280 ; 1.112 ;
|
|
; 49.211 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.280 ; 1.056 ;
|
|
; 49.323 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.280 ; 0.944 ;
|
|
; 49.346 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.280 ; 0.921 ;
|
|
; 49.358 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo ; altera_reserved_tck ; altera_reserved_tck ; 50.000 ; 0.279 ; 0.908 ;
|
|
; 97.626 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.326 ;
|
|
; 97.626 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.326 ;
|
|
; 97.626 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.326 ;
|
|
; 97.648 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.304 ;
|
|
; 97.648 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.304 ;
|
|
; 97.648 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.304 ;
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; 97.648 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 2.304 ;
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|
; 97.689 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.271 ;
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; 97.691 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.269 ;
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; 97.694 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.266 ;
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; 97.698 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.262 ;
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; 97.705 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.255 ;
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|
; 97.706 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.254 ;
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; 97.718 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.242 ;
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|
; 97.781 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 2.183 ;
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; 97.781 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 2.183 ;
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|
; 97.781 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 2.183 ;
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; 97.781 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 2.183 ;
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; 97.791 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.044 ; 2.152 ;
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; 97.791 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.044 ; 2.152 ;
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; 97.791 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.044 ; 2.152 ;
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|
; 97.791 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.044 ; 2.152 ;
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|
; 97.791 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.044 ; 2.152 ;
|
|
; 97.800 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.162 ;
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|
; 97.800 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.162 ;
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|
; 97.800 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.162 ;
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|
; 97.826 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.136 ;
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; 97.826 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.136 ;
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; 97.826 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.136 ;
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; 97.826 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.025 ; 2.136 ;
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|
; 97.834 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.129 ;
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|
; 97.834 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.129 ;
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|
; 97.834 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.129 ;
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; 97.856 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.107 ;
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; 97.856 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.107 ;
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; 97.856 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.107 ;
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; 97.856 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.107 ;
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; 97.857 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 2.103 ;
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; 97.878 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.085 ;
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; 97.878 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.085 ;
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; 97.878 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.085 ;
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; 97.878 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.085 ;
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; 97.895 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.033 ; 2.059 ;
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; 97.895 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.033 ; 2.059 ;
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; 97.897 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.033 ; 2.057 ;
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; 97.901 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 2.041 ;
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; 97.901 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 2.041 ;
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; 97.901 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 2.041 ;
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; 97.901 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 2.041 ;
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; 97.909 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.033 ; 2.045 ;
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; 97.909 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.033 ; 2.045 ;
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; 97.940 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 2.023 ;
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; 97.947 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 1.995 ;
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; 97.947 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 1.995 ;
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; 97.947 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 1.995 ;
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; 97.947 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.045 ; 1.995 ;
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; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.991 ;
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; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.991 ;
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; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.991 ;
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; 97.973 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.991 ;
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; 97.985 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.956 ;
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; 97.985 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.956 ;
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; 97.985 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.956 ;
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; 97.985 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.956 ;
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; 97.985 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.956 ;
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; 98.007 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.952 ;
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; 98.009 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.950 ;
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; 98.011 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.930 ;
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; 98.011 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.930 ;
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; 98.011 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.930 ;
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; 98.011 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.046 ; 1.930 ;
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; 98.012 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.947 ;
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; 98.016 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.943 ;
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; 98.023 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.936 ;
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; 98.024 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.935 ;
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; 98.032 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 1.931 ;
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; 98.033 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 1.930 ;
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; 98.036 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.923 ;
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; 98.038 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 1.925 ;
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; 98.043 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.024 ; 1.920 ;
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Fast 1200mV 0C Model Hold: 'clk_sys' ;
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+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; 0.135 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][10] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.467 ;
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; 0.136 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[45] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.465 ;
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; 0.137 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[26] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.466 ;
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; 0.139 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][3] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.471 ;
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; 0.140 ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.472 ;
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; 0.141 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][0] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.473 ;
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; 0.141 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[43] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.470 ;
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; 0.141 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[47] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.470 ;
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; 0.142 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[44] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.471 ;
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; 0.143 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[20] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.472 ;
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; 0.143 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[21] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.472 ;
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; 0.143 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[25] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.472 ;
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; 0.143 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[80] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.474 ;
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; 0.144 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[11] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.473 ;
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; 0.144 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[22] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.473 ;
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; 0.144 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][12] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.476 ;
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; 0.144 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[74] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.472 ;
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; 0.145 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[1] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.473 ;
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; 0.145 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[15] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.474 ;
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; 0.145 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[27] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.475 ;
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; 0.145 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.221 ; 0.470 ;
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; 0.145 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[77] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.474 ;
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; 0.145 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[79] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.474 ;
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; 0.146 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[7] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.474 ;
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; 0.146 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[84] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.477 ;
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; 0.147 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[2] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.475 ;
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; 0.147 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[68] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.478 ;
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; 0.148 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[0] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.476 ;
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; 0.148 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[23] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.477 ;
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; 0.148 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.480 ;
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; 0.149 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[6] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.477 ;
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; 0.149 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[24] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.478 ;
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; 0.149 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[61] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.477 ;
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; 0.150 ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][11] ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.482 ;
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; 0.151 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[85] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.482 ;
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; 0.152 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[80] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.480 ;
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; 0.154 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[71] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.485 ;
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; 0.155 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[14] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.484 ;
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; 0.155 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[28] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.483 ;
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; 0.155 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[60] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.487 ;
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; 0.155 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[31] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.482 ;
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; 0.155 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[66] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.483 ;
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; 0.155 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[13] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.482 ;
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; 0.155 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[32] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.483 ;
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; 0.155 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[35] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.483 ;
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; 0.155 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[70] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.486 ;
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; 0.156 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[56] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.487 ;
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; 0.156 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[41] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.484 ;
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; 0.157 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[3] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.485 ;
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; 0.157 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[4] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.485 ;
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; 0.157 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[83] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.485 ;
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; 0.158 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[34] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.488 ;
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; 0.158 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[29] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.486 ;
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; 0.158 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[54] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.489 ;
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; 0.158 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[78] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.488 ;
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; 0.158 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~portb_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.220 ; 0.482 ;
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; 0.158 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[56] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.222 ; 0.484 ;
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; 0.158 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[46] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.225 ; 0.487 ;
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; 0.159 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[52] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.490 ;
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; 0.159 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[4] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~porta_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.218 ; 0.481 ;
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; 0.159 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[83] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.490 ;
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; 0.160 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[29] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.487 ;
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; 0.160 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[82] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.491 ;
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; 0.160 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[12] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.487 ;
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; 0.161 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[71] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.493 ;
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; 0.161 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[64] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.489 ;
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; 0.161 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[4] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.488 ;
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; 0.161 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[6] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.488 ;
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; 0.162 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[50] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.493 ;
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; 0.162 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[51] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.493 ;
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; 0.163 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[39] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.493 ;
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; 0.163 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[17] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.490 ;
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; 0.163 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[30] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.491 ;
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; 0.163 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[48] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.494 ;
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; 0.164 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[82] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.492 ;
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; 0.164 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_f[2] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_cen:ux0123|altsyncram:altsyncram_component0|altsyncram_au91:auto_generated|ram_block1a4~porta_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.220 ; 0.488 ;
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; 0.165 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[38] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.495 ;
|
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; 0.165 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[16] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.492 ;
|
|
; 0.165 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[66] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.497 ;
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; 0.165 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[70] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.497 ;
|
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; 0.165 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[7] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~portb_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.220 ; 0.489 ;
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; 0.166 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[7] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~porta_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.218 ; 0.488 ;
|
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; 0.166 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[7] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.493 ;
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; 0.168 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[76] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.498 ;
|
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; 0.168 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[53] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.222 ; 0.494 ;
|
|
; 0.168 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[37] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.496 ;
|
|
; 0.168 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[39] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.496 ;
|
|
; 0.169 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[8] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.224 ; 0.497 ;
|
|
; 0.169 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[14] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.496 ;
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|
; 0.170 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[32] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.500 ;
|
|
; 0.170 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[79] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.500 ;
|
|
; 0.170 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cs[9] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~porta_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.218 ; 0.492 ;
|
|
; 0.170 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[28] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.223 ; 0.497 ;
|
|
; 0.170 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[50] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.222 ; 0.496 ;
|
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; 0.171 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[55] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.227 ; 0.502 ;
|
|
; 0.171 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[17] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a16~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.222 ; 0.497 ;
|
|
; 0.172 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[67] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.228 ; 0.504 ;
|
|
; 0.174 ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[40] ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a0~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.226 ; 0.504 ;
|
|
; 0.174 ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_gam_dp:ux008|rom_add_cc_temp[8] ; nco:RX_NCO|nco_nco_ii_0:nco_ii_0|asj_nco_as_m_dp_cen:ux0220|altsyncram:altsyncram_component|altsyncram_h982:auto_generated|ram_block1a0~portb_address_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.220 ; 0.498 ;
|
|
; 0.174 ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|dout[58] ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ji71:auto_generated|a_dpfifo_gqv:dpfifo|altsyncram_vah1:FIFOram|ram_block1a20~porta_datain_reg0 ; clk_sys ; clk_sys ; 0.000 ; 0.222 ; 0.500 ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Hold: 'TX_PLL|altpll_component|auto_generated|pll1|clk[0]' ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
|
|
; 0.141 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][9] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.221 ; 0.466 ;
|
|
; 0.142 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][4] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.221 ; 0.467 ;
|
|
; 0.144 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.228 ; 0.476 ;
|
|
; 0.145 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.228 ; 0.477 ;
|
|
; 0.145 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][5] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.220 ; 0.469 ;
|
|
; 0.146 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][11] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.469 ;
|
|
; 0.147 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][10] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.470 ;
|
|
; 0.148 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][14] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.220 ; 0.472 ;
|
|
; 0.152 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][15] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.228 ; 0.484 ;
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; 0.152 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][6] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.475 ;
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; 0.153 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.225 ; 0.482 ;
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; 0.154 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.226 ; 0.484 ;
|
|
; 0.155 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.478 ;
|
|
; 0.155 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[4] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.226 ; 0.485 ;
|
|
; 0.155 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.220 ; 0.479 ;
|
|
; 0.156 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][1] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.220 ; 0.480 ;
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|
; 0.157 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.226 ; 0.487 ;
|
|
; 0.159 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[3] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.482 ;
|
|
; 0.160 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][9] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.483 ;
|
|
; 0.162 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.217 ; 0.483 ;
|
|
; 0.164 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][14] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.487 ;
|
|
; 0.164 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][7] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.220 ; 0.488 ;
|
|
; 0.166 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][15] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.220 ; 0.490 ;
|
|
; 0.167 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[4] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.490 ;
|
|
; 0.167 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.490 ;
|
|
; 0.167 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][3] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.221 ; 0.492 ;
|
|
; 0.168 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.491 ;
|
|
; 0.169 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.492 ;
|
|
; 0.171 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|cntr_u9b:wr_ptr|counter_reg_bit[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|altsyncram_hah1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.226 ; 0.501 ;
|
|
; 0.172 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][13] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.219 ; 0.495 ;
|
|
; 0.182 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|dspba_delay:d_xIn_0_13|delay_signals[0][2] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_datain_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.221 ; 0.507 ;
|
|
; 0.184 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_add_0_0_o[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~portb_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.185 ; 0.473 ;
|
|
; 0.185 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_add_0_0_o[5] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~portb_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.185 ; 0.474 ;
|
|
; 0.186 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_aseq_eq ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[1] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|\u0_m0_wo0_run_clkproc:u0_m0_wo0_run_enable_c[6] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|\u0_m0_wo0_run_clkproc:u0_m0_wo0_run_enable_c[6] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_run_count[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[3] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|low_addressa[4] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|dffe_af ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|scfifo:source_FIFO|scfifo_ci71:auto_generated|a_dpfifo_9qv:dpfifo|usedw_is_1_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_usedw[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|rd_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_source:output_source_0|source_valid_s ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[5][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|wr_addr_ptr[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[4][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[1][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[0][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[3][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; tx_cic:TX_CIC_Q|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_controller:avalon_controller|auk_dspip_avalon_streaming_small_fifo:ready_FIFO|fifo_array[2][0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[1] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|low_addressa[2] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; tx_ciccomp:TX_CICCOMP_I|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_ra0_count0_i[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|dffe_nae ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|full_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.187 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|usedw_is_0_dff ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.189 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[3] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.226 ; 0.519 ;
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|
; 0.190 ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|u0_m0_wo0_wi0_r0_wa0_i[1] ; tx_ciccomp:TX_CICCOMP_Q|tx_ciccomp_0002:tx_ciccomp_inst|tx_ciccomp_0002_ast:tx_ciccomp_0002_ast_inst|tx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|altsyncram:u0_m0_wo0_wi0_r0_memr0_dmem|altsyncram_0mn3:auto_generated|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.226 ; 0.520 ;
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; 0.190 ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|cntr_s9b:wr_ptr|counter_reg_bit[0] ; tx_cic:TX_CIC_I|tx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|auk_dspip_avalon_streaming_sink:input_sink|scfifo:sink_FIFO|scfifo_gf71:auto_generated|a_dpfifo_1lv:dpfifo|altsyncram_l7h1:FIFOram|ram_block1a0~porta_address_reg0 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.217 ; 0.511 ;
|
|
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------+----------------------------------------------------+--------------+------------+------------+
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|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Hold: 'altera_reserved_tck' ;
|
|
+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; 0.186 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.307 ;
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; 0.186 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.307 ;
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; 0.186 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.307 ;
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; 0.186 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.307 ;
|
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; 0.186 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.307 ;
|
|
; 0.186 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
|
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
|
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; 0.187 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.307 ;
|
|
; 0.193 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.314 ;
|
|
; 0.193 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.314 ;
|
|
; 0.193 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.314 ;
|
|
; 0.194 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.314 ;
|
|
; 0.194 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.314 ;
|
|
; 0.196 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.316 ;
|
|
; 0.197 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.318 ;
|
|
; 0.198 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.319 ;
|
|
; 0.198 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[14] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.318 ;
|
|
; 0.200 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.321 ;
|
|
; 0.200 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.321 ;
|
|
; 0.200 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.320 ;
|
|
; 0.201 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.322 ;
|
|
; 0.206 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.326 ;
|
|
; 0.209 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.329 ;
|
|
; 0.237 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.357 ;
|
|
; 0.238 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.358 ;
|
|
; 0.239 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.359 ;
|
|
; 0.251 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.372 ;
|
|
; 0.252 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.373 ;
|
|
; 0.252 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.373 ;
|
|
; 0.252 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.373 ;
|
|
; 0.252 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.373 ;
|
|
; 0.252 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.373 ;
|
|
; 0.252 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.372 ;
|
|
; 0.252 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.372 ;
|
|
; 0.253 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.374 ;
|
|
; 0.253 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.374 ;
|
|
; 0.253 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[14] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.373 ;
|
|
; 0.253 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.373 ;
|
|
; 0.254 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.374 ;
|
|
; 0.255 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.375 ;
|
|
; 0.257 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.378 ;
|
|
; 0.259 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[10] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.379 ;
|
|
; 0.260 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[3] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|sld_rom_sr:\instance_id_gen:rom_info_inst|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.381 ;
|
|
; 0.261 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.382 ;
|
|
; 0.261 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.382 ;
|
|
; 0.263 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.383 ;
|
|
; 0.263 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.384 ;
|
|
; 0.265 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[12] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[13] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.385 ;
|
|
; 0.266 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.386 ;
|
|
; 0.268 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.389 ;
|
|
; 0.269 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.390 ;
|
|
; 0.270 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.391 ;
|
|
; 0.270 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.391 ;
|
|
; 0.270 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.391 ;
|
|
; 0.271 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.392 ;
|
|
; 0.271 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.392 ;
|
|
; 0.271 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.392 ;
|
|
; 0.272 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|sldfabric_ident_writedata[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.393 ;
|
|
; 0.273 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.394 ;
|
|
; 0.273 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.393 ;
|
|
; 0.273 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.393 ;
|
|
; 0.275 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.035 ; 0.394 ;
|
|
; 0.287 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.407 ;
|
|
; 0.294 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.415 ;
|
|
; 0.294 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.415 ;
|
|
; 0.298 ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|hold_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.419 ;
|
|
; 0.300 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.421 ;
|
|
; 0.302 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.422 ;
|
|
; 0.303 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.423 ;
|
|
; 0.304 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.425 ;
|
|
; 0.304 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.424 ;
|
|
; 0.307 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.427 ;
|
|
; 0.310 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.431 ;
|
|
; 0.313 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.433 ;
|
|
; 0.314 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[7] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.434 ;
|
|
; 0.315 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.435 ;
|
|
; 0.318 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.439 ;
|
|
; 0.318 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[5] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.438 ;
|
|
; 0.324 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.445 ;
|
|
; 0.326 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.447 ;
|
|
; 0.329 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.450 ;
|
|
; 0.329 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[10] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.449 ;
|
|
; 0.329 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[15] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.449 ;
|
|
; 0.336 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.457 ;
|
|
; 0.337 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.458 ;
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; 0.346 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[4] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_rom_sr:hub_info_reg|WORD_SR[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.466 ;
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; 0.347 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.036 ; 0.467 ;
|
|
; 0.352 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.038 ; 0.474 ;
|
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+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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|
|
|
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Hold: 'clock_stm32' ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|k[3] ; stm32_interface:STM32_INTERFACE|k[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.201 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.307 ;
|
|
; 0.207 ; stm32_interface:STM32_INTERFACE|I_HOLD[12] ; stm32_interface:STM32_INTERFACE|TX_I[12] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.023 ; 0.314 ;
|
|
; 0.207 ; stm32_interface:STM32_INTERFACE|I_HOLD[15] ; stm32_interface:STM32_INTERFACE|TX_I[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.023 ; 0.314 ;
|
|
; 0.219 ; stm32_interface:STM32_INTERFACE|I_HOLD[13] ; stm32_interface:STM32_INTERFACE|TX_I[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.012 ; 0.315 ;
|
|
; 0.260 ; stm32_interface:STM32_INTERFACE|I_HOLD[10] ; stm32_interface:STM32_INTERFACE|TX_I[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.035 ; 0.379 ;
|
|
; 0.261 ; stm32_interface:STM32_INTERFACE|Q_HOLD[14] ; stm32_interface:STM32_INTERFACE|TX_Q[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.042 ; 0.387 ;
|
|
; 0.264 ; stm32_interface:STM32_INTERFACE|Q_HOLD[7] ; stm32_interface:STM32_INTERFACE|TX_Q[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.040 ; 0.388 ;
|
|
; 0.268 ; stm32_interface:STM32_INTERFACE|Q_HOLD[6] ; stm32_interface:STM32_INTERFACE|TX_Q[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.040 ; 0.392 ;
|
|
; 0.290 ; stm32_interface:STM32_INTERFACE|Q_HOLD[15] ; stm32_interface:STM32_INTERFACE|TX_Q[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.042 ; 0.416 ;
|
|
; 0.291 ; stm32_interface:STM32_INTERFACE|Q_HOLD[10] ; stm32_interface:STM32_INTERFACE|TX_Q[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.042 ; 0.417 ;
|
|
; 0.291 ; stm32_interface:STM32_INTERFACE|I_HOLD[9] ; stm32_interface:STM32_INTERFACE|TX_I[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.023 ; 0.398 ;
|
|
; 0.292 ; stm32_interface:STM32_INTERFACE|I_HOLD[8] ; stm32_interface:STM32_INTERFACE|TX_I[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.023 ; 0.399 ;
|
|
; 0.334 ; stm32_interface:STM32_INTERFACE|I_HOLD[11] ; stm32_interface:STM32_INTERFACE|TX_I[11] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.035 ; 0.453 ;
|
|
; 0.335 ; stm32_interface:STM32_INTERFACE|Q_HOLD[3] ; stm32_interface:STM32_INTERFACE|TX_Q[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.040 ; 0.459 ;
|
|
; 0.338 ; stm32_interface:STM32_INTERFACE|I_HOLD[14] ; stm32_interface:STM32_INTERFACE|TX_I[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.035 ; 0.457 ;
|
|
; 0.369 ; stm32_interface:STM32_INTERFACE|k[8] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.477 ;
|
|
; 0.376 ; stm32_interface:STM32_INTERFACE|Q_HOLD[0] ; stm32_interface:STM32_INTERFACE|TX_Q[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.040 ; 0.500 ;
|
|
; 0.432 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.025 ; 0.541 ;
|
|
; 0.433 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.541 ;
|
|
; 0.436 ; stm32_interface:STM32_INTERFACE|k[9] ; stm32_interface:STM32_INTERFACE|k[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.544 ;
|
|
; 0.442 ; stm32_interface:STM32_INTERFACE|k[7] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.550 ;
|
|
; 0.466 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|ADC_MINMAX_RESET ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.204 ; 0.754 ;
|
|
; 0.474 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.025 ; 0.583 ;
|
|
; 0.496 ; stm32_interface:STM32_INTERFACE|Q_HOLD[5] ; stm32_interface:STM32_INTERFACE|TX_Q[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.087 ; 0.493 ;
|
|
; 0.499 ; stm32_interface:STM32_INTERFACE|Q_HOLD[11] ; stm32_interface:STM32_INTERFACE|TX_Q[11] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.060 ; 0.643 ;
|
|
; 0.509 ; stm32_interface:STM32_INTERFACE|Q_HOLD[4] ; stm32_interface:STM32_INTERFACE|TX_Q[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.092 ; 0.501 ;
|
|
; 0.513 ; stm32_interface:STM32_INTERFACE|k[4] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.621 ;
|
|
; 0.522 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.233 ; 0.839 ;
|
|
; 0.534 ; stm32_interface:STM32_INTERFACE|Q_HOLD[9] ; stm32_interface:STM32_INTERFACE|TX_Q[9] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.021 ; 0.639 ;
|
|
; 0.545 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.345 ; 0.974 ;
|
|
; 0.545 ; stm32_interface:STM32_INTERFACE|Q_HOLD[8] ; stm32_interface:STM32_INTERFACE|TX_Q[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.021 ; 0.650 ;
|
|
; 0.547 ; stm32_interface:STM32_INTERFACE|Q_HOLD[12] ; stm32_interface:STM32_INTERFACE|TX_Q[12] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.021 ; 0.652 ;
|
|
; 0.568 ; stm32_interface:STM32_INTERFACE|Q_HOLD[2] ; stm32_interface:STM32_INTERFACE|TX_Q[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.092 ; 0.560 ;
|
|
; 0.588 ; stm32_interface:STM32_INTERFACE|Q_HOLD[13] ; stm32_interface:STM32_INTERFACE|TX_Q[13] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.060 ; 0.732 ;
|
|
; 0.655 ; stm32_interface:STM32_INTERFACE|Q_HOLD[1] ; stm32_interface:STM32_INTERFACE|TX_Q[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.045 ; 0.694 ;
|
|
; 0.666 ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.774 ;
|
|
; 0.675 ; stm32_interface:STM32_INTERFACE|I_HOLD[1] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.020 ; 0.779 ;
|
|
; 0.687 ; stm32_interface:STM32_INTERFACE|FLASH_enable ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.066 ; 0.837 ;
|
|
; 0.689 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.326 ; 1.099 ;
|
|
; 0.698 ; stm32_interface:STM32_INTERFACE|k[5] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.168 ; 0.950 ;
|
|
; 0.707 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.199 ; 0.990 ;
|
|
; 0.708 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.199 ; 0.991 ;
|
|
; 0.718 ; stm32_interface:STM32_INTERFACE|sync_reset_n ; stm32_interface:STM32_INTERFACE|sync_reset_n ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.023 ; 0.825 ;
|
|
; 0.727 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.384 ; 2.195 ;
|
|
; 0.728 ; STM32_DATA_BUS[2] ; stm32_interface:STM32_INTERFACE|DAC_GAIN[2] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.204 ; 2.016 ;
|
|
; 0.737 ; stm32_interface:STM32_INTERFACE|I_HOLD[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.228 ; 1.049 ;
|
|
; 0.739 ; STM32_DATA_BUS[1] ; stm32_interface:STM32_INTERFACE|TX_I[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.143 ; 1.966 ;
|
|
; 0.742 ; STM32_DATA_BUS[3] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.436 ; 2.262 ;
|
|
; 0.743 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|FLASH_continue_read ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.090 ; 0.917 ;
|
|
; 0.746 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OE ; clock_stm32 ; clock_stm32 ; 0.000 ; -0.113 ; 0.717 ;
|
|
; 0.752 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_I[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.143 ; 1.979 ;
|
|
; 0.753 ; stm32_interface:STM32_INTERFACE|I_HOLD[14] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.194 ; 1.031 ;
|
|
; 0.755 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.863 ;
|
|
; 0.761 ; stm32_interface:STM32_INTERFACE|I_HOLD[5] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.198 ; 1.043 ;
|
|
; 0.767 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.150 ; 2.001 ;
|
|
; 0.768 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.199 ; 1.051 ;
|
|
; 0.782 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.013 ; 0.879 ;
|
|
; 0.787 ; stm32_interface:STM32_INTERFACE|I_HOLD[6] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.198 ; 1.069 ;
|
|
; 0.795 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.326 ; 1.205 ;
|
|
; 0.797 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_NCO_freq[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.116 ; 1.997 ;
|
|
; 0.799 ; stm32_interface:STM32_INTERFACE|FLASH_enable ; stm32_interface:STM32_INTERFACE|FLASH_enable ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.022 ; 0.905 ;
|
|
; 0.800 ; stm32_interface:STM32_INTERFACE|I_HOLD[4] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.198 ; 1.082 ;
|
|
; 0.801 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.384 ; 2.269 ;
|
|
; 0.802 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|NCO_freq[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.086 ; 1.972 ;
|
|
; 0.802 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|TX_I[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.143 ; 2.029 ;
|
|
; 0.808 ; stm32_interface:STM32_INTERFACE|k[6] ; stm32_interface:STM32_INTERFACE|k[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.168 ; 1.060 ;
|
|
; 0.813 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|NCO_freq[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.105 ; 2.002 ;
|
|
; 0.816 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.199 ; 1.099 ;
|
|
; 0.817 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.314 ; 1.215 ;
|
|
; 0.817 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|NCO_freq[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.105 ; 2.006 ;
|
|
; 0.819 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|TX_Q[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.013 ; 0.916 ;
|
|
; 0.822 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.314 ; 1.220 ;
|
|
; 0.822 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|CIC_GAIN[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.436 ; 2.342 ;
|
|
; 0.823 ; stm32_interface:STM32_INTERFACE|k[2] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.314 ; 1.221 ;
|
|
; 0.823 ; STM32_DATA_BUS[0] ; stm32_interface:STM32_INTERFACE|TX_CICFIR_GAIN[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.192 ; 2.099 ;
|
|
; 0.824 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|k[1] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.932 ;
|
|
; 0.828 ; STM32_DATA_BUS[7] ; stm32_interface:STM32_INTERFACE|NCO_freq[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.086 ; 1.998 ;
|
|
; 0.828 ; STM32_DATA_BUS[6] ; stm32_interface:STM32_INTERFACE|TX_I[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.143 ; 2.055 ;
|
|
; 0.835 ; STM32_DATA_BUS[4] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[4] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.141 ; 2.060 ;
|
|
; 0.836 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|FLASH_data_out[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.141 ; 2.061 ;
|
|
; 0.838 ; stm32_interface:STM32_INTERFACE|I_HOLD[3] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.223 ; 1.145 ;
|
|
; 0.842 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|DATA_BUS_OUT[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.196 ; 1.122 ;
|
|
; 0.842 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[8] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.950 ;
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; 0.845 ; stm32_interface:STM32_INTERFACE|k[1] ; stm32_interface:STM32_INTERFACE|k[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.024 ; 0.953 ;
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; 0.855 ; STM32_DATA_BUS[5] ; stm32_interface:STM32_INTERFACE|TX_I[5] ; clock_stm32 ; clock_stm32 ; 0.000 ; 1.143 ; 2.082 ;
|
|
; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[15] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
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; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[14] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
|
|
; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[10] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
|
|
; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[7] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
|
|
; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[6] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
|
|
; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[3] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
|
|
; 0.861 ; stm32_interface:STM32_INTERFACE|k[0] ; stm32_interface:STM32_INTERFACE|TX_Q[0] ; clock_stm32 ; clock_stm32 ; 0.000 ; 0.131 ; 1.076 ;
|
|
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Fast 1200mV 0C Model Recovery: 'clk_sys' ;
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+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT15 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT14 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT13 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT12 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT11 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT10 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT9 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT8 ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[22] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[21] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[20] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[19] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[23] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[18] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[16] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[15] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[14] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[13] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[12] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[11] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[10] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[9] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[8] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[7] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[6] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
|
|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[5] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[4] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[3] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[2] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[1] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[0] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICCOMP_I|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[17] ; clk_sys ; clk_sys ; 7.774 ; -0.691 ; 1.792 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT7 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT6 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT5 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT4 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT3 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT2 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT1 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAA_REGOUT0 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT15 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT14 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT13 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT12 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT11 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT10 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT9 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|mac_mult1~OBSERVABLEDATAB_REGOUT8 ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[22] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[21] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[20] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[19] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[18] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[17] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[16] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[15] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[14] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[13] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[12] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[11] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[10] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[9] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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|
; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[8] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[7] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[6] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[5] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[4] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[3] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[2] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[1] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[0] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.163 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|rx_ciccomp_0002_rtl_core:\real_passthrough:hpfircore_core|lpm_mult:u0_m0_wo0_mtree_mult1_0_component|mult_ncu:auto_generated|result[23] ; clk_sys ; clk_sys ; 7.774 ; -0.688 ; 1.795 ;
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; 5.392 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; 7.774 ; -0.618 ; 1.751 ;
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; 5.392 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; 7.774 ; -0.618 ; 1.751 ;
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; 5.392 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][38] ; clk_sys ; clk_sys ; 7.774 ; -0.618 ; 1.751 ;
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; 5.392 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_I|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][39] ; clk_sys ; clk_sys ; 7.774 ; -0.618 ; 1.751 ;
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+-------+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Fast 1200mV 0C Model Recovery: 'altera_reserved_tck' ;
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
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+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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; 98.256 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.708 ;
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; 98.256 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.708 ;
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; 98.256 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.708 ;
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; 98.256 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.023 ; 1.708 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.280 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.028 ; 1.679 ;
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; 98.715 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.047 ; 1.225 ;
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; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
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; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
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; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
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; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.761 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.027 ; 1.199 ;
|
|
; 98.999 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.953 ;
|
|
; 99.019 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.933 ;
|
|
; 99.019 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.933 ;
|
|
; 99.019 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.933 ;
|
|
; 99.019 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.933 ;
|
|
; 99.019 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.933 ;
|
|
; 99.076 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.876 ;
|
|
; 99.076 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.876 ;
|
|
; 99.076 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.876 ;
|
|
; 99.076 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.035 ; 0.876 ;
|
|
; 99.203 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.036 ; 0.748 ;
|
|
; 99.203 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.036 ; 0.748 ;
|
|
; 99.203 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000 ; -0.036 ; 0.748 ;
|
|
+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
|
|
|
|
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Removal: 'altera_reserved_tck' ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
|
|
; 0.545 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.666 ;
|
|
; 0.545 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.666 ;
|
|
; 0.545 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.666 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.774 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.774 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.774 ;
|
|
; 0.653 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.774 ;
|
|
; 0.699 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.038 ; 0.821 ;
|
|
; 0.699 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.038 ; 0.821 ;
|
|
; 0.699 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.038 ; 0.821 ;
|
|
; 0.699 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.038 ; 0.821 ;
|
|
; 0.699 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.038 ; 0.821 ;
|
|
; 0.710 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|clr_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|splitter_nodes_receive_0[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.037 ; 0.831 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.890 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.046 ; 1.020 ;
|
|
; 0.924 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.026 ; 1.034 ;
|
|
; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
|
|
; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[3] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[4] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[5] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[6] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[7] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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; 1.461 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|bypass_reg ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.045 ; 1.590 ;
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|
; 1.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[8] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.050 ; 1.605 ;
|
|
; 1.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[9] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.050 ; 1.605 ;
|
|
; 1.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[10] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.050 ; 1.605 ;
|
|
; 1.471 ; sld_hub:auto_hub|alt_sld_fab_with_jtag_input:\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|alt_sld_fab:instrumentation_fabric|alt_sld_fab_alt_sld_fab:alt_sld_fab|alt_sld_fab_alt_sld_fab_sldfabric:sldfabric|sld_jtag_hub:\jtag_hub_gen:real_sld_jtag_hub|sld_shadow_jsm:shadow_jsm|state[0] ; DEBUG:DBG_ADC|altsource_probe_top:in_system_sources_probes_0|altsource_probe:issp_impl|altsource_probe_body:altsource_probe_body_inst|altsource_probe_impl:\wider_probe_gen:wider_probe_inst|shift_reg[11] ; altera_reserved_tck ; altera_reserved_tck ; 0.000 ; 0.050 ; 1.605 ;
|
|
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
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+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Fast 1200mV 0C Model Removal: 'clk_sys' ;
|
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+-------+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
|
|
+-------+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][36] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
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|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][38] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][39] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][41] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[1].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.779 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][47] ; clk_sys ; clk_sys ; -7.773 ; -0.540 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][6] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][7] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][8] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][9] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][10] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][12] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][13] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][16] ; clk_sys ; clk_sys ; -7.773 ; -0.543 ; 1.568 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][17] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][21] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][22] ; clk_sys ; clk_sys ; -7.773 ; -0.543 ; 1.568 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][22] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][27] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][28] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
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; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
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|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
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|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][29] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][30] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][31] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][32] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][33] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][34] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][35] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][36] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][36] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][37] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][38] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][38] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][39] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][39] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][39] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.543 ; 1.568 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][40] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][41] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][41] ; clk_sys ; clk_sys ; -7.773 ; -0.546 ; 1.565 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[4].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][41] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[2].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.541 ; 1.570 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[3].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.548 ; 1.563 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][42] ; clk_sys ; clk_sys ; -7.773 ; -0.545 ; 1.566 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][43] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][44] ; clk_sys ; clk_sys ; -7.773 ; -0.543 ; 1.568 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][44] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][45] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][46] ; clk_sys ; clk_sys ; -7.773 ; -0.543 ; 1.568 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][46] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][47] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][48] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[0].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][49] ; clk_sys ; clk_sys ; -7.773 ; -0.543 ; 1.568 ;
|
|
; 9.780 ; stm32_interface:STM32_INTERFACE|reset_n ; rx_cic:RX_CIC_Q|rx_cic_cic_ii_0:cic_ii_0|alt_cic_core:core|alt_cic_dec_siso:dec_one|auk_dspip_differentiator:differentiate_stages[5].auk_dsp_diff|auk_dspip_delay:\glogic:u0|\register_fifo:fifo_data[0][49] ; clk_sys ; clk_sys ; -7.773 ; -0.550 ; 1.561 ;
|
|
+-------+-----------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
|
|
|
|
|
|
----------------------------------------------
|
|
; Fast 1200mV 0C Model Metastability Summary ;
|
|
----------------------------------------------
|
|
The design MTBF is not calculated because there are no specified synchronizers in the design.
|
|
Number of Synchronizer Chains Found: 113
|
|
Shortest Synchronizer Chain: 2 Registers
|
|
Fraction of Chains for which MTBFs Could Not be Calculated: 1.000
|
|
Worst Case Available Settling Time: 14.623 ns
|
|
|
|
|
|
|
|
|
|
+-------------------------------------------------------------------------------------------------------------------+
|
|
; Multicorner Timing Analysis Summary ;
|
|
+-----------------------------------------------------+----------+-------+----------+---------+---------------------+
|
|
; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ;
|
|
+-----------------------------------------------------+----------+-------+----------+---------+---------------------+
|
|
; Worst-case Slack ; -4.404 ; 0.135 ; 3.227 ; 0.545 ; 1.218 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; -4.404 ; 0.141 ; N/A ; N/A ; 1.218 ;
|
|
; altera_reserved_tck ; 45.160 ; 0.186 ; 96.012 ; 0.545 ; 49.402 ;
|
|
; clk_sys ; 1.814 ; 0.135 ; 3.227 ; 9.779 ; 6.972 ;
|
|
; clock_stm32 ; 30.027 ; 0.201 ; N/A ; N/A ; 19.142 ;
|
|
; Design-wide TNS ; -388.058 ; 0.0 ; 0.0 ; 0.0 ; 0.0 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; -388.058 ; 0.000 ; N/A ; N/A ; 0.000 ;
|
|
; altera_reserved_tck ; 0.000 ; 0.000 ; 0.000 ; 0.000 ; 0.000 ;
|
|
; clk_sys ; 0.000 ; 0.000 ; 0.000 ; 0.000 ; 0.000 ;
|
|
; clock_stm32 ; 0.000 ; 0.000 ; N/A ; N/A ; 0.000 ;
|
|
+-----------------------------------------------------+----------+-------+----------+---------+---------------------+
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Board Trace Model Assignments ;
|
|
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
|
|
; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
|
|
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
|
|
; PREAMP ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; AUDIO_I2S_CLOCK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; AUDIO_48K_CLOCK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; FLASH_C ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; FLASH_S ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; FLASH_MOSI ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_PD ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_CLK ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; ATT_05 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; ATT_1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; ATT_2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; ATT_4 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; ATT_8 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; ATT_16 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; BPF_A ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; BPF_B ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; BPF_OE1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; BPF_OE2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; LPF_1 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; LPF_2 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; LPF_3 ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; TXRX_OUT ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[13] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[12] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[11] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[10] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[9] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[8] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; DAC_OUTPUT[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[7] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[6] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[5] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[4] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[3] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[2] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[1] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; STM32_DATA_BUS[0] ; 3.3-V LVTTL ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
; altera_reserved_tdo ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
|
|
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
|
|
|
|
|
|
+------------------------------------------------------------------------+
|
|
; Input Transition Times ;
|
|
+---------------------+--------------+-----------------+-----------------+
|
|
; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
|
|
+---------------------+--------------+-----------------+-----------------+
|
|
; STM32_DATA_BUS[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_DATA_BUS[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_CLK ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; STM32_SYNC ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[0] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; clk_sys ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[1] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[2] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_OTR ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[3] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; FLASH_MISO ; 2.5 V ; 2000 ps ; 2000 ps ;
|
|
; ADC_INPUT[7] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[6] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[5] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[4] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[11] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[10] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[9] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; ADC_INPUT[8] ; 3.3-V LVTTL ; 2640 ps ; 2640 ps ;
|
|
; altera_reserved_tms ; 2.5 V ; 2000 ps ; 2000 ps ;
|
|
; altera_reserved_tck ; 2.5 V ; 2000 ps ; 2000 ps ;
|
|
; altera_reserved_tdi ; 2.5 V ; 2000 ps ; 2000 ps ;
|
|
+---------------------+--------------+-----------------+-----------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Signal Integrity Metrics (Slow 1200mv 0c Model) ;
|
|
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
|
; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
|
|
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
|
; PREAMP ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; AUDIO_I2S_CLOCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.09 V ; -0.011 V ; 0.196 V ; 0.301 V ; 4.93e-09 s ; 3.56e-09 s ; Yes ; Yes ; 3.08 V ; 8.89e-09 V ; 3.09 V ; -0.011 V ; 0.196 V ; 0.301 V ; 4.93e-09 s ; 3.56e-09 s ; Yes ; Yes ;
|
|
; AUDIO_48K_CLOCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; FLASH_C ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.74e-09 V ; 2.37 V ; -0.0346 V ; 0.198 V ; 0.094 V ; 3.14e-10 s ; 2.92e-10 s ; Yes ; Yes ; 2.32 V ; 1.74e-09 V ; 2.37 V ; -0.0346 V ; 0.198 V ; 0.094 V ; 3.14e-10 s ; 2.92e-10 s ; Yes ; Yes ;
|
|
; FLASH_S ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.84e-09 V ; 2.35 V ; -0.00384 V ; 0.219 V ; 0.014 V ; 9.41e-10 s ; 9.94e-10 s ; Yes ; Yes ; 2.32 V ; 3.84e-09 V ; 2.35 V ; -0.00384 V ; 0.219 V ; 0.014 V ; 9.41e-10 s ; 9.94e-10 s ; Yes ; Yes ;
|
|
; FLASH_MOSI ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.84e-09 V ; 2.35 V ; -0.00384 V ; 0.219 V ; 0.014 V ; 9.41e-10 s ; 9.94e-10 s ; Yes ; Yes ; 2.32 V ; 3.84e-09 V ; 2.35 V ; -0.00384 V ; 0.219 V ; 0.014 V ; 9.41e-10 s ; 9.94e-10 s ; Yes ; Yes ;
|
|
; DAC_PD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; ATT_05 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; ATT_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; ATT_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; ATT_4 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; ATT_8 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; ATT_16 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; BPF_A ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.09 V ; -0.011 V ; 0.226 V ; 0.296 V ; 4.86e-09 s ; 3.55e-09 s ; Yes ; Yes ; 3.08 V ; 6.38e-09 V ; 3.09 V ; -0.011 V ; 0.226 V ; 0.296 V ; 4.86e-09 s ; 3.55e-09 s ; Yes ; Yes ;
|
|
; BPF_B ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; BPF_OE1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; BPF_OE2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; LPF_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; LPF_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; LPF_3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; TXRX_OUT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.09 V ; -0.011 V ; 0.196 V ; 0.301 V ; 4.93e-09 s ; 3.56e-09 s ; Yes ; Yes ; 3.08 V ; 8.89e-09 V ; 3.09 V ; -0.011 V ; 0.196 V ; 0.301 V ; 4.93e-09 s ; 3.56e-09 s ; Yes ; Yes ;
|
|
; DAC_OUTPUT[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; DAC_OUTPUT[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.09 V ; -0.011 V ; 0.226 V ; 0.296 V ; 4.86e-09 s ; 3.55e-09 s ; Yes ; Yes ; 3.08 V ; 6.38e-09 V ; 3.09 V ; -0.011 V ; 0.226 V ; 0.296 V ; 4.86e-09 s ; 3.55e-09 s ; Yes ; Yes ;
|
|
; DAC_OUTPUT[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.13 V ; -0.117 V ; 0.15 V ; 0.263 V ; 6.31e-10 s ; 4.46e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ; 3.08 V ; 6.38e-09 V ; 3.12 V ; -0.0818 V ; 0.205 V ; 0.244 V ; 8.86e-10 s ; 6.56e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.09 V ; -0.011 V ; 0.196 V ; 0.301 V ; 4.93e-09 s ; 3.56e-09 s ; Yes ; Yes ; 3.08 V ; 8.89e-09 V ; 3.09 V ; -0.011 V ; 0.196 V ; 0.301 V ; 4.93e-09 s ; 3.56e-09 s ; Yes ; Yes ;
|
|
; STM32_DATA_BUS[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; STM32_DATA_BUS[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; STM32_DATA_BUS[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; STM32_DATA_BUS[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; STM32_DATA_BUS[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; STM32_DATA_BUS[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; STM32_DATA_BUS[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ; 3.08 V ; 8.89e-09 V ; 3.12 V ; -0.11 V ; 0.153 V ; 0.272 V ; 6.41e-10 s ; 4.57e-10 s ; No ; Yes ;
|
|
; altera_reserved_tdo ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.3e-08 V ; 2.33 V ; -0.0041 V ; 0.049 V ; 0.077 V ; 9.24e-10 s ; 2.03e-09 s ; Yes ; Yes ; 2.32 V ; 1.3e-08 V ; 2.33 V ; -0.0041 V ; 0.049 V ; 0.077 V ; 9.24e-10 s ; 2.03e-09 s ; Yes ; Yes ;
|
|
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Signal Integrity Metrics (Slow 1200mv 85c Model) ;
|
|
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
|
; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
|
|
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
|
; PREAMP ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; AUDIO_I2S_CLOCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.08 V ; -0.00457 V ; 0.185 V ; 0.21 V ; 5.8e-09 s ; 4.46e-09 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.08 V ; -0.00457 V ; 0.185 V ; 0.21 V ; 5.8e-09 s ; 4.46e-09 s ; Yes ; Yes ;
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; AUDIO_48K_CLOCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; FLASH_C ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.55e-07 V ; 2.35 V ; -0.00221 V ; 0.097 V ; 0.005 V ; 4.49e-10 s ; 3.85e-10 s ; Yes ; Yes ; 2.32 V ; 1.55e-07 V ; 2.35 V ; -0.00221 V ; 0.097 V ; 0.005 V ; 4.49e-10 s ; 3.85e-10 s ; Yes ; Yes ;
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; FLASH_S ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.68e-07 V ; 2.34 V ; -0.00303 V ; 0.122 V ; 0.029 V ; 1.16e-09 s ; 1.22e-09 s ; Yes ; Yes ; 2.32 V ; 3.68e-07 V ; 2.34 V ; -0.00303 V ; 0.122 V ; 0.029 V ; 1.16e-09 s ; 1.22e-09 s ; Yes ; Yes ;
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; FLASH_MOSI ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.68e-07 V ; 2.34 V ; -0.00303 V ; 0.122 V ; 0.029 V ; 1.16e-09 s ; 1.22e-09 s ; Yes ; Yes ; 2.32 V ; 3.68e-07 V ; 2.34 V ; -0.00303 V ; 0.122 V ; 0.029 V ; 1.16e-09 s ; 1.22e-09 s ; Yes ; Yes ;
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; DAC_PD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; ATT_05 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; ATT_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; ATT_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; ATT_4 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; ATT_8 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; ATT_16 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; BPF_A ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.08 V ; -0.0053 V ; 0.206 V ; 0.247 V ; 5.77e-09 s ; 4.45e-09 s ; Yes ; Yes ; 3.08 V ; 5.04e-07 V ; 3.08 V ; -0.0053 V ; 0.206 V ; 0.247 V ; 5.77e-09 s ; 4.45e-09 s ; Yes ; Yes ;
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; BPF_B ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; BPF_OE1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; BPF_OE2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; LPF_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; LPF_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; LPF_3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; TXRX_OUT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.08 V ; -0.00457 V ; 0.185 V ; 0.21 V ; 5.8e-09 s ; 4.46e-09 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.08 V ; -0.00457 V ; 0.185 V ; 0.21 V ; 5.8e-09 s ; 4.46e-09 s ; Yes ; Yes ;
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; DAC_OUTPUT[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; DAC_OUTPUT[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; DAC_OUTPUT[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.08 V ; -0.0053 V ; 0.206 V ; 0.247 V ; 5.77e-09 s ; 4.45e-09 s ; Yes ; Yes ; 3.08 V ; 5.04e-07 V ; 3.08 V ; -0.0053 V ; 0.206 V ; 0.247 V ; 5.77e-09 s ; 4.45e-09 s ; Yes ; Yes ;
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; DAC_OUTPUT[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0624 V ; 0.233 V ; 0.172 V ; 6.86e-10 s ; 6.33e-10 s ; Yes ; No ;
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; DAC_OUTPUT[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; DAC_OUTPUT[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ; 3.08 V ; 5.04e-07 V ; 3.11 V ; -0.0469 V ; 0.191 V ; 0.215 V ; 1.08e-09 s ; 8.62e-10 s ; Yes ; No ;
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; STM32_DATA_BUS[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.08 V ; -0.00457 V ; 0.185 V ; 0.21 V ; 5.8e-09 s ; 4.46e-09 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.08 V ; -0.00457 V ; 0.185 V ; 0.21 V ; 5.8e-09 s ; 4.46e-09 s ; Yes ; Yes ;
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; STM32_DATA_BUS[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; STM32_DATA_BUS[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; STM32_DATA_BUS[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; STM32_DATA_BUS[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; STM32_DATA_BUS[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; STM32_DATA_BUS[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; STM32_DATA_BUS[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ; 3.08 V ; 7.5e-07 V ; 3.11 V ; -0.0503 V ; 0.122 V ; 0.172 V ; 7.08e-10 s ; 6.43e-10 s ; Yes ; Yes ;
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; altera_reserved_tdo ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.29e-06 V ; 2.33 V ; 1.29e-06 V ; 0.018 V ; 0.046 V ; 1.15e-09 s ; 2.62e-09 s ; Yes ; Yes ; 2.32 V ; 1.29e-06 V ; 2.33 V ; 1.29e-06 V ; 0.018 V ; 0.046 V ; 1.15e-09 s ; 2.62e-09 s ; Yes ; Yes ;
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+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
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+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Signal Integrity Metrics (Fast 1200mv 0c Model) ;
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+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
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; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
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+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
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; PREAMP ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
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; AUDIO_I2S_CLOCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;
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; AUDIO_48K_CLOCK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
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; FLASH_C ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ; 2.62 V ; 2.22e-08 V ; 2.74 V ; -0.06 V ; 0.158 V ; 0.08 V ; 2.68e-10 s ; 2.19e-10 s ; Yes ; Yes ;
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; FLASH_S ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 5.2e-08 V ; 2.68 V ; -0.0184 V ; 0.22 V ; 0.08 V ; 6.93e-10 s ; 7.4e-10 s ; No ; Yes ; 2.62 V ; 5.2e-08 V ; 2.68 V ; -0.0184 V ; 0.22 V ; 0.08 V ; 6.93e-10 s ; 7.4e-10 s ; No ; Yes ;
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; FLASH_MOSI ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 5.2e-08 V ; 2.68 V ; -0.0184 V ; 0.22 V ; 0.08 V ; 6.93e-10 s ; 7.4e-10 s ; No ; Yes ; 2.62 V ; 5.2e-08 V ; 2.68 V ; -0.0184 V ; 0.22 V ; 0.08 V ; 6.93e-10 s ; 7.4e-10 s ; No ; Yes ;
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; DAC_PD ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
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; DAC_CLK ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
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; ATT_05 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
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; ATT_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
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; ATT_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; ATT_4 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; ATT_8 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; ATT_16 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; BPF_A ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;
|
|
; BPF_B ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; BPF_OE1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; BPF_OE2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; LPF_1 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; LPF_2 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; LPF_3 ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; TXRX_OUT ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[13] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[12] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[11] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;
|
|
; DAC_OUTPUT[10] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[9] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[8] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.48 V ; -0.0162 V ; 0.354 V ; 0.317 V ; 3.88e-09 s ; 3.06e-09 s ; No ; No ;
|
|
; DAC_OUTPUT[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.6 V ; -0.127 V ; 0.302 V ; 0.21 V ; 4.55e-10 s ; 4.11e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; DAC_OUTPUT[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ; 3.46 V ; 1.25e-07 V ; 3.57 V ; -0.0855 V ; 0.315 V ; 0.175 V ; 6.79e-10 s ; 6.15e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[7] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.48 V ; -0.0173 V ; 0.356 V ; 0.324 V ; 3.89e-09 s ; 3.06e-09 s ; No ; No ;
|
|
; STM32_DATA_BUS[6] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[5] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[4] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[3] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[2] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[1] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; STM32_DATA_BUS[0] ; 3.3-V LVTTL ; 0 s ; 0 s ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ; 3.46 V ; 1.85e-07 V ; 3.57 V ; -0.141 V ; 0.301 V ; 0.239 V ; 4.61e-10 s ; 4.2e-10 s ; No ; No ;
|
|
; altera_reserved_tdo ; 2.5 V ; 0 s ; 0 s ; 2.62 V ; 1.77e-07 V ; 2.65 V ; -0.0108 V ; 0.18 V ; 0.17 V ; 6.63e-10 s ; 1.56e-09 s ; Yes ; Yes ; 2.62 V ; 1.77e-07 V ; 2.65 V ; -0.0108 V ; 0.18 V ; 0.17 V ; 6.63e-10 s ; 1.56e-09 s ; Yes ; Yes ;
|
|
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
|
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Setup Transfers ;
|
|
+----------------------------------------------------+----------------------------------------------------+------------+----------+------------+----------+
|
|
; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
|
|
+----------------------------------------------------+----------------------------------------------------+------------+----------+------------+----------+
|
|
; altera_reserved_tck ; altera_reserved_tck ; 824 ; 0 ; 34 ; 0 ;
|
|
; clk_sys ; clk_sys ; 226191 ; 3171 ; 2752 ; 0 ;
|
|
; clock_stm32 ; clk_sys ; false path ; 0 ; false path ; 0 ;
|
|
; clk_sys ; clock_stm32 ; false path ; 0 ; 0 ; 0 ;
|
|
; clock_stm32 ; clock_stm32 ; 6154 ; 0 ; 0 ; 0 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; clock_stm32 ; false path ; 0 ; 0 ; 0 ;
|
|
; clock_stm32 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; false path ; 0 ; 0 ; 0 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 145868 ; 0 ; 0 ; 0 ;
|
|
+----------------------------------------------------+----------------------------------------------------+------------+----------+------------+----------+
|
|
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
|
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Hold Transfers ;
|
|
+----------------------------------------------------+----------------------------------------------------+------------+----------+------------+----------+
|
|
; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
|
|
+----------------------------------------------------+----------------------------------------------------+------------+----------+------------+----------+
|
|
; altera_reserved_tck ; altera_reserved_tck ; 824 ; 0 ; 34 ; 0 ;
|
|
; clk_sys ; clk_sys ; 226191 ; 3171 ; 2752 ; 0 ;
|
|
; clock_stm32 ; clk_sys ; false path ; 0 ; false path ; 0 ;
|
|
; clk_sys ; clock_stm32 ; false path ; 0 ; 0 ; 0 ;
|
|
; clock_stm32 ; clock_stm32 ; 6154 ; 0 ; 0 ; 0 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; clock_stm32 ; false path ; 0 ; 0 ; 0 ;
|
|
; clock_stm32 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; false path ; 0 ; 0 ; 0 ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; 145868 ; 0 ; 0 ; 0 ;
|
|
+----------------------------------------------------+----------------------------------------------------+------------+----------+------------+----------+
|
|
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------+
|
|
; Recovery Transfers ;
|
|
+---------------------+----------------------------------------------------+------------+----------+----------+----------+
|
|
; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
|
|
+---------------------+----------------------------------------------------+------------+----------+----------+----------+
|
|
; altera_reserved_tck ; altera_reserved_tck ; 39 ; 0 ; 0 ; 0 ;
|
|
; clk_sys ; clk_sys ; 0 ; 2560 ; 0 ; 0 ;
|
|
; clock_stm32 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; false path ; 0 ; 0 ; 0 ;
|
|
+---------------------+----------------------------------------------------+------------+----------+----------+----------+
|
|
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------------------+
|
|
; Removal Transfers ;
|
|
+---------------------+----------------------------------------------------+------------+----------+----------+----------+
|
|
; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
|
|
+---------------------+----------------------------------------------------+------------+----------+----------+----------+
|
|
; altera_reserved_tck ; altera_reserved_tck ; 39 ; 0 ; 0 ; 0 ;
|
|
; clk_sys ; clk_sys ; 0 ; 2560 ; 0 ; 0 ;
|
|
; clock_stm32 ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; false path ; 0 ; 0 ; 0 ;
|
|
+---------------------+----------------------------------------------------+------------+----------+----------+----------+
|
|
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
|
|
|
|
|
|
---------------
|
|
; Report TCCS ;
|
|
---------------
|
|
No dedicated SERDES Transmitter circuitry present in device or used in design
|
|
|
|
|
|
---------------
|
|
; Report RSKM ;
|
|
---------------
|
|
No non-DPA dedicated SERDES Receiver circuitry present in device or used in design
|
|
|
|
|
|
+------------------------------------------------+
|
|
; Unconstrained Paths Summary ;
|
|
+---------------------------------+-------+------+
|
|
; Property ; Setup ; Hold ;
|
|
+---------------------------------+-------+------+
|
|
; Illegal Clocks ; 0 ; 0 ;
|
|
; Unconstrained Clocks ; 1 ; 1 ;
|
|
; Unconstrained Input Ports ; 16 ; 16 ;
|
|
; Unconstrained Input Port Paths ; 902 ; 902 ;
|
|
; Unconstrained Output Ports ; 37 ; 37 ;
|
|
; Unconstrained Output Port Paths ; 51 ; 51 ;
|
|
+---------------------------------+-------+------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
; Clock Status Summary ;
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-----------+---------------+
|
|
; Target ; Clock ; Type ; Status ;
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-----------+---------------+
|
|
; MAIN_PLL|altpll_component|auto_generated|pll1|clk[0] ; MAIN_PLL|altpll_component|auto_generated|pll1|clk[0] ; Generated ; Constrained ;
|
|
; MAIN_PLL|altpll_component|auto_generated|pll1|clk[1] ; MAIN_PLL|altpll_component|auto_generated|pll1|clk[1] ; Generated ; Constrained ;
|
|
; STM32_CLK ; clock_stm32 ; Base ; Constrained ;
|
|
; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; TX_PLL|altpll_component|auto_generated|pll1|clk[0] ; Generated ; Constrained ;
|
|
; altera_reserved_tck ; altera_reserved_tck ; Base ; Constrained ;
|
|
; clk_sys ; clk_sys ; Base ; Constrained ;
|
|
; rx_ciccomp:RX_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|auk_dspip_avalon_streaming_source_hpfir:source|data_valid ; ; Base ; Unconstrained ;
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-----------+---------------+
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------+
|
|
; Unconstrained Input Ports ;
|
|
+---------------------+--------------------------------------------------------------------------------------+
|
|
; Input Port ; Comment ;
|
|
+---------------------+--------------------------------------------------------------------------------------+
|
|
; ADC_INPUT[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[8] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[9] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[10] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[11] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_OTR ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_MISO ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; altera_reserved_tdi ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; altera_reserved_tms ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
+---------------------+--------------------------------------------------------------------------------------+
|
|
|
|
|
|
+-------------------------------------------------------------------------------------------------------------+
|
|
; Unconstrained Output Ports ;
|
|
+---------------------+---------------------------------------------------------------------------------------+
|
|
; Output Port ; Comment ;
|
|
+---------------------+---------------------------------------------------------------------------------------+
|
|
; ATT_1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_4 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_05 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_8 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_16 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; AUDIO_48K_CLOCK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; AUDIO_I2S_CLOCK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_A ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_OE1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_OE2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_CLK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[8] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[9] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[10] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[11] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[12] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[13] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_PD ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_C ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_MOSI ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_S ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; LPF_1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; LPF_2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; LPF_3 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; PREAMP ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; TXRX_OUT ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; altera_reserved_tdo ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
+---------------------+---------------------------------------------------------------------------------------+
|
|
|
|
|
|
+------------------------------------------------------------------------------------------------------------+
|
|
; Unconstrained Input Ports ;
|
|
+---------------------+--------------------------------------------------------------------------------------+
|
|
; Input Port ; Comment ;
|
|
+---------------------+--------------------------------------------------------------------------------------+
|
|
; ADC_INPUT[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[8] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[9] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[10] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_INPUT[11] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ADC_OTR ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_MISO ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; altera_reserved_tdi ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; altera_reserved_tms ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
+---------------------+--------------------------------------------------------------------------------------+
|
|
|
|
|
|
+-------------------------------------------------------------------------------------------------------------+
|
|
; Unconstrained Output Ports ;
|
|
+---------------------+---------------------------------------------------------------------------------------+
|
|
; Output Port ; Comment ;
|
|
+---------------------+---------------------------------------------------------------------------------------+
|
|
; ATT_1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_4 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_05 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_8 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; ATT_16 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; AUDIO_48K_CLOCK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; AUDIO_I2S_CLOCK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_A ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_B ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_OE1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; BPF_OE2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_CLK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[8] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[9] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[10] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[11] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[12] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_OUTPUT[13] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; DAC_PD ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_C ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_MOSI ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; FLASH_S ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; LPF_1 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; LPF_2 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; LPF_3 ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; PREAMP ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; TXRX_OUT ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
; altera_reserved_tdo ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
|
|
+---------------------+---------------------------------------------------------------------------------------+
|
|
|
|
|
|
+--------------------------+
|
|
; Timing Analyzer Messages ;
|
|
+--------------------------+
|
|
Info: *******************************************************************
|
|
Info: Running Quartus Prime Timing Analyzer
|
|
Info: Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition
|
|
Info: Processing started: Thu Jan 07 18:22:24 2021
|
|
Info: Command: quartus_sta WOLF-LITE -c WOLF-LITE
|
|
Info: qsta_default_script.tcl version: #1
|
|
Info (20030): Parallel compilation is enabled and will use 4 of the 4 processors detected
|
|
Info (21077): Low junction temperature is 0 degrees C
|
|
Info (21077): High junction temperature is 85 degrees C
|
|
Info (332164): Evaluating HDL-embedded SDC commands
|
|
Info (332165): Entity sld_hub
|
|
Info (332166): create_clock -name altera_reserved_tck [get_ports {altera_reserved_tck}] -period 10MHz
|
|
Info (332166): set_clock_groups -asynchronous -group {altera_reserved_tck}
|
|
Info (332104): Reading SDC File: 'SDC.sdc'
|
|
Warning (332174): Ignored filter at SDC.sdc(5): rx_ciccomp:RX1_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|auk_dspip_avalon_streaming_source_hpfir:source|data_valid could not be matched with a port or pin or register or keeper or net or combinational node or node File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 5
|
|
Warning (332049): Ignored create_clock at SDC.sdc(5): Argument <targets> is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 5
|
|
Info (332050): create_clock -name "iq_valid" -period 48KHz {rx_ciccomp:RX1_CICOMP_Q|rx_ciccomp_0002:rx_ciccomp_inst|rx_ciccomp_0002_ast:rx_ciccomp_0002_ast_inst|auk_dspip_avalon_streaming_source_hpfir:source|data_valid} File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 5
|
|
Warning (332174): Ignored filter at SDC.sdc(7): clock_sys could not be matched with a clock File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 7
|
|
Warning (332174): Ignored filter at SDC.sdc(7): iq_valid could not be matched with a clock File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 7
|
|
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
|
|
Info (332110): Deriving PLL clocks
|
|
Info (332110): create_generated_clock -source {MAIN_PLL|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 335 -multiply_by 64 -duty_cycle 50.00 -name {MAIN_PLL|altpll_component|auto_generated|pll1|clk[0]} {MAIN_PLL|altpll_component|auto_generated|pll1|clk[0]}
|
|
Info (332110): create_generated_clock -source {MAIN_PLL|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 1340 -duty_cycle 50.00 -name {MAIN_PLL|altpll_component|auto_generated|pll1|clk[1]} {MAIN_PLL|altpll_component|auto_generated|pll1|clk[1]}
|
|
Info (332110): create_generated_clock -source {TX_PLL|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 2 -multiply_by 5 -duty_cycle 50.00 -name {TX_PLL|altpll_component|auto_generated|pll1|clk[0]} {TX_PLL|altpll_component|auto_generated|pll1|clk[0]}
|
|
Warning (332174): Ignored filter at SDC.sdc(13): clock_crystal could not be matched with a clock File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 13
|
|
Warning (332049): Ignored set_output_delay at SDC.sdc(13): Argument -clock is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 13
|
|
Info (332050): set_output_delay -clock clock_crystal -max 36ps [get_ports {DAC_OUTPUT[*]}] File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 13
|
|
Warning (332049): Ignored set_output_delay at SDC.sdc(14): Argument -clock is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 14
|
|
Info (332050): set_output_delay -clock clock_crystal -min 0ps [get_ports {DAC_OUTPUT[*]}] File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 14
|
|
Warning (332174): Ignored filter at SDC.sdc(18): clock_adc could not be matched with a clock File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 18
|
|
Warning (332049): Ignored set_input_delay at SDC.sdc(18): Argument -clock is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 18
|
|
Info (332050): set_input_delay -clock clock_adc -max 36ps [get_ports ADC_INPUT[*]] File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 18
|
|
Warning (332049): Ignored set_input_delay at SDC.sdc(19): Argument -clock is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 19
|
|
Info (332050): set_input_delay -clock clock_adc -min 0ps [get_ports ADC_INPUT[*]] File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 19
|
|
Warning (332049): Ignored set_input_delay at SDC.sdc(20): Argument -clock is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 20
|
|
Info (332050): set_input_delay -clock clock_adc -max 36ps [get_ports ADC_OTR] File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 20
|
|
Warning (332049): Ignored set_input_delay at SDC.sdc(21): Argument -clock is not an object ID File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 21
|
|
Info (332050): set_input_delay -clock clock_adc -min 0ps [get_ports ADC_OTR] File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 21
|
|
Warning (332174): Ignored filter at SDC.sdc(27): iq_valid could not be matched with a clock File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 27
|
|
Warning (332049): Ignored set_multicycle_path at SDC.sdc(27): Argument <to> is an empty collection File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 27
|
|
Info (332050): set_multicycle_path -from [get_clocks {clock_stm32}] -to [get_clocks {iq_valid}] -setup -end 2 File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 27
|
|
Warning (332049): Ignored set_multicycle_path at SDC.sdc(28): Argument <to> is an empty collection File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 28
|
|
Info (332050): set_multicycle_path -from [get_clocks {clock_stm32}] -to [get_clocks {iq_valid}] -hold -end 2 File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 28
|
|
Warning (332049): Ignored set_multicycle_path at SDC.sdc(29): Argument <from> is an empty collection File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 29
|
|
Info (332050): set_multicycle_path -from [get_clocks {iq_valid}] -to [get_clocks {clock_stm32}] -setup -end 2 File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 29
|
|
Warning (332049): Ignored set_multicycle_path at SDC.sdc(30): Argument <from> is an empty collection File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 30
|
|
Info (332050): set_multicycle_path -from [get_clocks {iq_valid}] -to [get_clocks {clock_stm32}] -hold -end 2 File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 30
|
|
Warning (332174): Ignored filter at SDC.sdc(31): clock_sys could not be matched with a clock File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 31
|
|
Warning (332049): Ignored set_multicycle_path at SDC.sdc(31): Argument <to> is an empty collection File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 31
|
|
Info (332050): set_multicycle_path -from [get_clocks {clock_stm32}] -to [get_clocks {clock_sys}] -setup -end 2 File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 31
|
|
Warning (332049): Ignored set_multicycle_path at SDC.sdc(32): Argument <to> is an empty collection File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 32
|
|
Info (332050): set_multicycle_path -from [get_clocks {clock_stm32}] -to [get_clocks {clock_sys}] -hold -end 2 File: D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/SDC.sdc Line: 32
|
|
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
|
|
Info: Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = OFF
|
|
Info: Analyzing Slow 1200mV 85C Model
|
|
Info (332146): Worst-case setup slack is -4.404
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): -4.404 -388.058 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
|
|
Info (332119): 1.814 0.000 clk_sys
|
|
Info (332119): 30.027 0.000 clock_stm32
|
|
Info (332119): 45.160 0.000 altera_reserved_tck
|
|
Info (332146): Worst-case hold slack is 0.400
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 0.400 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
|
|
Info (332119): 0.401 0.000 clk_sys
|
|
Info (332119): 0.452 0.000 altera_reserved_tck
|
|
Info (332119): 0.485 0.000 clock_stm32
|
|
Info (332146): Worst-case recovery slack is 3.227
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 3.227 0.000 clk_sys
|
|
Info (332119): 96.012 0.000 altera_reserved_tck
|
|
Info (332146): Worst-case removal slack is 1.284
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 1.284 0.000 altera_reserved_tck
|
|
Info (332119): 11.143 0.000 clk_sys
|
|
Info (332146): Worst-case minimum pulse width slack is 1.218
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 1.218 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
|
|
Info (332119): 7.177 0.000 clk_sys
|
|
Info (332119): 19.682 0.000 clock_stm32
|
|
Info (332119): 49.522 0.000 altera_reserved_tck
|
|
Info (332114): Report Metastability: Found 113 synchronizer chains.
|
|
Info (332114): The design MTBF is not calculated because there are no specified synchronizers in the design.
|
|
Info (332114): Number of Synchronizer Chains Found: 113
|
|
Info (332114): Shortest Synchronizer Chain: 2 Registers
|
|
Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 1.000
|
|
Info (332114): Worst Case Available Settling Time: 13.556 ns
|
|
Info (332114):
|
|
Info: Analyzing Slow 1200mV 0C Model
|
|
Info (334003): Started post-fitting delay annotation
|
|
Info (334004): Delay annotation completed successfully
|
|
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
|
|
Info (332146): Worst-case setup slack is -3.496
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): -3.496 -159.849 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
|
|
Info (332119): 2.102 0.000 clk_sys
|
|
Info (332119): 30.878 0.000 clock_stm32
|
|
Info (332119): 45.544 0.000 altera_reserved_tck
|
|
Info (332146): Worst-case hold slack is 0.384
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 0.384 0.000 clk_sys
|
|
Info (332119): 0.385 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
|
|
Info (332119): 0.400 0.000 altera_reserved_tck
|
|
Info (332119): 0.430 0.000 clock_stm32
|
|
Info (332146): Worst-case recovery slack is 3.572
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 3.572 0.000 clk_sys
|
|
Info (332119): 96.290 0.000 altera_reserved_tck
|
|
Info (332146): Worst-case removal slack is 1.188
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 1.188 0.000 altera_reserved_tck
|
|
Info (332119): 10.797 0.000 clk_sys
|
|
Info (332146): Worst-case minimum pulse width slack is 1.218
|
|
Info (332119): Slack End Point TNS Clock
|
|
Info (332119): ========= =================== =====================
|
|
Info (332119): 1.218 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
|
|
Info (332119): 7.200 0.000 clk_sys
|
|
Info (332119): 19.595 0.000 clock_stm32
|
|
Info (332119): 49.402 0.000 altera_reserved_tck
|
|
Info (332114): Report Metastability: Found 113 synchronizer chains.
|
|
Info (332114): The design MTBF is not calculated because there are no specified synchronizers in the design.
|
|
Info (332114): Number of Synchronizer Chains Found: 113
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Info (332114): Shortest Synchronizer Chain: 2 Registers
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Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 1.000
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Info (332114): Worst Case Available Settling Time: 13.638 ns
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Info (332114):
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Info: Analyzing Fast 1200mV 0C Model
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Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties.
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Info (332146): Worst-case setup slack is 1.395
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Info (332119): Slack End Point TNS Clock
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Info (332119): ========= =================== =====================
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Info (332119): 1.395 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
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Info (332119): 4.454 0.000 clk_sys
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Info (332119): 34.929 0.000 clock_stm32
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Info (332119): 48.082 0.000 altera_reserved_tck
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Info (332146): Worst-case hold slack is 0.135
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Info (332119): Slack End Point TNS Clock
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Info (332119): ========= =================== =====================
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Info (332119): 0.135 0.000 clk_sys
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Info (332119): 0.141 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
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Info (332119): 0.186 0.000 altera_reserved_tck
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Info (332119): 0.201 0.000 clock_stm32
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Info (332146): Worst-case recovery slack is 5.163
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Info (332119): Slack End Point TNS Clock
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Info (332119): ========= =================== =====================
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Info (332119): 5.163 0.000 clk_sys
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Info (332119): 98.256 0.000 altera_reserved_tck
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Info (332146): Worst-case removal slack is 0.545
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Info (332119): Slack End Point TNS Clock
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Info (332119): ========= =================== =====================
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Info (332119): 0.545 0.000 altera_reserved_tck
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Info (332119): 9.779 0.000 clk_sys
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Info (332146): Worst-case minimum pulse width slack is 2.841
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Info (332119): Slack End Point TNS Clock
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Info (332119): ========= =================== =====================
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Info (332119): 2.841 0.000 TX_PLL|altpll_component|auto_generated|pll1|clk[0]
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Info (332119): 6.972 0.000 clk_sys
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Info (332119): 19.142 0.000 clock_stm32
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Info (332119): 49.471 0.000 altera_reserved_tck
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Info (332114): Report Metastability: Found 113 synchronizer chains.
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Info (332114): The design MTBF is not calculated because there are no specified synchronizers in the design.
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Info (332114): Number of Synchronizer Chains Found: 113
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Info (332114): Shortest Synchronizer Chain: 2 Registers
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Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 1.000
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Info (332114): Worst Case Available Settling Time: 14.623 ns
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Info (332114):
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Info (332102): Design is not fully constrained for setup requirements
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Info (332102): Design is not fully constrained for hold requirements
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Info (144001): Generated suppressed messages file D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/output_files/WOLF-LITE.sta.smsg
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Info: Quartus Prime Timing Analyzer was successful. 0 errors, 20 warnings
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Info: Peak virtual memory: 4879 megabytes
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Info: Processing ended: Thu Jan 07 18:22:33 2021
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Info: Elapsed time: 00:00:09
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Info: Total CPU time (on all processors): 00:00:11
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+-------------------------------------+
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; Timing Analyzer Suppressed Messages ;
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+-------------------------------------+
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The suppressed messages can be found in D:/Dropbox/Develop/Projects/WOLF-Lite/FPGA/output_files/WOLF-LITE.sta.smsg.
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