kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
11 wiersze
403 B
Verilog
11 wiersze
403 B
Verilog
nco u0 (
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.clk (<connected-to-clk>), // clk.clk
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.clken (<connected-to-clken>), // in.clken
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.phi_inc_i (<connected-to-phi_inc_i>), // .phi_inc_i
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.fsin_o (<connected-to-fsin_o>), // out.fsin_o
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.fcos_o (<connected-to-fcos_o>), // .fcos_o
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.out_valid (<connected-to-out_valid>), // .out_valid
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.reset_n (<connected-to-reset_n>) // rst.reset_n
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);
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