Wolf-LITE/.gitignore

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FPGA/db/*
FPGA/output_files/*
FPGA/greybox_tmp/*
FPGA/incremental_db/*
FPGA_61.440/db/*
FPGA_61.440/output_files/*
FPGA_61.440/greybox_tmp/*
FPGA_61.440/incremental_db/*
STM32/MDK-ARM/WOLF-Lite/*.htm
STM32/MDK-ARM/WOLF-Lite/*.hex
STM32/Debug/*
Status Report.txt
Design Rule Check*
*~*.zip
*.log
*.o
*.lnp
*.bak
*.uvguix.*
*.d
*.smsg
*.rpt
*.crf
*._2i
*.__i
*._ia
*.summary
*.axf
*.map
*.dep
*.jic
*.pof
*.rpt
*.sof
WOLF.uvguix.*