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cic_ii_0

altera_cic_ii v18.1

Parameters design_env NATIVE selected_device_family CYCLONEIVE FILTER_TYPE decimator STAGES 6 D_DELAY 1 VRC_EN 0 RCF_FIX 1340 RCF_LB 8 RCF_UB 21 RCF_MIN 1340 RCF_MAX 1340 INTERFACES 1 CH_PER_INT 1 IN_WIDTH 23 CLK_EN_PORT true ROUND_TYPE TRUNCATE REQ_OUT_WIDTH 32 OUT_WIDTH 32 INT_USE_MEM false INT_MEM auto REQ_INT_MEM logic_element DIF_USE_MEM false DIF_MEM auto REQ_DIF_MEM logic_element REQ_PIPELINE 0 PIPELINING 0 C_STAGE_0_WIDTH 86 I_STAGE_0_WIDTH 86 C_STAGE_1_WIDTH 86 I_STAGE_1_WIDTH 86 C_STAGE_2_WIDTH 86 I_STAGE_2_WIDTH 86 C_STAGE_3_WIDTH 86 I_STAGE_3_WIDTH 86 C_STAGE_4_WIDTH 86 I_STAGE_4_WIDTH 86 C_STAGE_5_WIDTH 86 I_STAGE_5_WIDTH 86 C_STAGE_6_WIDTH 86 I_STAGE_6_WIDTH 86 C_STAGE_7_WIDTH 86 I_STAGE_7_WIDTH 86 C_STAGE_8_WIDTH 86 I_STAGE_8_WIDTH 86 C_STAGE_9_WIDTH 86 I_STAGE_9_WIDTH 86 C_STAGE_10_WIDTH 86 I_STAGE_10_WIDTH 86 C_STAGE_11_WIDTH 86 I_STAGE_11_WIDTH 86 MAX_I_STAGE_WIDTH 86 MAX_C_STAGE_WIDTH 86 hyper_opt_select 0 hyper_opt 0 deviceFamily UNKNOWN generateLegacySim false

  

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