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master
Антон 2022-04-20 23:00:27 +03:00
rodzic 9e8800fa70
commit 81c316963c
25 zmienionych plików z 35734 dodań i 35594 usunięć
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109
STM32/Core/Src/front_unit.c
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@ -48,7 +48,6 @@ static void FRONTPANEL_ENC2SW_hold_handler(uint32_t parameter);
static bool FRONTPanel_MCP3008_1_Enabled = true;
static int32_t ENCODER_slowler = 0;
static int32_t ENCODER2_slowler = 0;
static uint32_t ENCODER_AValDeb = 0;
static uint32_t ENCODER2_AValDeb = 0;
//static uint8_t enc2_func_mode = 0;
@ -79,7 +78,7 @@ static PERIPH_FrontPanel_Button PERIPH_FrontPanel_BottomScroll_Buttons[BOTTOM_SC
{.port = 1, .channel = 6, .name = "ZOOM", .tres_min = 500, .tres_max = 700, .state = false, .prev_state = false, .work_in_menu = true, .clickHandler = FRONTPANEL_BUTTONHANDLER_ZOOM_P, .holdHandler = FRONTPANEL_BUTTONHANDLER_ZOOM_P}, //SB3
{.port = 1, .channel = 6, .name = "NOTCH", .tres_min = 300, .tres_max = 500, .state = false, .prev_state = false, .work_in_menu = false, .clickHandler = FRONTPANEL_BUTTONHANDLER_NOTCH, .holdHandler = FRONTPANEL_BUTTONHANDLER_NOTCH}, //SB4
{.port = 1, .channel = 6, .name = "FAST", .tres_min = 10, .tres_max = 300, .state = false, .prev_state = false, .work_in_menu = false, .clickHandler = FRONTPANEL_BUTTONHANDLER_FAST, .holdHandler = FRONTPANEL_BUTTONHANDLER_FAST}, //SB5
{.port = 1, .channel = 7, .name = "CLAR", .tres_min = 10, .tres_max = 300, .state = false, .prev_state = false, .work_in_menu = false, .clickHandler = FRONTPANEL_BUTTONHANDLER_CLAR, .holdHandler = FRONTPANEL_BUTTONHANDLER_CLAR}, //SB3
{.port = 1, .channel = 7, .name = "SHIFT", .tres_min = 10, .tres_max = 300, .state = false, .prev_state = false, .work_in_menu = false, .clickHandler = FRONTPANEL_BUTTONHANDLER_CLAR, .holdHandler = FRONTPANEL_BUTTONHANDLER_SHIFT}, //SB3
},
{
{.port = 1, .channel = 5, .name = "VOLUME", .tres_min = 500, .tres_max = 700, .state = false, .prev_state = false, .work_in_menu = true, .clickHandler = FRONTPANEL_BUTTONHANDLER_VOLUME, .holdHandler = FRONTPANEL_BUTTONHANDLER_VOLUME}, //SB2
@ -240,75 +239,22 @@ void FRONTPANEL_ENCODER2_checkRotate(void)
{
uint8_t ENCODER2_DTVal = HAL_GPIO_ReadPin(ENC2_DT_GPIO_Port, ENC2_DT_Pin);
uint8_t ENCODER2_CLKVal = HAL_GPIO_ReadPin(ENC2_CLK_GPIO_Port, ENC2_CLK_Pin);
static uint32_t ENCstartMeasureTime = 0;
static int16_t ENCticksInInterval = 0;
static float32_t ENCAcceleration = 0;
static uint8_t ENClastClkVal = 0;
static bool ENCfirst = true;
if (ENCfirst)
{
ENClastClkVal = ENCODER2_CLKVal;
ENCfirst = false;
}
if (ENClastClkVal != ENCODER2_CLKVal)
{
if ((HAL_GetTick() - ENCODER2_AValDeb) < CALIBRATE.ENCODER2_DEBOUNCE)
return;
if (!CALIBRATE.ENCODER_ON_FALLING || ENCODER2_CLKVal == 0)
{
if (ENCODER2_DTVal != ENCODER2_CLKVal)
{ // If pin A changed first - clockwise rotation
ENCODER2_slowler--;
if (ENCODER2_slowler <= -CALIBRATE.ENCODER2_SLOW_RATE)
{
//acceleration
ENCticksInInterval++;
if((HAL_GetTick() - ENCstartMeasureTime) > ENCODER_ACCELERATION)
{
ENCstartMeasureTime = HAL_GetTick();
ENCAcceleration = (10.0f + ENCticksInInterval - 1.0f) / 10.0f;
ENCticksInInterval = 0;
}
//do rotate
FRONTPANEL_ENCODER2_Rotated(CALIBRATE.ENCODER2_INVERT ? ENCAcceleration : -ENCAcceleration);
ENCODER2_slowler = 0;
}
}
else
{ // otherwise B changed its state first - counterclockwise rotation
ENCODER2_slowler++;
if (ENCODER2_slowler >= CALIBRATE.ENCODER2_SLOW_RATE)
{
//acceleration
ENCticksInInterval++;
if((HAL_GetTick() - ENCstartMeasureTime) > ENCODER_ACCELERATION)
{
ENCstartMeasureTime = HAL_GetTick();
ENCAcceleration = (10.0f + ENCticksInInterval - 1.0f) / 10.0f;
ENCticksInInterval = 0;
}
//do rotate
FRONTPANEL_ENCODER2_Rotated(CALIBRATE.ENCODER2_INVERT ? -ENCAcceleration : ENCAcceleration);
ENCODER2_slowler = 0;
}
}
// if (ENCODER2_DTVal != ENCODER2_CLKVal)
// { // If pin A changed first - clockwise rotation
// FRONTPANEL_ENCODER2_Rotated(CALIBRATE.ENCODER2_INVERT ? 1 : -1);
// }
// else
// { // otherwise B changed its state first - counterclockwise rotation
// FRONTPANEL_ENCODER2_Rotated(CALIBRATE.ENCODER2_INVERT ? -1 : 1);
// }
{ // If pin A changed first - clockwise rotation
FRONTPANEL_ENCODER2_Rotated(CALIBRATE.ENCODER2_INVERT ? 1 : -1);
}
else
{ // otherwise B changed its state first - counterclockwise rotation
FRONTPANEL_ENCODER2_Rotated(CALIBRATE.ENCODER2_INVERT ? -1 : 1);
}
}
ENCODER2_AValDeb = HAL_GetTick();
ENClastClkVal = ENCODER2_CLKVal;
}
}
static void FRONTPANEL_ENCODER_Rotated(float32_t direction) // rotated encoder, handler here, direction -1 - left, 1 - right
@ -348,7 +294,12 @@ static void FRONTPANEL_ENCODER2_Rotated(int8_t direction) // rotated encoder, ha
{
//if (TRX.Locked)
//return;
if (TRX.ShiftEnabled) {
TRX_SHIFT += direction * 10;
if (TRX_SHIFT > TRX.SHIFT_INTERVAL) TRX_SHIFT = TRX.SHIFT_INTERVAL;
if (TRX_SHIFT < -TRX.SHIFT_INTERVAL) TRX_SHIFT = -TRX.SHIFT_INTERVAL;
return;
}
if (LCD_systemMenuOpened)
{
eventSecRotateSystemMenu(direction);
@ -382,38 +333,41 @@ static void FRONTPANEL_ENCODER2_Rotated(int8_t direction) // rotated encoder, ha
}
//##################################################################################
if (TRX.TX_func_mode == 2) //fast step mode
{
{
VFO *vfo = CurrentVFO();
uint32_t newfreq = 0;
float64_t freq_round = 0;
float64_t step = 0;
if (TRX.Fast)
{
step = (float32_t)TRX.FRQ_ENC_FAST_STEP; // Fast
step = (float32_t)TRX.FRQ_FAST_STEP * 2; // Fast
freq_round = roundf((float64_t)vfo->Freq / step) * step;
newfreq = (uint32_t)((int32_t)freq_round + (int32_t)step * direction);
<<<<<<< HEAD
=======
// step = (float32_t)TRX.FRQ_FAST_STEP * 2; // Fast
// freq_round = roundf((float64_t)vfo->Freq / step) * step;
// newfreq = (uint32_t)((int32_t)freq_round + (int32_t)step * direction);
// newfreq = (uint32_t)((int32_t)vfo->Freq + (int32_t)((float32_t)TRX.FRQ_FAST_STEP * direction));
// if ((vfo->Freq % TRX.FRQ_FAST_STEP) > 0 && fabsf(direction) <= 1.0f)
// newfreq = vfo->Freq / TRX.FRQ_FAST_STEP * TRX.FRQ_FAST_STEP;
>>>>>>> parent of 4b5c023 (Encoder2)
}
else
{
step = (float32_t)TRX.FRQ_ENC_STEP; // Regular
step = (float32_t)TRX.FRQ_STEP * 2; // Regular
freq_round = roundf((float64_t)vfo->Freq / step) * step;
newfreq = (uint32_t)((int32_t)freq_round + (int32_t)step * direction);
<<<<<<< HEAD
=======
// step = (float32_t)TRX.FRQ_STEP * 2; // Regular
// freq_round = roundf((float64_t)vfo->Freq / step) * step;
// newfreq = (uint32_t)((int32_t)freq_round + (int32_t)step * direction);
// newfreq = (uint32_t)((int32_t)vfo->Freq + (int32_t)((float32_t)TRX.FRQ_STEP * direction));
// if ((vfo->Freq % TRX.FRQ_STEP) > 0 && fabsf(direction) <= 1.0f)
// newfreq = vfo->Freq / TRX.FRQ_STEP * TRX.FRQ_STEP;
>>>>>>> parent of 4b5c023 (Encoder2)
}
TRX_setFrequency(newfreq, vfo);
LCD_UpdateQuery.FreqInfo = true;
}
//##################################################################################
}
}
@ -1016,7 +970,10 @@ void FRONTPANEL_BUTTONHANDLER_NOTCH_MANUAL(void)
static void FRONTPANEL_BUTTONHANDLER_SHIFT(void)
{
TRX.ShiftEnabled = !TRX.ShiftEnabled;
TRX.CLAR = false;
TRX_SHIFT = 0;
LCD_UpdateQuery.TopButtons = true;
LCD_UpdateQuery.StatusInfoGUI = true;
NeedSaveSettings = true;
}

4
STM32/Core/Src/lcd.c
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@ -647,9 +647,9 @@ static void LCD_displayStatusInfoBar(bool redraw)
LCDDriver_printTextFont("S", LAY_STATUS_VAL_X_OFFSET, LAY_STATUS_VAL_Y_OFFSET, COLOR->STATUS_RX, BG_COLOR, LAY_STATUS_TXRX_FONT);
}
LCDDriver_Fill_RectWH(35, 158, 40, 11, COLOR_BLACK);//Ïîäëîæêà ïîä òåêñòîì RIT COLOR_BLACK
LCDDriver_Fill_RectWH(10, 158, 75, 12, COLOR_BLACK);//Ïîäëîæêà ïîä òåêñòîì RIT COLOR_BLACK
//RIT
if (TRX.CLAR)
if (TRX.CLAR)
sprintf(buff, "RIT:CLAR");
else if (TRX.ShiftEnabled)
sprintf(buff, "SHIFT:%d", TRX_SHIFT);

1
STM32/Core/Src/main.c
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@ -190,6 +190,7 @@ int main(void)
LoadSettings(true); //soft reset
else
LoadSettings(false);
TRX.ShiftEnabled = false;
sendToDebug_strln("[OK] LCD init");
LCD_busy = true;
LCD_Init();

12
STM32/Core/Src/screen_layout.h
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@ -115,18 +115,18 @@
#define LAY_STATUS_LABEL_BW_Y_OFFSET -68
#define LAY_STATUS_LABEL_RIT_X_OFFSET 5
#define LAY_STATUS_LABEL_RIT_Y_OFFSET 44
#define LAY_STATUS_LABEL_VLT_X_OFFSET 145
#define LAY_STATUS_LABEL_VLT_Y_OFFSET 44
#define LAY_STATUS_LABEL_IN_X_OFFSET 90
#define LAY_STATUS_LABEL_IN_X_OFFSET 95
#define LAY_STATUS_LABEL_IN_Y_OFFSET 44
#define LAY_STATUS_LABEL_PWM_X_OFFSET 5
#define LAY_STATUS_LABEL_PWM_Y_OFFSET 44
#define LAY_STATUS_LABEL_CPU_X_OFFSET 220
#define LAY_STATUS_LABEL_VLT_X_OFFSET 150
#define LAY_STATUS_LABEL_VLT_Y_OFFSET 44
#define LAY_STATUS_LABEL_CPU_X_OFFSET 225
#define LAY_STATUS_LABEL_CPU_Y_OFFSET 44
#define LAY_STATUS_LABEL_NOTCH_X_OFFSET 310
#define LAY_STATUS_LABEL_NOTCH_Y_OFFSET 44
#define LAY_STATUS_LABEL_FFT_BW_X_OFFSET 400
#define LAY_STATUS_LABEL_FFT_BW_Y_OFFSET 44
#define LAY_STATUS_LABEL_PWM_X_OFFSET 5
#define LAY_STATUS_LABEL_PWM_Y_OFFSET 44
#define LAY_STATUS_SMETER_PEAK_HOLDTIME 1000
#define LAY_STATUS_SMETER_TXLABELS_MARGIN 55
#define LAY_STATUS_SMETER_TXLABELS_PADDING 23

5
STM32/Core/Src/settings.c
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@ -205,8 +205,6 @@ void LoadSettings(bool clear)
TRX.DNR_MINIMAL = 99; // DNR averaging when searching for minimum magnitude
TRX.FRQ_STEP = 10; // frequency tuning step by the main encoder
TRX.FRQ_FAST_STEP = 100; // frequency tuning step by the main encoder in FAST mode
TRX.FRQ_ENC_STEP = 2500; // frequency tuning step by main add. encoder
TRX.FRQ_ENC_FAST_STEP = 5000; // frequency tuning step by main add. encoder in FAST mode
TRX.AGC_GAIN_TARGET = -25; // Maximum (target) AGC gain
TRX.TX_Compressor_speed_SSB = 3; // TX ñêîðîñòü êîìïðåññîðà SSB
TRX.TX_Compressor_maxgain_SSB = 10; // TX ìàêñèìàëüíîå óñèëåíèå SSB
@ -278,9 +276,8 @@ void LoadCalibration(bool clear)
CALIBRATE.ENCODER_INVERT = false; // invert left-right rotation of the main encoder
CALIBRATE.ENCODER2_INVERT = false; // invert left-right rotation of the optional encoder
CALIBRATE.ENCODER_DEBOUNCE = 0; // time to eliminate contact bounce at the main encoder, ms
CALIBRATE.ENCODER2_DEBOUNCE = 30; // time to eliminate contact bounce at the additional encoder, ms
CALIBRATE.ENCODER2_DEBOUNCE = 50; // time to eliminate contact bounce at the additional encoder, ms
CALIBRATE.ENCODER_SLOW_RATE = 25; // slow down the encoder for high resolutions
CALIBRATE.ENCODER2_SLOW_RATE = 2; // slow down the encoder for high resolutions
CALIBRATE.ENCODER_ON_FALLING = false; // encoder only triggers when level A falls
CALIBRATE.CICFIR_GAINER_val = 35; // Offset from the output of the CIC compensator
CALIBRATE.TXCICFIR_GAINER_val = 27; // Offset from the TX-CIC output of the compensator

12
STM32/Core/Src/settings.h
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@ -9,6 +9,7 @@
#define SETT_VERSION 101 // Settings config version
#define CALIB_VERSION 101 // Calibration config version
<<<<<<< HEAD
#ifdef FRONT_R7KBI_61_440
#define ADC_CLOCK 61440000 // ADC generator frequency êàëèáðîâêà ÷àñòîòû ãåíåðàòîðà
@ -31,10 +32,12 @@
#define BUTTONS_R7KBI false //Author board buttons
#endif
=======
>>>>>>> parent of 4b5c023 (Encoder2)
//#define ADC_CLOCK 64320000 // ADC generator frequency eaeea?iaea ?anoiou aaia?aoi?a
//#define DAC_CLOCK 160800000 // DAC generator frequency
//#define ADC_CLOCK 61440000 // ADC generator frequency êàëèáðîâêà ÷àñòîòû ãåíåðàòîðà
//#define DAC_CLOCK 153600000 // DAC generator frequency
#define ADC_CLOCK 61440000 // ADC generator frequency êàëèáðîâêà ÷àñòîòû ãåíåðàòîðà
#define DAC_CLOCK 153600000 // DAC generator frequency
#define MAX_RX_FREQ_HZ 750000000 // Maximum receive frequency (from the ADC datasheet)
#define MAX_TX_FREQ_HZ (DAC_CLOCK / 2) // Maximum transmission frequency
#define TRX_SAMPLERATE 48000 // audio stream sampling rate during processing
@ -56,7 +59,7 @@
#define ENCODER_MIN_RATE_ACCELERATION 1.2f //encoder enable rounding if lower than value
#define TRX_MAX_SWR 5 //maximum SWR to enable protect (NOT IN TUNE MODE!)
//#define BUTTONS_R7KBI true //Author board buttons
#define BUTTONS_R7KBI true //Author board buttons
// select LCD, comment on others
//#define LCD_ILI9481 true
@ -145,8 +148,6 @@ extern struct TRX_SETTINGS
bool TWO_SIGNAL_TUNE;
uint16_t FRQ_STEP;
uint16_t FRQ_FAST_STEP;
uint16_t FRQ_ENC_STEP;
uint16_t FRQ_ENC_FAST_STEP;
bool Debug_Console;
bool BandMapEnabled;
bool InputType_MIC;
@ -234,7 +235,6 @@ extern struct TRX_CALIBRATE
uint8_t ENCODER_DEBOUNCE;
uint8_t ENCODER2_DEBOUNCE;
uint8_t ENCODER_SLOW_RATE;
uint8_t ENCODER2_SLOW_RATE;
bool ENCODER_ON_FALLING;
uint8_t CICFIR_GAINER_val;
uint8_t TXCICFIR_GAINER_val;

65
STM32/Core/Src/system_menu.c
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@ -98,7 +98,6 @@ static void SYSMENU_HANDL_SETTIME(int8_t direction);
static void SYSMENU_HANDL_Bootloader(int8_t direction);
static void SYSMENU_HANDL_CALIB_ENCODER_SLOW_RATE(int8_t direction);
static void SYSMENU_HANDL_CALIB_ENCODER2_SLOW_RATE(int8_t direction);
static void SYSMENU_HANDL_CALIB_ENCODER_INVERT(int8_t direction);
static void SYSMENU_HANDL_CALIB_ENCODER2_INVERT(int8_t direction);
static void SYSMENU_HANDL_CALIB_ENCODER_DEBOUNCE(int8_t direction);
@ -161,8 +160,6 @@ static const struct sysmenu_item_handler sysmenu_trx_handlers[] =
{"Shift Interval", SYSMENU_UINT16, (uint32_t *)&TRX.SHIFT_INTERVAL, SYSMENU_HANDL_TRX_SHIFT_INTERVAL},
{"Freq Step", SYSMENU_UINT16, (uint32_t *)&TRX.FRQ_STEP, SYSMENU_HANDL_TRX_FRQ_STEP},
{"Freq Step FAST", SYSMENU_UINT16, (uint32_t *)&TRX.FRQ_FAST_STEP, SYSMENU_HANDL_TRX_FRQ_FAST_STEP},
{"Freq Step ENC2", SYSMENU_UINT16, (uint32_t *)&TRX.FRQ_ENC_STEP, SYSMENU_HANDL_TRX_FRQ_ENC_STEP},
{"Freq Step FAST ENC2", SYSMENU_UINT16, (uint32_t *)&TRX.FRQ_ENC_FAST_STEP, SYSMENU_HANDL_TRX_FRQ_ENC_FAST_STEP},
{"Encoder Accelerate", SYSMENU_BOOLEAN, (uint32_t *)&TRX.Encoder_Accelerate, SYSMENU_HANDL_TRX_ENC_ACCELERATE},
{"Encoder TX/OFF", SYSMENU_BOOLEAN, (uint32_t *)&TRX.Encoder_OFF, SYSMENU_HANDL_TXOFF_ENC},
{"Att step, dB", SYSMENU_UINT8, (uint32_t *)&TRX.ATT_STEP, SYSMENU_HANDL_TRX_ATT_STEP},
@ -255,7 +252,6 @@ static const struct sysmenu_item_handler sysmenu_calibration_handlers[] =
{"Encoder debounce", SYSMENU_UINT8, (uint32_t *)&CALIBRATE.ENCODER_DEBOUNCE, SYSMENU_HANDL_CALIB_ENCODER_DEBOUNCE},
{"Encoder2 debounce", SYSMENU_UINT8, (uint32_t *)&CALIBRATE.ENCODER2_DEBOUNCE, SYSMENU_HANDL_CALIB_ENCODER2_DEBOUNCE},
{"Encoder slow rate", SYSMENU_UINT8, (uint32_t *)&CALIBRATE.ENCODER_SLOW_RATE, SYSMENU_HANDL_CALIB_ENCODER_SLOW_RATE},
{"Encoder2 slow rate", SYSMENU_UINT8, (uint32_t *)&CALIBRATE.ENCODER2_SLOW_RATE, SYSMENU_HANDL_CALIB_ENCODER2_SLOW_RATE},
{"Encoder on falling", SYSMENU_BOOLEAN, (uint32_t *)&CALIBRATE.ENCODER_ON_FALLING, SYSMENU_HANDL_CALIB_ENCODER_ON_FALLING},
{"CICCOMP Shift", SYSMENU_UINT8, (uint32_t *)&CALIBRATE.CICFIR_GAINER_val, SYSMENU_HANDL_CALIB_CICCOMP_SHIFT},
{"TX CICCOMP Shift", SYSMENU_UINT8, (uint32_t *)&CALIBRATE.TXCICFIR_GAINER_val, SYSMENU_HANDL_CALIB_TXCICCOMP_SHIFT},
@ -500,58 +496,6 @@ static void SYSMENU_HANDL_TRX_FRQ_FAST_STEP(int8_t direction)
TRX.FRQ_FAST_STEP = freq_steps[0];
}
static void SYSMENU_HANDL_TRX_FRQ_ENC_STEP(int8_t direction)
{
const uint16_t freq_steps[] = {1, 10, 25, 50, 100, 500, 1000, 5000};
for (uint8_t i = 0; i < ARRLENTH(freq_steps); i++)
if (TRX.FRQ_ENC_STEP == freq_steps[i])
{
if (direction < 0)
{
if (i > 0)
TRX.FRQ_ENC_STEP = freq_steps[i - 1];
else
TRX.FRQ_ENC_STEP = freq_steps[0];
return;
}
else
{
if (i < (ARRLENTH(freq_steps) - 1))
TRX.FRQ_ENC_STEP = freq_steps[i + 1];
else
TRX.FRQ_ENC_STEP = freq_steps[ARRLENTH(freq_steps) - 1];
return;
}
}
TRX.FRQ_ENC_STEP = freq_steps[0];
}
static void SYSMENU_HANDL_TRX_FRQ_ENC_FAST_STEP(int8_t direction)
{
const uint16_t freq_steps[] = {1, 10, 25, 50, 100, 500, 1000, 5000};
for (uint8_t i = 0; i < ARRLENTH(freq_steps); i++)
if (TRX.FRQ_ENC_FAST_STEP == freq_steps[i])
{
if (direction < 0)
{
if (i > 0)
TRX.FRQ_ENC_FAST_STEP = freq_steps[i - 1];
else
TRX.FRQ_ENC_FAST_STEP = freq_steps[0];
return;
}
else
{
if (i < (ARRLENTH(freq_steps) - 1))
TRX.FRQ_ENC_FAST_STEP = freq_steps[i + 1];
else
TRX.FRQ_ENC_FAST_STEP = freq_steps[ARRLENTH(freq_steps) - 1];
return;
}
}
TRX.FRQ_ENC_FAST_STEP = freq_steps[0];
}
static void SYSMENU_HANDL_TRX_ENC_ACCELERATE(int8_t direction)
{
if (direction > 0)
@ -1829,15 +1773,6 @@ static void SYSMENU_HANDL_CALIB_ENCODER_SLOW_RATE(int8_t direction)
CALIBRATE.ENCODER_SLOW_RATE = 100;
}
static void SYSMENU_HANDL_CALIB_ENCODER2_SLOW_RATE(int8_t direction)
{
CALIBRATE.ENCODER2_SLOW_RATE += direction;
if (CALIBRATE.ENCODER2_SLOW_RATE < 1)
CALIBRATE.ENCODER2_SLOW_RATE = 1;
if (CALIBRATE.ENCODER2_SLOW_RATE > 100)
CALIBRATE.ENCODER2_SLOW_RATE = 100;
}
static void SYSMENU_HANDL_CALIB_ENCODER_ON_FALLING(int8_t direction)
{
if (direction > 0)

46
STM32/Core/Src/trx_manager.c
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@ -173,51 +173,7 @@ void TRX_setFrequency(uint32_t _freq, VFO *vfo)
VFO *secondary_vfo = SecondaryVFO();
TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT);
TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq);
// switch (band)
// {
// case 1:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_160);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_160);
// break;
// case 2:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_80);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_80);
// break;
// case 4:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_40);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_40);
// break;
// case 5:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_30);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_30);
// break;
// case 6:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_20);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_20);
// break;
// case 7:
// case 8:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_15);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_15);
// break;
// case 9:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_12);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_12);
// break;
// case 10:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_sibi);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_sibi);
// break;
// case 11:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_10);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_10);
// break;
// case 12:
// TRX_freq_phrase = getRXPhraseFromFrequency((int32_t)current_vfo->Freq + TRX_SHIFT + CALIBRATE.freq_correctur_52);
// TRX_freq_phrase_tx = getTXPhraseFromFrequency((int32_t)current_vfo->Freq + CALIBRATE.freq_correctur_52);
// break;
// }
if (!TRX_on_TX())
{
switch (current_vfo->Mode)

48
STM32/MDK-ARM/DebugConfig/WOLF-Lite_ALEX_61.440_STM32F407VETx.dbgconf
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@ -1,48 +0,0 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

48
STM32/MDK-ARM/DebugConfig/WOLF-Lite_ALEX_64.320_STM32F407VETx.dbgconf
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@ -1,48 +0,0 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

48
STM32/MDK-ARM/DebugConfig/WOLF-Lite_R7KBI_61.440_STM32F407VETx.dbgconf
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@ -1,48 +0,0 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

48
STM32/MDK-ARM/DebugConfig/WOLF-Lite_R7KBI_64.320_STM32F407VETx.dbgconf
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@ -1,48 +0,0 @@
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
// Version: 1.0.0
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
// refer to STM32F40x STM32F41x datasheets
// refer to STM32F42x STM32F43x datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

70024
STM32/MDK-ARM/JLinkLog.txt
Wyświetl plik

Plik diff jest za duży Load Diff

42
STM32/MDK-ARM/RTE/_WOLF-Lite/RTE_Components.h
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@ -1,21 +1,21 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

21
STM32/MDK-ARM/RTE/_WOLF-Lite_ALEX_61.440/RTE_Components.h
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@ -1,21 +0,0 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite_ALEX_61.440'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

42
STM32/MDK-ARM/RTE/_WOLF-Lite_ALEX_64.320/RTE_Components.h
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@ -1,21 +1,21 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite_ALEX_64.320'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite_ALEX_64.320'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

42
STM32/MDK-ARM/RTE/_WOLF-Lite_R7KBI_61.440/RTE_Components.h
Wyświetl plik

@ -1,21 +1,21 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite_R7KBI_61.440'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite_R7KBI_61.440'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

21
STM32/MDK-ARM/RTE/_WOLF-Lite_R7KBI_64.320/RTE_Components.h
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@ -1,21 +0,0 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'WOLF-Lite'
* Target: 'WOLF-Lite_R7KBI_64.320'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f4xx.h"
#endif /* RTE_COMPONENTS_H */

656
STM32/MDK-ARM/WOLF-Lite.uvoptx
Wyświetl plik

Plik diff jest za duży Load Diff

34
STM32/MDK-ARM/WOLF-Lite.uvprojx
Wyświetl plik

@ -7,16 +7,16 @@
<Targets>
<Target>
<TargetName>WOLF-Lite_R7KBI_61.440</TargetName>
<TargetName>WOLF-Lite</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6150000::V6.15::ARMCLANG</pCCUsed>
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F407VETx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.15.0</PackID>
<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -49,7 +49,7 @@
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>WOLF-Lite\</OutputDirectory>
<OutputName>WOLF-Lite_R7KBI_61_440</OutputName>
<OutputName>WOLF-Lite</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
@ -80,9 +80,9 @@
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>$K\ARM\ARMCC\bin\fromelf.exe --bin --output=@L.bin !L</UserProg1Name>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@ -337,6 +337,7 @@
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<<<<<<< HEAD
<Define>FRONT_R7KBI_61_440,USE_HAL_DRIVER,STM32F407xx,ARM_MATH_MATRIX_CHECK,ARM_MATH_ROUNDING,ARM_MATH_LOOPUNROLL</Define>
<Undefine></Undefine>
<IncludePath>../Core/Inc; ../Drivers/STM32F4xx_HAL_Driver/Inc; ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy; ../Drivers/CMSIS/Device/ST/STM32F4xx/Include; ../Drivers/CMSIS/Include; ..\Core\USBDevice; ..\Core\Src; ..\Core\Src</IncludePath>
@ -991,7 +992,7 @@
<TargetCommonOption>
<Device>STM32F407VETx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.15.0</PackID>
<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -2035,7 +2036,7 @@
<TargetCommonOption>
<Device>STM32F407VETx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.15.0</PackID>
<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -3073,13 +3074,13 @@
<TargetName>WOLF-Lite_ALEX_64.320</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>6150000::V6.15::ARMCLANG</pCCUsed>
<pCCUsed>6160000::V6.16::ARMCLANG</pCCUsed>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F407VETx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.15.0</PackID>
<PackID>Keil.STM32F4xx_DFP.2.16.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@ -3401,6 +3402,9 @@
<VariousControls>
<MiscControls></MiscControls>
<Define>FRONT_ALEX_64_320,USE_HAL_DRIVER,STM32F407xx,ARM_MATH_MATRIX_CHECK,ARM_MATH_ROUNDING,ARM_MATH_LOOPUNROLL</Define>
=======
<Define>USE_HAL_DRIVER,STM32F407xx,ARM_MATH_MATRIX_CHECK,ARM_MATH_ROUNDING,ARM_MATH_LOOPUNROLL</Define>
>>>>>>> parent of 4b5c023 (Encoder2)
<Undefine></Undefine>
<IncludePath>../Core/Inc; ../Drivers/STM32F4xx_HAL_Driver/Inc; ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy; ../Drivers/CMSIS/Device/ST/STM32F4xx/Include; ../Drivers/CMSIS/Include; ..\Core\USBDevice; ..\Core\Src; ..\Core\Src</IncludePath>
</VariousControls>
@ -4052,19 +4056,13 @@
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
<targetInfos>
<targetInfo name="WOLF-Lite_ALEX_61.440"/>
<targetInfo name="WOLF-Lite_ALEX_64.320"/>
<targetInfo name="WOLF-Lite_R7KBI_61.440"/>
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STM32/MDK-ARM/WOLF-Lite/filteringfunctions-e003b209.o.tmp 100644
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STM32/MDK-ARM/WOLF-Lite_ALEX_61_440.bin
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STM32/MDK-ARM/WOLF-Lite_ALEX_64_320.bin
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