kopia lustrzana https://github.com/UU5JPP/Wolf-LITE
6 wiersze
420 B
Plaintext
6 wiersze
420 B
Plaintext
|
DRC Rules Export File for PCB: F:\YandexDisk\<5C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Altium\<5C><><EFBFBD><EFBFBD>-lite\Rev-1.0\<5C><><EFBFBD><EFBFBD><EFBFBD> Wolf-lite V1.0\WL-Lite-FRONT\Wolf-litr-FRONT-V2.2\Wl-FRONT.PcbDoc
|
|||
|
RuleKind=SolderMaskExpansion|RuleName=SolderMaskExpansion|Scope=Board|Minimum=4.00
|
|||
|
RuleKind=Width|RuleName=Width|Scope=Board|Minimum=5.91
|
|||
|
RuleKind=Clearance|RuleName=Clearance|Scope=Board|Minimum=7.87
|
|||
|
RuleKind=ShortCircuit|RuleName=ShortCircuit|Scope=Board|Allowed=0
|