kopia lustrzana https://github.com/SP8EBC/ParaTNC
729 wiersze
17 KiB
C
729 wiersze
17 KiB
C
/*
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* pwr_save.c
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*
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* Created on: Aug 22, 2021
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* Author: mateusz
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*/
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#include "pwr_save.h"
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#include "stm32l4xx.h"
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#include "system_stm32l4xx.h"
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#include <stdint.h>
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#include "pwr_switch.h"
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#include "io.h"
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#include "LedConfig.h"
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#include "packet_tx_handler.h"
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#include "wx_handler.h"
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#include "main.h"
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#include "drivers/analog_anemometer.h"
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#define REGISTER RTC->BKP0R
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#define INHIBIT_PWR_SWITCH_PERIODIC_H 1
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#define IN_STOP2_MODE (1 << 1)
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#define IN_C0_STATE (1 << 2)
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#define IN_C1_STATE (1 << 3)
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#define IN_C2_STATE (1 << 4)
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#define IN_C3_STATE (1 << 5)
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#define IN_M4_STATE (1 << 6)
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#define IN_I5_STATE (1 << 7)
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#define IN_L6_STATE (1 << 8)
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#define IN_L7_STATE (1 << 9)
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#define ALL_STATES_BITMASK (0xFF << 2)
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#if defined(STM32L471xx)
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int8_t pwr_save_seconds_to_wx = 0;
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int16_t pwr_save_sleep_time_in_seconds = -1;
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static void pwr_save_unclock_rtc_backup_regs(void) {
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// enable access to backup domain
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PWR->CR1 |= PWR_CR1_DBP;
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}
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static void pwr_save_lock_rtc_backup_regs(void) {
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PWR->CR1 &= (0xFFFFFFFF ^ PWR_CR1_DBP);
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}
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/**
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* This function initializes everything related to power saving features
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* including programming Flash memory option bytes
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*/
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void pwr_save_init(config_data_powersave_mode_t mode) {
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// make a pointer to option byte
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uint32_t* option_byte = (uint32_t*)0x1FFF7800;
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// content of option byte read from the flash memory
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uint32_t option_byte_content = *option_byte;
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// definition of bitmask
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#define IWDG_STBY_STOP (0x3 << 17)
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// check if IWDG_STDBY and IWDG_STOP is not set in ''User and read protection option bytes''
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// at 0x1FFF7800
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if ((option_byte_content & IWDG_STBY_STOP) == IWDG_STBY_STOP) {
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// unlock write/erase operations on flash memory
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FLASH->KEYR = 0x45670123;
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FLASH->KEYR = 0xCDEF89AB;
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// wait for any possible flash operation to finish (rather impossible here, but ST manual recommend doing this)
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while((FLASH->SR & FLASH_SR_BSY) != 0);
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// unlock operations on option bytes
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FLASH->OPTKEYR = 0x08192A3B;
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FLASH->OPTKEYR = 0x4C5D6E7F;
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// set the flash option register (in RAM!!)
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FLASH->OPTR &= (0xFFFFFFFF ^ (FLASH_OPTR_IWDG_STDBY | FLASH_OPTR_IWDG_STOP));
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// trigger an update of flash option bytes with values from RAM (from FLASH->OPTR)
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FLASH->CR |= FLASH_CR_OPTSTRT;
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// wait for option bytes to be updated
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while((FLASH->SR & FLASH_SR_BSY) != 0);
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// lock flash memory
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FLASH-> CR |= FLASH_CR_LOCK;
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// forcre reloading option bytes
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FLASH->CR |= FLASH_CR_OBL_LAUNCH;
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}
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pwr_save_unclock_rtc_backup_regs();
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// reset a status register
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REGISTER = 0;
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// switch power switch handler inhibition if it is needed
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switch (mode) {
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case PWSAVE_NONE:
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break;
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case PWSAVE_NORMAL:
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case PWSAVE_AGGRESV:
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REGISTER |= INHIBIT_PWR_SWITCH_PERIODIC_H;
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break;
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}
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pwr_save_lock_rtc_backup_regs();
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}
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/**
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* Entering STOP2 power save mode. In this mode all clocks except LSI and LSE are disabled. StaticRAM content
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* is preserved, optionally GPIO and few other peripherals can be kept power up depending on configuration
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*/
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void pwr_save_enter_stop2(void) {
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// clear previous low power mode selection
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PWR->CR1 &= (0xFFFFFFFF ^ PWR_CR1_LPMS_Msk);
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// select STOP2
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PWR->CR1 |= PWR_CR1_LPMS_STOP2;
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// enable write access to RTC registers by writing two magic words
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RTC->WPR = 0xCA;
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RTC->WPR = 0x53;
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pwr_save_unclock_rtc_backup_regs();
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// save an information that STOP2 mode has been applied
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RTC->BKP0R |= IN_STOP2_MODE;
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pwr_save_lock_rtc_backup_regs();
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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DBGMCU->CR &= (0xFFFFFFFF ^ (DBGMCU_CR_DBG_SLEEP_Msk | DBGMCU_CR_DBG_STOP_Msk | DBGMCU_CR_DBG_STANDBY_Msk));
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// disabling all IRQs
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//__disable_irq();
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asm("sev");
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asm("wfi");
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}
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/**
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* This function has to be called within RTC wakepup interrupt.
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*/
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void pwr_save_exit_from_stop2(void) {
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// packet tx timers values
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packet_tx_counter_values_t timers;
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// check power saving mode set before switching uC to SLEEP2
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uint16_t powersave_mode = (uint16_t)(REGISTER & ALL_STATES_BITMASK);
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// check if sleep time is valid
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if (pwr_save_sleep_time_in_seconds <= 0) {
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// if for some reason the value is not valid change is to something meaningful
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pwr_save_sleep_time_in_seconds = 60;
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}
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switch(powersave_mode) {
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case IN_L6_STATE:
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case IN_L7_STATE:
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// get all timers values
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packet_tx_get_current_counters(&timers);
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// rewind all timers in packet tx handler as they were no updated when micro was sleeping
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// sleep shall be always set as wx packet interval minus one minute
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timers.wx_counter += (pwr_save_sleep_time_in_seconds / 60);
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timers.beacon_counter += (pwr_save_sleep_time_in_seconds / 60);
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timers.kiss_counter += (pwr_save_sleep_time_in_seconds / 60);
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timers.telemetry_counter += (pwr_save_sleep_time_in_seconds / 60);
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timers.telemetry_desc_counter += (pwr_save_sleep_time_in_seconds / 60);
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// set counters back
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packet_tx_set_current_counters(&timers);
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break;
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// something is screwed horribly as in all other modes a micro shall not be placed in STOP2 mode
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default:
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break;
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}
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}
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int pwr_save_switch_mode_to_c0(void) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_C0_STATE) {
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return 0;
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}
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// turn ON +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_enable();
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// turn ON +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_enable();
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// turn ON +4V_G
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io_12v_sw___cntrl_vbat_g_enable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= 0xFFFFFFFF ^ ALL_STATES_BITMASK;
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// set for C0 mode
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REGISTER |= IN_C0_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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return 1;
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}
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// in HW-RevB this will disable external VHF radio!!
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int pwr_save_switch_mode_to_c1(void) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_C1_STATE) {
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return 0;
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}
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// turn ON +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_enable();
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// turn ON +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_enable();
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// turn OFF +4V_G
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io_12v_sw___cntrl_vbat_g_disable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C0 mode
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REGISTER |= IN_C1_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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return 1;
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}
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// this mode is not avaliable in HW Revision B as internal radio
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// is powered from +5V_S and external one is switched on with the same
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// line which controls +4V_G
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void pwr_save_switch_mode_to_c2(void) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_C2_STATE) {
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return;
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}
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// turn OFF +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_disable();
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// turn ON +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_enable();
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// turn OFF +4V_G
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io_12v_sw___cntrl_vbat_g_disable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C2 mode
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REGISTER |= IN_C2_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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}
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void pwr_save_switch_mode_to_c3(void) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_C3_STATE) {
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return;
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}
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// turn OFF +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_disable();
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// turn ON +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_enable();
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// turn ON +4V_G
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io_12v_sw___cntrl_vbat_g_enable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C3 mode
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REGISTER |= IN_C3_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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}
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// in HW-RevB this will keep internal VHF radio module working!
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int pwr_save_switch_mode_to_m4(void) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_M4_STATE) {
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return 0;
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}
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// turn ON +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_enable();
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// turn OFF +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_disable();
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// turn OFF +4V_G
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io_12v_sw___cntrl_vbat_g_disable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C3 mode
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REGISTER |= IN_M4_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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return 1;
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}
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void pwr_save_switch_mode_to_i5(void) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_I5_STATE) {
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return;
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}
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// turn OFF +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_disable();
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// turn OFF +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_disable();
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// turn OFF +4V_G
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io_12v_sw___cntrl_vbat_g_disable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C3 mode
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REGISTER |= IN_I5_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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}
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// this will keep external VHF radio working in HW-RevB
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void pwr_save_switch_mode_to_l6(uint16_t sleep_time) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_L6_STATE) {
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return;
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}
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// turn OFF +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_disable();
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// turn OFF +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_disable();
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// turn ON +4V_G
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io_12v_sw___cntrl_vbat_g_enable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C3 mode
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REGISTER |= IN_L6_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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system_clock_configure_auto_wakeup_l4(sleep_time);
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// save how long the micro will sleep - required for handling wakeup event
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pwr_save_sleep_time_in_seconds = sleep_time;
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// turn off leds to save power
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led_control_led1_upper(false);
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led_control_led2_bottom(false);
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pwr_save_enter_stop2();
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}
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void pwr_save_switch_mode_to_l7(uint16_t sleep_time) {
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if ((REGISTER & ALL_STATES_BITMASK) == IN_L7_STATE) {
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return;
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}
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// turn OFF +5V_S (and internal VHF radio module in HW-RevB)
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io_5v_isol_sw___cntrl_vbat_s_disable();
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// turn OFF +5V_R and VBATT_SW_R
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io___cntrl_vbat_r_disable();
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// turn OFF +4V_G
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io_12v_sw___cntrl_vbat_g_disable();
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// unlock access to backup registers
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pwr_save_unclock_rtc_backup_regs();
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// clear all previous powersave indication bits
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REGISTER &= (0xFFFFFFFF ^ ALL_STATES_BITMASK);
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// set for C3 mode
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REGISTER |= IN_L7_STATE;
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// lock access to backup
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pwr_save_lock_rtc_backup_regs();
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// configure how long micro should sleep
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system_clock_configure_auto_wakeup_l4(sleep_time);
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// save how long the micro will sleep - required for handling wakeup event
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pwr_save_sleep_time_in_seconds = sleep_time;
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// turn off leds to save power
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led_control_led1_upper(false);
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led_control_led2_bottom(false);
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pwr_save_enter_stop2();
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}
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void pwr_save_pooling_handler(const config_data_mode_t * config, const config_data_basic_t * timers, int16_t minutes_to_wx) {
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// this function should be called from 10 seconds pooler
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int reinit_sensors = 0;
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packet_tx_counter_values_t counters;
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// get current counter values
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packet_tx_get_current_counters(&counters);
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// decrement seconds in last minute
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if (pwr_save_seconds_to_wx != -1) {
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pwr_save_seconds_to_wx -= 10;
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}
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// if there is more than one minute to next frame
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if (minutes_to_wx > 1) {
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// reset counter as we dont
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pwr_save_seconds_to_wx = -1;
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}
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else if (minutes_to_wx == 1 && pwr_save_seconds_to_wx == -1) {
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// if this is the last second to wx frame
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pwr_save_seconds_to_wx = 60;
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}
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// handle depends on current powersave configuration
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switch (config->powersave) {
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/**
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* PWSAVE_NONE = 0,
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PWSAVE_NORMAL = 1,
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PWSAVE_AGGRESV = 3
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*/
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case PWSAVE_NONE : {
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// if weather station is enabled
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if (config->wx == 1) {
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// if GSM modem is enabled in configuration
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if (config->gsm == 1) {
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// if digipeater is enabled
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if (config->digi == 1) { // DIGI + WX + GSM
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reinit_sensors = pwr_save_switch_mode_to_c0();
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}
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else { // WX + GSM
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reinit_sensors = pwr_save_switch_mode_to_c0();
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}
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}
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else {
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// if digipeater is enabled
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if (config->digi == 1) { // DIGI + WX
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reinit_sensors = pwr_save_switch_mode_to_c1();
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}
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else { // WX
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if (minutes_to_wx > 1) {
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// if there is more than one minute to send wx packet
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pwr_save_switch_mode_to_c2();
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}
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else {
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if (pwr_save_seconds_to_wx <= 30) {
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reinit_sensors = pwr_save_switch_mode_to_c1();
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}
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}
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}
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}
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}
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else { // DIGI
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// if weather station is not enabled just stay in C2 mode
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|
// as this is default state for DIGI operation. Of course
|
|
// DIGI might not be enabled (which has no sense) but for
|
|
// sake of simplicity just agree that it is.
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
case PWSAVE_NORMAL : {
|
|
|
|
// if weather station is enabled
|
|
if (config->wx == 1) {
|
|
|
|
// if GSM modem is enabled in configuration
|
|
if (config->gsm == 1) {
|
|
|
|
// if digipeater is enabled
|
|
if (config->digi == 1) { // DIGI + WX + GSM
|
|
// if weather packets are send 5 minutes or less often
|
|
if (timers->wx_transmit_period >= 5) {
|
|
if (minutes_to_wx > 1) {
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c0();
|
|
}
|
|
}
|
|
else {
|
|
if (minutes_to_wx > 1) {
|
|
pwr_save_switch_mode_to_c3();
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c0();
|
|
}
|
|
}
|
|
}
|
|
else { // WX + GSM
|
|
if (minutes_to_wx > 1) {
|
|
reinit_sensors = pwr_save_switch_mode_to_m4();
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c0();
|
|
}
|
|
}
|
|
}
|
|
else {
|
|
// if digipeater is enabled
|
|
if (config->digi == 1) { // DIGI + WX
|
|
if (minutes_to_wx > 1) {
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c1();
|
|
}
|
|
}
|
|
else { // WX
|
|
if (minutes_to_wx > 1) {
|
|
// if there is more than one minute to send wx packet
|
|
reinit_sensors = pwr_save_switch_mode_to_m4();
|
|
}
|
|
else {
|
|
if (pwr_save_seconds_to_wx <= 30) {
|
|
reinit_sensors = pwr_save_switch_mode_to_c1();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else { // DIGI
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
|
|
|
|
break;
|
|
}
|
|
|
|
case PWSAVE_AGGRESV : {
|
|
|
|
// if weather station is enabled
|
|
if (config->wx == 1) {
|
|
|
|
// if GSM modem is enabled in configuration
|
|
if (config->gsm == 1) {
|
|
|
|
// if digipeater is enabled
|
|
if (config->digi == 1) { // DIGI + WX + GSM
|
|
if (minutes_to_wx > 1) {
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c0();
|
|
}
|
|
|
|
}
|
|
else { // WX + GSM (only)
|
|
if (timers->wx_transmit_period >= 5) {
|
|
// if stations is configured to send wx packet less often than every 5 minutes
|
|
|
|
if (minutes_to_wx > 1) {
|
|
// if there is more than one minute to wx packet
|
|
pwr_save_switch_mode_to_l7((timers->wx_transmit_period * 60) - 60); // TODO: !!!
|
|
}
|
|
else {
|
|
if (pwr_save_seconds_to_wx <= 30) {
|
|
// if there is 30 seconds or less to next wx packet
|
|
reinit_sensors = pwr_save_switch_mode_to_c0();
|
|
}
|
|
else {
|
|
// if there is 30 to 60 seconds to next wx packet
|
|
reinit_sensors = pwr_save_switch_mode_to_m4();
|
|
}
|
|
}
|
|
}
|
|
else {
|
|
// if station is configured to sent wx packet in every 5 minutes or more often
|
|
|
|
if (minutes_to_wx > 1) {
|
|
pwr_save_switch_mode_to_l6((timers->wx_transmit_period * 60) - 60); // TODO: !!!
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c0();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else { // gsm is not enabled
|
|
// if digipeater is enabled
|
|
if (config->digi == 1) { // DIGI + WX
|
|
if (minutes_to_wx > 1) {
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
else {
|
|
reinit_sensors = pwr_save_switch_mode_to_c1();
|
|
}
|
|
}
|
|
else { // WX
|
|
if (minutes_to_wx > 1) {
|
|
// if there is more than one minute to send wx packet
|
|
pwr_save_switch_mode_to_l7((timers->wx_transmit_period * 60) - 60);
|
|
}
|
|
else {
|
|
if (pwr_save_seconds_to_wx <= 30) {
|
|
pwr_save_switch_mode_to_c1();
|
|
|
|
// do not reinitialize everything as reinitialization had been done when switching to m4 mode
|
|
reinit_sensors = 0;
|
|
}
|
|
else {
|
|
reinit_sensors= pwr_save_switch_mode_to_m4();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
else { // DIGI
|
|
pwr_save_switch_mode_to_c2();
|
|
}
|
|
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (reinit_sensors != 0) {
|
|
// reinitialize all i2c sensors
|
|
wx_force_i2c_sensor_reset = 1;
|
|
|
|
// reinitialize everything realted to anemometer
|
|
analog_anemometer_init(main_config_data_mode->wx_anemometer_pulses_constant, 38, 100, 1);
|
|
|
|
// // reset anemometer direction handler
|
|
// analog_anemometer_direction_reset();
|
|
//
|
|
// // reset anemometer windspeed handler
|
|
// analog_anemometer_timer_irq();
|
|
}
|
|
|
|
}
|
|
|
|
uint8_t pwr_save_get_inhibit_pwr_switch_periodic(void) {
|
|
|
|
if ((REGISTER & INHIBIT_PWR_SWITCH_PERIODIC_H) != 0){
|
|
return 1;
|
|
}
|
|
else {
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
#else
|
|
|
|
uint8_t pwr_save_get_inhibit_pwr_switch_periodic(void) {
|
|
return 0;
|
|
}
|
|
|
|
|
|
#endif
|
|
|