kopia lustrzana https://github.com/SP8EBC/ParaTNC
120 wiersze
2.4 KiB
C
120 wiersze
2.4 KiB
C
/*
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* io.c
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*
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* Created on: 11.06.2020
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* Author: mateusz
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*/
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#include "station_config_target_hw.h"
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#include "io.h"
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#ifdef STM32F10X_MD_VL
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#include <stm32f10x.h>
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#include <drivers/gpio_conf_stm32f1x.h>
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#endif
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#ifdef STM32L471xx
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#include <stm32l4xx.h>
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#include <stm32l4xx_ll_gpio.h>
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#endif
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#include "station_config.h"
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#if defined(PARAMETEO)
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LL_GPIO_InitTypeDef GPIO_InitTypeDef;
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#endif
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void io_oc_init(void) {
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#ifdef STM32F10X_MD_VL
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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#endif
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}
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void io_oc_output_low(void) {
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#ifdef STM32F10X_MD_VL
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GPIO_SetBits(GPIOA, GPIO_Pin_11);
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#endif
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}
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void io_oc_output_hiz(void) {
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#ifdef STM32F10X_MD_VL
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GPIO_ResetBits(GPIOA, GPIO_Pin_11);
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#endif
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}
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void io_ext_watchdog_config(void) {
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#ifdef STM32F10X_MD_VL
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// initialize Watchdog output
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Configure_GPIO(GPIOA,12,GPPP_OUTPUT_50MHZ);
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#endif
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#ifdef STM32L471xx
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GPIO_InitTypeDef.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitTypeDef.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitTypeDef.Pin = LL_GPIO_PIN_1;
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GPIO_InitTypeDef.Pull = LL_GPIO_PULL_NO;
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GPIO_InitTypeDef.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
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GPIO_InitTypeDef.Alternate = LL_GPIO_AF_7;
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LL_GPIO_Init(GPIOA, &GPIO_InitTypeDef);
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#endif
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}
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void io_ext_watchdog_service(void) {
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#ifdef STM32F10X_MD_VL
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#endif
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#ifdef STM32L471xx
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if ((GPIOA->ODR & GPIO_ODR_OD1) == 0) {
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// set high
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GPIOA->BSRR |= GPIO_BSRR_BS1;
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}
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else {
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// set low
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GPIOA->BSRR |= GPIO_BSRR_BR1;
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}
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#endif
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}
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//#ifdef STM32F10X_MD_VL
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//void io_5v_isol_sw_cntrl_vbat_s_enable(void) {
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// //GPIO_SetBits(GPIOB, GPIO_Pin_8);
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// GPIOB->BSRR |= GPIO_BSRR_BS8;
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//}
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//void io_5v_isol_sw_cntrl_vbat_s_disable(void) {
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// //GPIO_ResetBits(GPIOB, GPIO_Pin_8);
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// GPIOB->BSRR |= GPIO_BSRR_BR8;
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//}
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//
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//void io_12v_sw_cntrl_vbat_g_enable(void) {
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// //GPIO_SetBits(GPIOA, GPIO_Pin_6);
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// GPIOA->BSRR |= GPIO_BSRR_BS6;
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//
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//}
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//void io_12v_sw_cntrl_vbat_g_disable(void) {
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// //GPIO_ResetBits(GPIOA, GPIO_Pin_6);
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// GPIOA->BSRR |= GPIO_BSRR_BR6;
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//
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//}
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//
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//#endif
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//
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//#ifdef STM32L471xx
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//void io_5v_isol_sw_cntrl_vbat_s_enable(void) {
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//}
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//void io_5v_isol_sw_cntrl_vbat_s_disable(void) {
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//}
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//
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//void io_12v_sw_cntrl_vbat_g_enable(void) {
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//}
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//void io_12v_sw_cntrl_vbat_g_disable(void) {
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//}
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//#endif
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